an1330

ISL54200EVAL1Z Evaluation Board
User’s Manual
®
Application Note
June 13, 2007
Description
Features
The ISL54200EVAL1Z evaluation board is designed to
provide a quick and easy method for evaluating the
ISL54200 USB Switch IC.
• Standard USB Connectors
The ISL54200 device is a unique IC. To use this evaluation
board properly requires a thorough knowledge of the
operation of the IC. Refer to the data sheet for an
understanding of the functions and features of the device.
Studying the device’s truth-table along with its pin-out
diagram on page 2 of the data sheet is the best way to get a
quick understanding of how the part works.
AN1330.0
• Standard Banana Jacks for Power, Ground, VBUS and
Logic Connections
• Jumpers to allow a device to be powered through the Host
Controller
• Convenient Test Points and Connections for Test
Equipment
Picture of Evaluation Board (Top View)
A picture of the main evaluation board is shown in Figure 1.
The ISL54200 μTQFN IC is soldered onto the evaluation
board. It is located in the center of the board and is
designated as U1.
The evaluation board contains USB connectors to allow the
user to easily interface with the IC to evaluate its functions,
features, and performance. For example, with the board
properly powered and configured as shown in Figure 2 you
can control the logic pins, IN and EN, to switch between a
high-speed device and a full-speed device while connected
to a single USB host (computer).
In a typical application, the ISL54200 dual SPDT device is
used to select between two different USB transceiver
sections of a media player. Logic control from a µprocessor
determines which section to connect to the computer. To
change channels, the following sequence would possibly be
followed:
1. A signal would be sent to take the EN pin Low, to open all
switches. The off-isolation of the ISL54200 device would
allow the present active channel to properly disconnect
from the computer.
FIGURE 1. ISL54200EVAL1Z EVALUATION BOARD
2. The IN pin would be set to select the other USB channel.
3. The EN pin would then be taken High to close the
switches to make the connection between the computer
and the other USB section of the player.
This application note will guide the user through the process
of configuring and using the evaluation board to evaluate the
ISL54200 device.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Application Note 1330
Board Architecture/Layout
Basic Layout of Evaluation Board
The basic layout of the main board is as follows: Refer to
Figure 1.
• Power and Ground connections are at the top of the board
at banana jacks (J4 and J5).
• Logic connections, IN and EN, are at the top of the board
at banana jacks (J6 and J7).
• USB connection to an upstream host controller
(Computer) is made at J1, located on the left under-side of
the board.
• USB connections to downstream USB devices are made
at connectors J2 and J3, located on right under-side of the
board.
Logic Control
The state of the ISL54200 device is determined by the
voltage at the IN pin and the EN pin. Access to the IN pin is
through the banana jack J6 (IN) and access to the EN pin is
through the banana jack J7 (EN).
If IN is driven Low (to ground) and EN = High (>1.4V), the
full-speed (FS) switches will be ON. In this state, the USB
host controller (computer) connected at J1 will be connected
through to the USB device connected at J3 and data will be
able to be transmitted between the computer and the device.
If IN is driven High (>1.4V) and EN = High (>1.4V), the
high-speed (HS) switches will be ON. In this state, the USB
host controller (computer) connected at J1 will be connected
through to the USB device connected at J2 and data will be
able to be transmitted between the computer and the device.
• VBUS voltage for the USB devices are made through
banana jacks J8 and J9. Optionally, VBUS for the USB
devices can be connected to the Host Controller VBUS
through jumpers JP4 and JP5.
If EN = Low (driven to ground or floating), all switches will be
OFF. Neither device will be connected through to the host
controller.
• Located in the center of the board is the ISL54200 IC (U1).
The eval board has a pin 1 dot, to show how the IC should
be oriented on to the evaluation board. The IC pin 1
indicator dot needs to be aligned with the evaluation board
pin 1 dot indicator.
In a typical application, the ISL54200 dual SPDT device is
used to select between two different USB transceiver
sections of a media player. Logic control from a µprocessor
determines which section to connect to the computer. To
change channels, the following sequence would possibly be
followed:
IC Power Supply
A DC power supply connected at banana jacks J4 (VDD)
and J5 (GND) provides power to the ISL54200 IC. The IC
requires a 3.3VDC to 5VDC power supply for proper
operation. The power supply should be capable of delivering
100µA of current.
1. A signal would be sent to take the EN pin Low, to open all
switches. The off-isolation of the ISL54200 device would
allow the present active channel to properly disconnect
from the computer.
VBUS Power Supply
3. The EN pin would then be taken High to close the
switches to make the connection between the computer
and the other USB section of the player.
A DC power supply connected at banana jacks J8
(VBUSHS) and J9 (VBUSFS) provides the VBUS voltage
required by the USB devices. The devices require a DC
power supply in the range of 4.4V to 5.25V for proper
operation. The power supply should be capable of delivering
100µA of current.
The J8 banana jack is connected to the VBUS pin of the J2
“A” type USB receptacle. The J9 banana jack is connected
to the VBUS pin of the J3 “A” type receptacle.
The VBUS voltage can be provide from the USB host
controller (computer) by installing a jumper at either JP4 or
JP5.
With a jumper at JP4, the VBUS voltage from J1 gets routed
to the J2 connector. With this jumper installed, no DC supply
should be connected at the J8 (VBUSHS) banana jack.
With a jumper at JP5, the VBUS voltage from J1 gets routed
to the J3 connector. With this jumper installed, no DC supply
should be connected at the J9 (VBUSFS) banana jack.
2
2. Then the IN pin would be set to select the other USB
channel.
USB Connections
A “B” type USB receptacle labeled “USB TO HOST” (J1) is
located on the left under-side of the board. This receptacle
should be connected, using a standard USB cable, to the
upstream USB host controller, which is usually a PC
computer or hub. When this connection is made, the
ISL54200 device will connect the computer through to the
USB device determined by the voltage at the IN logic control
pin.
An “A” type USB receptacle labeled “USB TO HIGHSPEED
DEVICE” (J2) is located on the right under-side of the board.
The USB device can be plugged directly into this receptacle
or through a standard USB cable.
An “A” type USB receptacle labeled “USB TO FULLSPEED
DEVICE” (J3) is located on the right under-side of the board.
The USB device can be plugged directly into this receptacle
or through a standard USB cable.
AN1330.0
June 13, 2007
Application Note 1330
The USB switches are bi-directional, which allows the host
(computer) and downstream USB device to both send and
receive data.
Full-Speed Switches
The two FSx switches (FSD1, FSD2) are bi-directional
switches that can pass rail-to-rail signals. When powered
with a 3.3V supply, these switches have a nominal rON
resistance of 7Ω over the signal range of 0V to 3.3V. They
were specifically designed to pass USB full-speed (12Mbps)
differential signals and meet the USB 2.0 full-speed signal
quality specifications.
The FSx switches can also pass USB high speed signals
(480Mbps) but do not quite meet the USB 2.0 high speed
signal quality eye diagram compliance requirement.
The maximum signal range for the FSx switches is from
-1.5V to VDD. The signal voltage should not be allowed to
exceed the VDD voltage rail or go below ground by more
than -1.5V.
When operated with a 3.3V to 3.6V supply, the FSx switches
are active (turned ON) whenever the IN logic control voltage
is ≤0.5V and the EN logic voltage is ≥1.4V.
High-Speed Switches
The two HSx switches (HSD2, HSD1) are bi-directional
switches that can pass rail-to-rail signals. When powered
with a 3.3V supply, these switches have a nominal rON of
4.5Ω over the signal range of 0V to 400mV with a rON
flatness of 0.4Ω. The rON matching between the HSD1 and
HSD2 switches over this signal range is only 0.01Ω ensuring
minimal impact by the switches to USB high speed signal
transitions. As the signal level increases, the rON switch
resistance increases. At signal level of 3.3V the switch
resistance is nominally 20Ω.
3
The HSx switches were specifically designed to pass USB
2.0 high-speed (480Mbps) differential signals typically in the
range of 0V to 400mV. They have low capacitance and high
bandwidth to pass the USB high-speed signals with
minimum edge and phase distortion to meet USB 2.0 high
speed signal quality specifications.
The HSx switches can also pass USB full-speed signals
(12Mbps) with minimal distortion and meet all the USB
requirements for USB 2.0 full-speed signaling.
The maximum signal range for the HSx switches is from
-1.5V to VDD. The signal voltage should not exceed the VDD
voltage rail or go below ground by more than -1.5V.
The HSx switches are active (turned ON) whenever the IN
voltage is ≥1.4V and the EN logic voltage ≥1.4V when
operated with a 3.3V to 3.6V supply.
Board Component Definitions
DESIGNATOR
DESCRIPTION
U1
ISL54200IRUZ IC
J1
“B” type USB Receptacle
J2, J3
“A” type USB Receptacle
J4
VDD Positive Connection
J5
VDD Negative Connection
J6
IN Logic Control
J7
EN Logic Control
J8
VBUS Voltage for Highspeed Device
J9
VBUS Voltage for Fullspeed Device
JP1, JP2, JP3 D-/D+ Differential Probe Connection
JP4, JP5
Host Controller VBUS Jumper
AN1330.0
June 13, 2007
Application Note 1330
DC POWER
SUPPLY
+3.3V
+
-
DC POWER
SUPPLY
+5V
+
-
LOGIC CONTROL
COMPUTER
VDD
IN
USB PORT
J6
EN
GND
J5
J4
JP4
USB TO HOST
U1
J1
VBUSHS
J7
J8
USB
TO
HIGHSPEED
DEVICE
USB HIGH-SPEED DEVICE
J2
JP1
JP2
JP5
USB
TO
HIGHSPEED
DEVICE
J3
JP3
USB FULL-SPEED DEVICE
VBUSFS
J9
ISL54200EVAL1Z EVALUATION BOARD
Note: Disconnect the +5V power supply connected to J8 and J9 when powering through Host Controller Bus.
FIGURE 2. BASIC EVALUATION TEST SETUP BLOCK DIAGRAM
Using The Board (Refer to Figure 2)
Lab Equipment
The equipment, external supplies and signal sources
needed to operate the board are listed below:
1. +3.3V to +5V DC Power Supply
2. +5V DC Power Supply
3. High-Speed USB device (i.e. USB memory stick, MP3
Player, etc.)
3. Connect a high-speed USB device at USB connector J2
and connect a full-speed USB device at USB connector
J3. These connectors are located on the right under-side
of the evaluation board.
4. Drive the EN control pin LOW to open all switches of the
ISL54200 IC.
5. Connect USB cable from host (PC computer) to the USB
“B” type receptacle, J1 (USB TO HOST).
Full-Speed Device Operation
4. Full-Speed USB device (i.e. USB memory stick, Mouse,
etc.)
1. Apply a logic LOW to the IN pin.
5. Computer with 2.0 High-Speed USB port
3. You should now be able to send and receive data
between the computer and the full-speed USB device.
6. Standard USB cable
2. Apply a logic HIGH to the EN pin.
4. To disconnect the full-speed device from the computer
take the EN pin LOW.
7. Logic Controller
Initial Board Setup Procedure
1. Attach the main evaluation board to a DC power supply
at J4 (VDD) and J5 (GND). Positive terminal at J4 and
negative terminal at J5. The supply should be capable of
delivering 3.3V to 5V and 100µA of current. Set the
supply voltage to 3.3V.
High-Speed Device Operation
1. Apply a logic HIGH to the IN pin.
2. Apply a logic HIGH to the EN pin
3. You should now be able to send and receive data
between the computer and high-speed USB device.
2. Connect a DC power supply at J8 (VBUSHS) and J9
(VBUSFS). Positive terminal at J8 and J9 and negative
terminal at J5 (GND). The supply should be capable of
delivering 5V and 100mA of current. Set the supply
voltage to 5V. This supply will provide 5V at the VBUS pin
of the USB “A” type connectors, J8 and J9.
4
AN1330.0
June 13, 2007
Application Note 1330
Test Points
You can observe the D- and D+ USB signal of the full-speed
channel on an oscilloscope or other test equipment by
connecting a differential probe at JP3.
The board has various test points for ease of connecting
probes to make measurements. The test points available are
described in Table 1.
You can observe the D- and D+ USB signal of the
high-speed channel on an oscilloscope or other test
equipment by connecting a differential probe at JP2.
TABLE 1.
DESIGNATOR
TP1
DESCRIPTION
You can observe the D- and D+ USB signal at the COM side
of the switch on an oscilloscope or other test equipment by
connecting a differential probe at JP1.
VDD test point
TP2, TP4, TP5, Ground Test Point
TP6, TP7, TP8,
TP9
TP3
VBUS Test Point From Computer
JP1
D-/D+ Differential Probe Connection - COM Side of
Switch
JP2
D-/D+ Differential Probe Connection - High-Speed
Device Side of Switch
JP3
D-/D+ Differential Probe Connection - Full-speed
Device Side of Switch
ISL54200EVAL1Z Board Schematic
VDD
GND
IN
EN
J4
J5
C1
J6
J7
TP2
1
1
1
1
10UF
C2
1
1
TP1
0
R2
0
R1
0.1UF
5
MOUNT
7
8
3
HSD+
7
Pack.
6
5
6
JP2
6
1
1
TP4
J2
A
5
MOUNT
1
1
1
VHS
1
2
VFS
TP9
TP8
FULLSPEED
DEVICE
MOUNT
J3
1
2
TO
2
1
1
USB
6
JP3
JP4
4
4
3
FSD+
VBUS
2
3
A
1
1
2
DUSB_ARA42_T11A
A
FSD-
TP3
HIGHSPEED
DEVICE
MOUNT
EP
2
TP5
1
USB
TO
6
2
1
JP1
11
4
TP7
5
8
2
4
COM2
1
4
DFN10
Generic
HSD9
TP6
U1
3
1
3
1
4
J1
9
3
4
MOUNT
A
2
10
2
2
2
USB
4
3
3
897-30-004-90-000
USB
TO
HOST
2
COM1
10
1
MOUNT
1
DUSB_ARA42_T11A
5
1
1
1
A
1
JP5
J8
VBUSHS
J9
VBUSFS
A
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to
verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
5
AN1330.0
June 13, 2007
Similar pages