an1577

Application Note 1577
Author: Allan Robinson
ISL54226IRTZEVAL1Z Evaluation Board User Manual
Description
Features
The ISL54226IRTZEVAL1Z evaluation board is designed to
provide a quick and easy method for evaluating the ISL54226
USB Switch IC.
• Standard USB Connectors
The ISL54226 device is a unique IC. To use this evaluation
board properly requires a thorough knowledge of the operation
of the IC. See the ISL54226 datasheet for an understanding of
the functions and features of the device. Studying the device’s
truth-table along with its pin-out diagram on page 2 of the data
sheet is the best way to get a quick understanding of how the
part works.
• Banana Jacks for Power, Ground and Logic Input/Output
Connections
• Toggle Switch for Easy Control of the OE/ALM Logic Pin
• Convenient Test Points and Connections for Test Equipment
Board Architecture/Layout
Basic Layout of Evaluation Board
A picture of the evaluation board is shown in Figure 1. The
ISL54226 TDFN IC is soldered onto the evaluation board. It is
located in the center of the board and is designated as U1.
The basic layout of the evaluation board is as follows:
(see Figure 1 and “ISL54226IRTZEVAL1Z Board Schematic” on
page 4).
The evaluation board contains USB connectors, banana jacks,
and a toggle switch to allow the user to easily interface with
the IC to evaluate its functions, features, and performance. For
example, with the board properly powered and configured as
shown in Figure 2, the user can control the OE/ALM logic pin
with the toggle switch S1 to connect and disconnect an USB
device from the USB host (computer).
• Power and Ground connections are at the banana jacks
(J1 and J2) at the top of the board.
In a typical application, the ISL54226 dual SPST part is used
for switching or isolating a USB source in portable powered
products.
This application note guides the user through configuring and
using the ISL54226IRTZEVAL1Z evaluation board to evaluate
the ISL54226 device.
ISL54226IRTZEVAL1Z
Evaluation Board
• Logic input connection, OE/ALM, is at banana jack J3
located at the top left side of the board. OE/ALM can also be
accessed by using the toggle switch S1. To use the toggle
switch, jumper JP2 must be installed. To control the logic
through the banana jack J3 the JP2 jumper must not be
populated.
• Logic output connection, INT is at the top right side of the
board at banana jack J4.
• USB connection to an upstream host controller (Computer)
is made at the USB connector J6 located at the left side of
the board.
• USB connection to the downstream USB device is made at
USB connector J5, located on right side of the board.
• The ISL54226 IC (U1) is located in the center of the board.
The evaluation board has a Pin 1 indicator dot to show how
the IC should be oriented on the evaluation board. The IC
Pin 1 indicator dot should be aligned with the evaluation
board Pin 1 indicator dot.
IC Power Supply
A DC power supply connected at banana jacks J1 (VDD) and J2
(GND) provides power to the ISL54226 IC. The IC requires a
2.7VDC to 5.25VDC power supply for proper operation. The
power supply should be capable of delivering 100µA of
current.
Logic Control
The state of the ISL54226 device is determined by the voltage
at the OE/ALM pin. Access to the OE/ALM pin is through the
banana jack J3 (OE/ALM) or the toggle switch S1. To use the
toggle switch to control the logic, a jumper must be installed at
JP2. Remove jumper to control the logic through the banana
jack.
FIGURE 1. ISL54226IRTZEVAL1Z EVALUATION BOARD
March 16, 2012
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1
The OE/ALM pin is an open drain connection. It needs to be
pulled “HIGH” with an external 100kΩ pull-up resistor to VDD.
The OE/ALM pin can then be driven “LOW” by a µProcessor to
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Application Note 1577
open all switches or it can be monitored by the µProcessor for a
“LOW” when the part goes into an overvoltage condition. The
evaluation board has a 100kΩ pull-up resistor to VDD that can be
put on the OE/ALM pin by putting a jumper at JP1.
If OE/ALM is driven “LOW” (to ground) and the signal voltage is in
the range of 0V to 3.6V, the SPST switches will be OFF. The USB
host controller (computer) connected at J6 (USB TO HOST) will be
disconnected from the USB device connected at J5 (USB TO
DEVICE) and no data will be transferred.
If OE/ALM is driven “HIGH” (pulled up to VDD) and the signal
voltage is in the range 0V to 3.6V, the high-speed (HS) switches
will be ON. In this state, the USB host controller (computer)
connected at J6 (USB TO HOST) will be connected through to the
USB device connected at J5 (USB TO DEVICE) and data will be
able to be transmitted between the computer and the device.
If the signal at the host (computer side) of the switch is >3.8V
(typ) or <-0.45V (typ) the ISL54226 IC will turn the switches OFF
and internally pull the OE/ALM pin “LOW”.
INT OUTPUT
Access to the ISL54226 INT pin is at banana jack J4 (INT). During
normal USB transmission and an OVP condition, this pin outputs
a “HIGH”. The ISL54226 part internally pulls this pin “LOW” when
the COM pins have been tied together and the OE/ALM pin is
“LOW”. The purpose of the pin is to be monitored by a µP to tell
when a charger has been connected into the USB port. See the
ISL54226 datasheet, page 6 for description of “Charger Port
Detection”.
USB Connections
A “B” type USB receptacle labeled “USB TO HOST” (J6) is located
at the right side of the board. This receptacle should be
connected, using a standard USB cable, to the upstream USB
host controller, which is usually a PC computer or hub.
phase distortion to meet USB 2.0 high speed signal quality
specifications.
The SPST switches can also pass USB full-speed signals
(12Mbps) with minimal distortion and meet all the USB
requirements for USB 2.0 full-speed signaling.
The maximum normal operating signal range for the SPST
switches is from 0V to 3.6V. For normal operation, the signal
voltage should not be allowed to exceed this voltage range or go
below ground by more than -0.3V.
However, in the event that a positive voltage >3.8V (typ) to 5.25V,
such as the USB 5V VBUS voltage, gets shorted to one or both of
the COM+ and COM- pins or a negative voltage <-0.5V (typ) to -5V
gets shorted to one or both of the COM pins, the ISL54226 has
OVP circuitry to detect the overvoltage condition and open the
SPST switches to prevent damage to the USB down-stream
transceiver connected at the signal pins (D+ and D-).
The OVP and power-off protection circuitry allows the COM pins
(COM-, COM+) to be driven up to 5.25V while the VDD supply
voltage is in the range of 0V to 5.25V. In this condition, the part
draws <100µA of ICOMx and IDD current and causes no stress to
the IC. In addition, the SPST switches are OFF and the fault
voltage is isolated from the other side of the switch.
The OE/ALM pin gets internally pulled “LOW” whenever the part
senses an overvoltage condition. The pin can be monitored for a
“LOW” to determine when an overvoltage condition has occurred.
Board Component Definitions
Evaluation board components and their functions are shown in
Table 1.
TABLE 1. BOARD COMPONENT DESCRIPTIONS
DESIGNATOR
DESCRIPTION
U1
ISL54226IRTZ IC
An “A” type USB receptacle labeled “USB TO DEVICE” (J5) is
located on the right side of the board. A USB device can be
plugged directly into this receptacle or through a standard USB
cable.
J6
“B” type USB Receptacle
J5
“A” type USB Receptacle
J1
VDD Positive Connection
The USB switches are bi-directional, which allows the host
(computer) and downstream USB device to both send and receive
data.
J2
VDD Negative Connection
J3
OE/ALM Logic Control
J4
INT Logic Output
S1
OE/ALM Toggle Switch
High-Speed Switches
The two SPST switches are bi-directional switches that can pass
signals up to 3.6V with a VDD supply voltage in the range of 2.7V
to 5.25V.
When powered with a 2.7V supply, these switches have a
nominal rON of 3.5Ω over the signal range of 0V to 400mV with a
rON flatness of 0.26Ω. The rON matching between the SPST
switches over this signal range is only 0.2Ω ensuring minimal
impact by the switches to USB high speed signal transitions. As
the signal level increases, the rON switch resistance increases. At
a signal level of 3.3V, the switch resistance is nominally 6.8Ω.
JP4, JP5
D-/D+ Differential Probe Connection
JP1
Connects 100kΩ Pullup from OE/ALM Pin to VDD
JP2
Toggle Switch S1 (OE/ALM) Jumper
JP3
INT Output Load Jumper
The SPST switches were specifically designed to pass USB 2.0
high-speed (480Mbps) differential signals typically in the range
of 0V to 400mV. They have low capacitance and high bandwidth
to pass the USB high-speed signals with minimum edge and
2
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March 16, 2012
Application Note 1577
DC POWER
SUPPLY
+3.3V
+
-
INT
VDD
J4
OE/ ALM
GND
J1
J2
J3
JP3
JP2
JP1
OE / ALM
S1
1
0
R1
COMPUTER
J6
J5
U1
USB HIGH-SPEED DEVICE 1
USB PORT
USB
TO
HOST
JP5
JP4
USB
TO
DEVICE
ISL54226IRTZEVAL1Z
FIGURE 2. BASIC EVALUATION TEST SETUP BLOCK DIAGRAM
Using the ISL54226IRTZEVAL1Z
Evaluation Board (see Figure 2)
Lab Equipment
The equipment, external supplies and signal sources needed
to operate the board are listed below:
1. +2.7V to +5.25V DC Power Supply
2. One High-Speed USB Device (i.e., USB memory stick, MP3
Player, etc.)
3. Computer with 2.0 High-Speed USB Port
4. Standard USB Cable
Initial Board Setup Procedure
1. Install jumpers at JP1 and JP2. Allows logic control of
OE/ALM using the S1 switch and connects 100kΩ pull-up
resistor from OE/ALM to VDD.
2. Attach the main evaluation board to a DC power supply at
J1 (VDD) and J2 (GND). Positive terminal at J1 and negative
terminal at J2. The supply should be capable of delivering
2.7V to 5.25V and 100µA of current. Set the supply voltage
to 3.3V.
3. Connect the high-speed USB device at USB connector J5
(USB TO DEVICE). This connector is located on the right side
of the evaluation board.
4. Drive the OE/ALM control pin “LOW” to open the ISL54226
SPST switches by putting toggle switch S1 in the down
position.
5. Connect the USB cable from the host (PC computer) to the
USB “B” type receptacle, J6 (USB TO HOST).
3
High-Speed Operation
1. Apply a logic “HIGH” to the OE/ALM pin by putting toggle
switch S1 in the up position.
2. You should now be able to send and receive data between
the computer and the USB device connected at J5.
3. To disconnect the USB device from the computer take the
OE/ALM pin LOW by putting toggle switch S1 in the down
position.
Test Points
The board has various test points to allow the user to connect
probes to make measurements. The test points are described
in Table 2.
TABLE 2.
DESIGNATOR
DESCRIPTION
TP1
VDD Test Point
TP2
Ground Test Point
TP3
OE /ALM Test Point
TP4
INT Test Point
TP5
VBUS Test Point
JP4
D-/D+ Differential Probe Connection - COM Side of
Switch
JP5
D-/D+ Differential Probe Connection - USB Device Side
of Switch
You can observe the D- and D+ USB signal on an oscilloscope or
other test equipment by connecting a differential probe at JP5.
You can observe the D- and D+ USB signal at the COM side of
the switch on an oscilloscope or other test equipment by
connecting a differential probe at JP4.
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Application Note 1577
ISL54226IRTZEVAL1Z Board Schematic
GND
VDD
J4
J1
1
1
OE/ALM
J2
J3
1
S1
1
INT
3
2
1
2
DNP
1
C2
JP2
2
A
100k
TP2
4.7µF
TP1
1
1
0.1µF
2
R2
1
R1
JP3
C1
JP1
TP4
1
A
1
C5
A
0.01µF
TP3
1
1
1
2
3
TP6
1
3
45
4
9
EP
5
8
8
7
7
1
6
6
2
3
5
4
MOUNT
DUSB ARA42 T11A
1
4
2 3
2
U1
DFN8
Generic
Pack.
USB
TO
DEVICE
6
DIFF
PROBE
2
JP5
4
MOUNT
J5
C4
3
A
0.1µF
1
A
A
DIFF
A
PROBE
1
JP4
2
34
A
TP5
1
1
4
USB
897-30-004-90-000
4
3
J6
MOUNT
2
2
3
0.1µF
C3
56
MOUNT
1
USB
TO
HOST
A
A
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
4
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