PIMZ2; PUMZ2 NPN/PNP general-purpose double transistors Rev. 06 — 17 November 2009 Product data sheet 1. Product profile 1.1 General description NPN/PNP general-purpose double transistors. Table 1. Product overview Type number Package Configuration NXP JEITA PIMZ2 SOT457 SC-74 NPN/PNP double transistors PUMZ2 SOT363 SC-88 NPN/PNP double transistors 1.2 Features Simplified circuit design Reduced component count Reduced pick and place costs 1.3 Applications General-purpose switching and amplification 1.4 Quick reference data Table 2. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VCEO collector-emitter voltage open base - - 50 V IC collector current (DC) - - 150 mA PIMZ2; PUMZ2 NXP Semiconductors NPN/PNP general-purpose double transistors 2. Pinning information Table 3. Pinning Pin Description Simplified outline Symbol PIMZ2 (SOT457) 1 collector TR2 2 emitter TR2 3 collector TR1 4 emitter TR1 5 base TR1 6 base TR2 6 5 4 1 2 3 6 5 4 TR1 TR2 1 2 3 sym082 PUMZ2 (SOT363) 1 emitter TR1 2 base TR1 3 base TR2 4 collector TR2 5 emitter TR2 6 collector TR1 6 5 4 6 5 4 TR2 TR1 1 2 3 1 2 3 sym083 3. Ordering information Table 4. Ordering information Type number Package Name Description Version PIMZ2 SC-74 plastic surface mounted package; 6 leads SOT457 PUMZ2 SC-88 plastic surface mounted package; 6 leads SOT363 4. Marking Table 5. Marking codes Type number Marking code[1] PIMZ2 M6 PUMZ2 GZ* [1] * = -: made in Hong Kong * = t: made in Malaysia * = W: made in China PIMZ2_PUMZ2_6 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 06 — 17 November 2009 2 of 9 PIMZ2; PUMZ2 NXP Semiconductors NPN/PNP general-purpose double transistors 5. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit Per transistor; for the PNP transistor with negative polarity VCBO collector-base voltage open emitter - 60 V VCEO collector-emitter voltage open base - 50 V VEBO emitter-base voltage open collector - 7 V IC collector current (DC) - 150 mA ICM peak collector current - 200 mA IBM peak base current - 100 mA Ptot total power dissipation Tamb ≤ 25 °C SOT457 [1] - 200 mW SOT363 [1] - 180 mW Tstg storage temperature −65 +150 °C Tj junction temperature - 150 °C Tamb ambient temperature −65 +150 °C Per device total power dissipation Ptot [1] Tamb ≤ 25 °C SOT457 [1] - 300 mW SOT363 [1] - 300 mW Device mounted on an FR4 printed-circuit board. 6. Thermal characteristics Table 7. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Per transistor Rth(j-a) thermal resistance from junction to ambient Tamb ≤ 25 °C SOT457 [1] - - 625 K/W SOT363 [1] - - 694 K/W SOT457 [1] - - 417 K/W SOT363 [1] - - 417 K/W Per device Rth(j-a) [1] thermal resistance from junction to ambient Tamb ≤ 25 °C Device mounted on an FR4 printed-circuit board. PIMZ2_PUMZ2_6 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 06 — 17 November 2009 3 of 9 PIMZ2; PUMZ2 NXP Semiconductors NPN/PNP general-purpose double transistors 7. Characteristics Table 8. Characteristics Tamb = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit - - 100 nA VCB = 60 V; IE = 0 A; Tj = 150 °C - - 50 μA nA Per transistor; for the PNP transistor with negative polarity; unless otherwise specified ICBO collector-base cut-off current VCB = 60 V; IE = 0 A IEBO emitter-base cut-off current VEB = 7 V; IC = 0 A - - 100 hFE DC current gain VCE = 6 V; IC = 1 mA 120 250 560 - - −500 TR1 (PNP) VCEsat collector-emitter saturation voltage IC = −50 mA; IB = −5 mA fT transition frequency IE = −2 mA; VCE = −12 V; f = 100 MHz - 190 - MHz Cc collector capacitance IE = ie = 0 A; VCB = −12 V; f = 1 MHz - 2.3 5 pF mV TR2 (NPN) VCEsat collector-emitter saturation voltage IC = 50 mA; IB = 5 mA - - 250 mV fT transition frequency IE = 2 mA; VCE = 12 V; f = 100 MHz 100 - - MHz Cc collector capacitance IE = ie = 0 A; VCB = 12 V; f = 1 MHz - - 3 pF PIMZ2_PUMZ2_6 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 06 — 17 November 2009 4 of 9 PIMZ2; PUMZ2 NXP Semiconductors NPN/PNP general-purpose double transistors 8. Package outline Plastic surface-mounted package (TSOP6); 6 leads D SOT457 E B y A HE 6 5 X v M A 4 Q pin 1 index A A1 c 1 2 3 Lp bp e w M B detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A A1 bp c D E e HE Lp Q v w y 1.1 0.9 0.1 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT457 Fig 1. JEITA SC-74 EUROPEAN PROJECTION ISSUE DATE 05-11-07 06-03-16 Package outline SOT457 (SC-74) PIMZ2_PUMZ2_6 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 06 — 17 November 2009 5 of 9 PIMZ2; PUMZ2 NXP Semiconductors NPN/PNP general-purpose double transistors Plastic surface-mounted package; 6 leads SOT363 D E B y X A HE 6 5 v M A 4 Q pin 1 index A A1 1 2 e1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT363 Fig 2. JEITA SC-88 EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 Package outline SOT363 (SC-88) PIMZ2_PUMZ2_6 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 06 — 17 November 2009 6 of 9 PIMZ2; PUMZ2 NXP Semiconductors NPN/PNP general-purpose double transistors 9. Revision history Table 9. Revision history Document ID Release date Data sheet status Change notice Supersedes PIMZ2_PUMZ2_6 20091117 Product data sheet - PIMZ2_PUMZ2_5 Modifications: • This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content. • • • Table 3 “Pinning”: updated Figure 1 “Package outline SOT457 (SC-74)”: updated Figure 2 “Package outline SOT363 (SC-88)”: updated PIMZ2_PUMZ2_5 20041124 Product data sheet - PIMZ2_PUMZ2_4 PIMZ2_PUMZ2_4 20031217 Product specification - PIMZ2_2 PIMZ2_2 20030714 Product specification - PIMZ2_1 PIMZ2_1 20030602 Objective specification - - PIMZ2_PUMZ2_6 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 06 — 17 November 2009 7 of 9 PIMZ2; PUMZ2 NXP Semiconductors NPN/PNP general-purpose double transistors 10. Legal information 10.1 Data sheet status Document status[1][2] Product status[3] Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. Definition [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 10.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 10.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 10.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 11. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PIMZ2_PUMZ2_6 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 06 — 17 November 2009 8 of 9 PIMZ2; PUMZ2 NXP Semiconductors NPN/PNP general-purpose double transistors 12. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 10.1 10.2 10.3 10.4 11 12 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . General description . . . . . . . . . . . . . . . . . . . . . Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . Quick reference data . . . . . . . . . . . . . . . . . . . . Pinning information . . . . . . . . . . . . . . . . . . . . . . Ordering information . . . . . . . . . . . . . . . . . . . . . Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . Thermal characteristics . . . . . . . . . . . . . . . . . . Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . Package outline . . . . . . . . . . . . . . . . . . . . . . . . . Revision history . . . . . . . . . . . . . . . . . . . . . . . . . Legal information. . . . . . . . . . . . . . . . . . . . . . . . Data sheet status . . . . . . . . . . . . . . . . . . . . . . . Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . Contact information. . . . . . . . . . . . . . . . . . . . . . Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 1 1 1 2 2 2 3 3 4 5 7 8 8 8 8 8 8 9 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 17 November 2009 Document identifier: PIMZ2_PUMZ2_6