Application Note 1064 ISL6292EVAL2Z Evaluation Board Description Key Features The ISL6292EVAL2Z is a complete platform for the evaluation on all datasheet specifications and functionalities. The on board 9-bit DIP switch facilitates programming charging current, setting EN input, battery thermal status, and so on. The four jumpers can set up input source selection, USB mode selection, and can be used to make other necessary connections. • 9-bit DIP switch for conveniently setting up charging current, battery thermal status, EN input, and so on. The ISL6292EVAL2Z board is intended to provide an evaluation platform for the 4mmx4mm2 QFN ISL6292 package, the single-cell Li-ion battery charger. Assembled in the center square, the components constitute a complete charger solution, demonstrating the space saving advantage of the ISL6292 in limited space applications. • Different jumpers for input source selection, USB mode selection, and the convenience of current measurement. • Several exposed soldering pads connected to STATUS, FAULT, TIME, EN, V2P8, IMIN and TEMP functional pins to accommodate experimental testing that need extra connections to those pins. • Board size 3.5x2.5 square inches for the convenience of evaluation. • Eight thermal vias in the thermal pad simulating the customers’ thermal enhanced environment. LEDs connected to STATUS and FAULT pins will indicate the normal charging status or fault condition. What Is Needed On board jumpers and a DIP switch accommodate different operating conditions for the charger. The following instruments will be needed to perform testing: Ordering Information PART # DESCRIPTION ISL6292EVAL2Z Evaluation Board for the 4x4 QFN Package Part. • Power supplies: 1. PS1: DC 20V/5A, 2. PS2: DC (sinks current) 20V/5A, such as Agilent 6654A • Electronic load: 20V/5A • Multimeters • Function generator What Is Inside • Oscilloscope The Evaluation Kit contains: • Cables and wires • ISL6292EVAL2Z board Quick Setup Guide • The ISL6292 Data Sheet Step 1: • This ISL6292EVAL2Z Application Note • Errata (for preliminary reference only) DO NOT APPLY POWER UNTIL STEP 6 Pin Configuration VIN VIN VBAT VBAT ISL6292 (16 LD 4X4 QFN) TOP VIEW 16 15 14 13 Step 2: Connect 5V on VIN. Step 3: Connect 3.7V on VBAT. Step 4: Connect 1.2A electronic load on VBAT. Step 5: Verify that no shunts across all jumpers. VIN 1 12 VBAT Step 6: Turn on Power Supplies and electronic load. FAULT 2 11 TEMP Step 7: Green LED should be on, indicating normal charging operation. Step 8: If current meter is in series with VIN, it shall read 1A as the charging current. 10 IMIN STATUS 3 TIME 4 July 26, 2011 AN1064.1 Switch on bit 4 and bit 7 of the Dip-switch. Leave all other bits off; see Figure 1. 1 TOEN 7 8 V2P8 6 EN 5 GND 9 IREF CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. Copyright Intersil Americas Inc. 2003, 2011. All Rights Reserved. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. Application Note 1064 TABLE 2. JUMPER SETTINGS JUMPER ON OFF JP1 123456789 JP2 FIGURE 1. INITIAL DIP SWITCH SETTINGS DIP Switch Settings JP3 A 9-bit DIP switch is provided to set up voltage, current reference, end-of-charge (EOC) current, and so on. The functionality of the bits are described in Table 1. JP4 TABLE 1. DIP SWITCH PIN DESCRIPTIONS BIT DESCRIPTION ON OFF 1 Adjustable TIMEOUT 5 hours 50 mins 3 hours 30 mins 2 TIMEOUT disable/enable TIMEOUT disabled TIMEOUT enabled 3 Charger enable/disable charger disabled charger enabled 4 IREF setting 1 Add 0.5A 5 IREF setting 2 Add 1A ICHG = 0.5A When both off 6 IMIN setting 100mA 50mA 7 TEMP normal normal 8 TEMP high too hot 9 TEMP low too cold REMARK POSITION FUNCTION USB TO VIN USB input selected WALL CUBE TO VIN Wall adapter input selected Shunt Installed connect VBAT pin to battery current meter can replace shunt Shunt installed Battery attached to Thermistor at J2 Not installed Default IREF and V2P8 Setting USB 500mA mode IREF and GND Setting USB 100mA mode Initial Board Jumper Positioning (Refer to Figure 3) JP1 - Selects the VIN pin to be connected to either a wall adapter, or to a USB connector. If the J1 connector is being used, a shunt must be installed across ‘WALL CUBE TO VIN’, or if the J3 (USB) connector is being used, a shunt must be installed across ‘USB TO VIN’. J1, J3 and JP1 can be ignored if the power supply is connected directly to VIN test point, which is directly connected to VIN pin of the IC. A current meter, to measure the input current, can replace the shunt mentioned above. All off simulates battery removal JP2 - Can connect the VBAT pin to the battery. If the J2 connector is being used, a shunt must be installed across JP2. In this case, a current meter can also replace the shunt to measure the VBAT current. JP3 - Can connect the TEMP pin to the battery. Usually no shunt is needed for JP3, as the Evaluation board can simulate various battery thermal conditions. Only when a battery with a attached thermistor is applied on J2 does it become necessary to install a shunt across JP3, simultaneously turning off bits 7, 8, and 9 on the DIP switch. JP4 - Selects USB modes; a shunt across IREF and V2P8 will set USB 500mA mode; a shunt across IREF and GND will set USB 100mA mode. When the charge current is programmed by the resistors connected to the IREF pin, no shunt should be installed on JP4. 2 AN1064.1 July 26, 2011 Application Note 1064 Z FIGURE 2. CONNECTION OF INSTRUMENTS 3 AN1064.1 July 26, 2011 Board Layout Information Schematic of PCB Board 4 Application Note 1064 AN1064.1 July 26, 2011 FIGURE 3. BOARD LAYOUT INFORMATION SCHEMATIC Application Note 1064 Bill Of Materials TABLE 3. BOM FOR ISL6292EVAL2Z ITEM QUANTITY REFERENCE PART DESCRIPTION PCB FOOTPRINT PART NUMBER VENDOR 1 1 C1 1µF/10V, X5R Ceramic Cap 0603 C1608X5R1A105K TDK 2 1 C2 10µF/6.3V Tantalum Cap 2.05x1.3x1.2 TAJR106M006 AVX 3 1 C3 15nF/16V, X7R Ceramic Cap 0402 C1005X7R1C153K TDK 4 1 C4 0.1µF/16V, Y5V Ceramic Cap 0402 C1005Y5V1C104ZT TDK 5 1 C5 10nF/16V, X7R Ceramic Cap 0402 C1005X7R1C103K TDK 6 1 C6 10µF/16V, Tantalum Cap 3.2x1.6x1.6 TAJA106M016 AVX 7 1 D1 Green LED 0805 67-1553-1-ND DigiKey 8 1 D2 Red LED 0805 67-1552-1-ND DigiKey 9 2 R1, R2 1k, 5% 0603 Various 10 1 R3 10k, 1% 0402 Various 11 2 R4, R5 160k, 1% 0402 Various 12 1 R6 160k, 1% 0805 Various 13 1 R7 80k, 1% 0805 Various 14 1 R8 160k, 1% 0805 Various 15 1 R9 5k, 1% 0805 Various 16 1 R10 500, 1% 0805 Various 17 1 R11 18k, 1% 0805 Various 18 1 J1 2.54mm Male Header, 2ckt (R/A) A23879-ND DigiKey 19 1 J2 2.54mm Male Header, 3ckt (R/A) A23880-ND DigiKey 20 2 JP1, JP4 2.54mm Male Header, 3ckt WM6403-ND DigiKey 21 2 JP2, JP3 2.54mm Male Header, 2ckt WM6402-ND DigiKey 22 1 J3 USB Receptacle, B Type 787780-1-ND DigiKey 23 1 SW1 DIP Switch, 9 POS, SMT CKN1323-ND DigiKey 24 1 U1 ISL6292 Intersil 25 6 5002K-ND DigiKey Single-Cell Li-ion Battery Charger VIN, VBAT, TIME, GND1, Test Point GND2, GND3 5 16-pin, 3x3 QFN AN1064.1 July 26, 2011 Application Note 1064 PCB Layout Z FIGURE 4. SILK LAYER FIGURE 5. TOP (LAYER 1, SIGNAL) FIGURE 6. INTERNAL (LAYER 2, GND) FIGURE 7. INTERNAL (LAYER 3, FLOATING) FIGURE 8. BOTTOM (LAYER 4, GND) Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 6 AN1064.1 July 26, 2011