an1714

Application Note 1714
ISL6420BEVAL6Z - User Guide
Introduction
Key Features
The ISL6420B is a wide input range, synchronous buck
controller. It is designed to drive N-Channel MOSFETs in a
synchronous rectified buck topology for up to 25A load current.
The ISL6420B integrates control, output adjustment,
monitoring and protection functions into a single package. All
the necessary components are within the 2.1 inch by 1.25 inch
PCB area.
• Operates From:
The ISL6420B provides simple, voltage mode control with fast
transient response. The operating frequency can be adjustable
from 100kHz to 1.4MHz.
• Upper MOSFET rDS(ON) for Current Sensing
The 6420B is offered in space saving 4x4 QFN and easy-to-use
20 Ld QSOP packages.
- - 4.5V to 5.5V Input
- - 5.5V to 28V Input
• Resistor-Selectable Switching Frequency from 100kHz to
1.4MHz
• Voltage Margining and External Reference Tracking Modes
• Programmable Soft-start
• Extensive Protection Functions:
- Overvoltage, Overcurrent, Undervoltage
• Power-Good Indicator
Recommended Equipment
The following equipment is recommended for evaluation:
• 0V to 30V power supply with 15A source current capability
• Electronic load capable of sinking 25A
• Digital Multimeters (DMMs)
• 100MHz Quad-Trace Oscilloscope
FIGURE 1. ISL6420BEVAL6Z TOP VIEW (ONE-SIDE PLACEMENT)
TABLE 1. RECOMMENDED COMPONENT SELECTION FOR QUICK EVALUATION
VOUT
IOUT
UPPER MOSFET
LOWER MOSFET
INDUCTOR
FSW/RT
5V
25A
2 X BSC057N03 LS
2 X BSC057N03 LS
SER2010-901ML
300kHz/52.3kΩ
5V
15A
1 X BSC057N03 LS
1 X BSC030N03 LS
SER2009-901ML
500kHz/31.6kΩ
3.3V
25A
2 X BSC057N03 LS
2 X BSC030N03 LS
SER2010-901ML
300kHz/52.3kΩ
3.3V
15A
1 X BSC057N03 LS
1 X BSC030N03 LS
SER2009-901ML
500kHz/31.6kΩ
NOTE: Please contact Intersil Sales for assistance.
December 23, 2011
AN1714.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright Intersil Americas Inc. 2011. All Rights Reserved.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
Application Note 1714
V
_ +
LOAD
A
V
_
+
−
VIN +
A
FIGURE 2. ISL6420BEVAL6Z TEST SET-UP
TABLE 2. JUMPER POSITION
JUMPER #/NAME
J12/GPIO1
J13/GPIO2
J10/VMSET
J11/EN/SS
SHUTDOWN
LOW
LOW
DOES NOT MATTER
DISALBLE
NORMAL
LOW
LOW
VCC5
ENABLE
Margining Up
LOW
HIGH
OPEN/R12 set ΔVO
ENABLE
Margining Down
HIGH
LOW
OPEN/R12 set ΔVO
ENABLE
Quick Test Setup
Probe Set-up
1. Ensure that the evaluation board is correctly connected to the
power supply and the electronic load prior to applying any
power. Please refer to Figure 2 for proper set-up.
2. Connect jumpers J12, J13, J10 and J11 in the positions
specified in Table 2.
3. Turn on the power supply, VIN< 16V
4. Adjust input voltage VIN within the specified range and
observe output voltage. The output voltage variation should
be within 5%.
5. Adjust load current within 25A. The output voltage variation
should be within 5%.
6. Use oscilloscope to observe output ripple voltage and phase
node ringing. For accurate measurement, please refer to
Figure 3 for proper probe set-up.
7. Optimization. Please refer to Table 1 on page 1 for
optimization recommendation.
8. For 5V input applications, please tie VCC5V to VIN and do not
allow VIN to go above 5.5V.
NOTE: Test points: P7, 8, 9, 10(VOUT, GND, GND, VIN) are for voltage
measurement only. Do not allow high current through these test points.
OUTPUT
CAP
OUTPUT
OUTPUT
CAP
CAP
OR MOSFET
OR
MOSFET
FIGURE 3. OSCILLASCOPE PROBE SET-UP
Margining Features
The ISL6420B margin function can be enabled by connecting a
resistor from the VMSET pin to GND, which is R12 on the
ISL6402BEVAL6Z. R12 and the feedback resistor, R24 together
set the margin amount. Please refer to Equation 1.
2.468V × R 24
ΔV MARGIN
---------------------------- = ---------------------------------R 12 xV OUT
V OUT
(EQ. 1)
For example, if 5% margin is desired, R12 should be:
2.468V × R 24
2.468V × 121KΩ
R 12 = ----------------------------------- = --------------------------------------------- = 1210kΩ
0.05 × 5V
0.05xV OUT
(EQ. 2)
Table 2 shows the position of GPIO1 and GPIO2 for margin
up/down.
2
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Application Note 1714
Typical Performance Curves
100
5.05
96
5.03
5.02
92
REGULATION (V)
EFFICIENCY (%)
94
5V/25A
90
3.3V/25A
88
86
5.01
5.00
5V/25A
4.99
84
4.98
82
4.97
80
4.96
0
5
10
15
LOAD CURRENT (A)
20
25
0
20
40
60
80
100
FULL LOAD (%)
FIGURE 4. EFFICIENCY vs LOAD CURRENT
VO(AC) AT 50mV/DIV
TIME AT 10µs/DIV
FIGURE 5. LOAD REGULATION, (VIN = 12V, I MAX = 25A)
VO(AC) AT 50mV/DIV
TIME AT 5µs/DIV
FIGURE 6. OUTPUT RIPPLE (VO = 5V, LOAD = 25A)
FIGURE 7. OUTPUT RIPPLE (VO = 3.3V, LOAD = 25A)
VO AT 2V/DIV
VO(AC) AT 200mV/DIV
VEN/SS AT 2V/DIV
PGOOD AT 5V/DIV
ISTEP AT 10A/DIV
TIME AT 50ms/DIV
FIGURE 8. SOFT-START (C SS - 0.47µF, C DEL = 0.1µF)
3
TIME AT 50µs/DIV
FIGURE 9. LOAD TRANSIENT (LOADSTEP FROM 6.25A TO 18.75A)
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Schematic
P10
1
J10
1
VCC5
2
C35
22uF
1
10uF
C22
2
1
1
2
1
1
2
2
1
1
P8
1
1
C37
1000pF
R21
51K
GND
C58
DNP
C42
0.1uF
C38
DNP
2
C40
DNP
2
J16
C34
0.47uF
VCC5
1
C39
DNP
GND
2
2
2
3
1
1
1
BSC057N03LS
1
J11
1
1
R27
52.3K
2
EN/SS
1
3
1
R20
1
U2
VCC5
2
C48
1uF
2
CDEL
C44
47u
C51
DNP
2
PGOOD
2
C43
180uF
Q8
2
PGND
3
VOUT
C46
DNP
1
ENSS
R10
1.2
Q6
BSC057N03LS
C52
DNP
2
LGATE
4
2
COMP
5
C49
47uF
2
PVCC
C41
180uF
2
PHASE
FB
1
VOUT
L2
0.9uH
1
PGOOD
PGOOD
2
RT
1
2
2
1
R13
12.1K 1
ENSS
PGOOD
20
UGATE
1
J15
2
0.22uF
2
1
19
C47
100pF
C50
1.5nF
SGND
7 1
6
C56
1
COMP18
BOOT
R15 BAT54-02-V-G
2
1
0
2
D3
DNP
VOUT
1
1
VIN
8
VOUT
R22
51K
1 2.26K
1
RT 16
FB 17
GPI02
1
R24
P12
1
1
REFOUT
121K
P13
2
N16246185
VREFOUT
1
1
R26
1k
C5
2 2
1
2
470pF
1
R16
16.5K
1
R23
0
2
GND
Application Note 1714
1
R7
52.3K
GPI01
VCC5
2
P7
GND
1
15
VMSET
R25
1
D4
2
9
2
14
10
OCSET
1
1
1
Q7
BSC057N03LS
2
VCC5 13
P11
1
1000pF
1
REFOUT
12
2
1
2
4
11
2
1
C60
2
2
GND
P9
GPIO2
BSC057N03LS
C21
0.1uF
1
Q5
isl6420BIA
VIN
VIN
C59
100uF
C54
DNP
2
2
1
2
2
C55
22uF
J14
J13
3
C53
10uF
1
2
C45
22uF
GPIO1
1
R12
DNP
1
1
REFOUT
2
1
3
1
2
2
C36
2.2uF
2
J9
1
VIN
J12
VMSET
2
3
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December 23, 2011
Application Note 1714
TABLE 3. BILL OF MATERIALS
ITEM
QTY
PART REFERENCE
VALUE
DESCRIPTION
PART NUMBER
MANUFACTURER
ESSENTIAL COMPONENTS
1
1
C5
470pF
Ceramic CAP, NP0 or C0G, sm0603
GENERIC
GENERIC
2
2
C21, C42
0.1µF
Ceramic CAP, X5R, 50V, sm0603
GENERIC
GENERIC
3
2
C22, C53
10µF
Ceramic CAP, X5R, 10V, sm0805
GENERIC
GENERIC
4
1
C34
0.47µF
Ceramic CAP, X5R, 16V, sm0603
GENERIC
GENERIC
5
3
C35, C45, C55
22µF
Ceramic CAP, X5R, 25V, sm1210
GENERIC
GENERIC
6
1
C36
2.2µF
Ceramic CAP, X5R, 16V, sm0603
GENERIC
GENERIC
7
2
C37, C60
1000pF
Ceramic CAP, NP0 or C0G, sm0603
GENERIC
GENERIC
8
2
C41, C43
180µF
OSCON, 16V, Radial 8 X 9
16SEPC180MX
SANYO
9
2
C44, C49
47µF
Ceramic CAP, X5R, 10V, sm1210
GENERIC
GENERIC
10
1
C47
100pF
Ceramic CAP, NP0 or C0G, sm0603
GENERIC
GENERIC
11
1
C48
1µF
Ceramic CAP, X5R, 25V, sm0603
GENERIC
GENERIC
12
1
C50
1500pF
Ceramic CAP, NP0 or C0G, sm0603
GENERIC
GENERIC
13
1
C56
0.22µF
Ceramic CAP, X5R, 16V,sm0603
GENERIC
GENERIC
14
1
C59
100µF
Alum. Cap, 50V
EMVA500ADA101MHA0G
United Chemi-Con
15
1
D4
BAT54-02-V-G
Vishay
16
1
L2
Inductor
SER2010-901ML
Coilcraft
17
4
Q5, Q7, Q8, Q6
Single Channel NFET, 30V
BSC057N03LS G
Infineon
18
2
R7, R27
52.3kΩ
Resistor, sm0603, 1%
GENERIC
GENERIC
19
1
R10
1.2Ω
Resistor, sm0603, 10%
GENERIC
GENERIC
20
1
R13
12.1kΩ
Resistor, sm0603, 1%
GENERIC
GENERIC
21
2
R15, R23
0Ω
Resistor, sm0603, 10%
GENERIC
GENERIC
22
1
R16
16.5kΩ
Resistor, sm0603, 1%
GENERIC
GENERIC
23
1
R20
1Ω
Resistor, sm0603, 1%
GENERIC
GENERIC
24
2
R21, R22
51kΩ
Resistor, sm0603, 10%
GENERIC
GENERIC
25
1
R24
121kΩ
Resistor, sm0603, 1%
GENERIC
GENERIC
26
1
R25
2.26kΩ
Resistor, sm0603, 1%
GENERIC
GENERIC
27
1
R26
1kΩ
Resistor, sm0603, 1%
GENERIC
GENERIC
28
1
U2
ISL6420BIAZ
INTERSIL
HDWARE, MTG, CABLE TERMINAL, 6-14AWG,
LUG & SCREW, ROHS
KPA8CTP
BERG/FCI
GENERIC
GENERIC
SPC02SYAN
Sullins
1514-2
Keystone
Schottky Diode, 30V, SOD523
0.9µH
PWM CONTROLLER, 20 Ld QSOP
OPTIONAL COMPONENTS
DO NOT
D3, R12, C38, C39, C40,
POPULATE
C46, C51, C52, C54,
C58
29
EVALUATION HARDWARE
30
4
J9, J14, J15, 16
31
4
J10, J11, J12, J13
1X3 Header
32
4
J10, J11, J12, J13
Connector Jumper
33
7
P11, P10, P12, P8, P9,
P13, P7
5
Test Points
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December 23, 2011
Application Note 1714
ISL6420BEVAL6Z PCB Layout
FIGURE 10. TOP SILKSCREEN
6
FIGURE 11. TOP LAYER
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Application Note 1714
ISL6420BEVAL6Z PCB Layout
FIGURE 12. SECOND LAYER(SOLID GROUND)
7
(Continued)
FIGURE 13. THIRD LAYER
AN1714.0
December 23, 2011
Application Note 1714
ISL6420BEVAL6Z PCB Layout
FIGURE 14. BOTTOM LAYER
(Continued)
FIGURE 15. BOTTOM SILKSCREEN
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
8
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