an1504

Application Note 1504
ISL6420B Evaluation Board User Guide
Hardware Description
The ISL6420B evaluation boards illustrates the operation
of the IC.
CAUTION: Ensure that the voltage at VCC5 terminal
does not exceed >6V. This can damage the IC.
VIN
5.5V TO 28V
LOAD
The ISL6420B simplifies the implementation of a
complete control and protection scheme for a high
performance DC/DC buck converter. The IC can be
operated with an input voltage range from 4.5V to 5.5V
or 5.5V to 28V. It is designed to drive N-channel
MOSFETs in a synchronous rectified buck topology. The
control, output adjustment, monitoring and protection
functions are all located in a single package.
ISL6420B Reference Design
Two versions of the evaluation board, based on the
package type, are listed in Table 1. Both are configured
for an output voltage of 3.3V and 10A maximum load.
TABLE 1.
BOARD NAME
IC
FIGURE 1. POWER AND LOAD CONNECTIONS FOR 5.5V
TO 28V INPUT VOLTAGE
PACKAGE
ISL6420BEVAL1Z
ISL6420BIRZ
20 Ld QFN
ISL6420BEVAL2Z
ISL6420BIAZ
20 Ld QSSOP
VIN
5V ±10%
The design criteria is listed in Table 2.
TABLE 2.
VALUES
Output voltage (VOUT)
3.3V
Output current (IOUT)
10A
Switching Frequency
LOAD
PAREMETERS
300kHz
Power and Load Connections
If using an input supply ranging from 5.5V to 28V,
connect the supply to VIN (P1) and GND (P2) posts as
shown in Figure 1. ISL6420B has an internal +5V linear
regulator, which can be used to bias the IC.
When using a 5V ±10% input supply, connect the
negative polarity to GND (P2) post and connect the
positive polarity of the power supply to both VIN (P1)
post and the VCC5 (TP7) post. This will bypass the
internal LDO and the chip will be powered by the input
power supply.
FIGURE 2. POWER AND LOAD CONNECTIONS FOR
5V±10% INPUT VOLTAGE
Start-up
The Power On Reset (POR) function initiates the
soft-start sequence. An internal 10µA current source
charges an external capacitor connected to the ENSS pin
from 0V to 3.3V. When the ENSS pin reaches 1V, the IC is
enabled; the error amplifier reference voltage ramps
from 0V to 0.6V following the slope of the ENSS pin
voltage.
There are two distinct start-up methods for the
ISL6420B. The first method is invoked through the
application of power to the IC. The soft-start feature
allows for a controlled turn-on of the output once the
POR threshold of the input voltage has been reached.
November 23, 2009
AN1504.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Application Note 1504
Figure 3 shows the start-up profile of the regulator in
relation to the start-up of the input supply.
VIN = 18V, VOUT = 3.3V, IOUT = 10A
VOUT
Shutdown
If the ENSS pin is pulled down and held below 1V, the
regulator will be turned off. Figure 5 shows the shutdown
profile of the regulator with the ENSS pin pulled low.
Figure 6 shows the shutdown of the regulator when
powering down the input supply
VOUT
ENSS
ENSS
VIN
VIN
PHASE
FIGURE 3. POWER-UP OF VIN
PHASE
The second method of start-up is through the use of the
enable feature. Holding the ENSS pin on the ISL6420B
below 1V will disable the regulator by forcing both the
upper and lower MOSFETs off. Releasing the pin allows
the regulator to start-up.
FIGURE 5. SHUTDOWN USING ENSS
VIN = 18V, VOUT = 3.3V, IOUT = 10A
VOUT
VOUT
ENSS
ENSS
VIN
VIN
PHASE
PHASE
FIGURE 4. ENABLE USING ENSS
2
FIGURE 6. POWER-DOWN OF VIN
AN1504.0
November 23, 2009
Application Note 1504
Output Performance
3.33
VIN = 12V
The evaluation board has a 0Ω resistor R9 connecting RT
to VCC5 setting the free-running switching frequency to
300kHz. The frequency can be programmed to a
different value by removing R9 and populating the R5
location with a resistor value based on the desired
frequency.
Output Ripple
Figure 7 shows the ripple voltage on the output of the
regulator at the free running 300kHz frequency.
OUTPUT VOLTAGE (V)
Switching Frequency
3.32
3.31
VIN = 24V
3.30
VIN = 18V
3.29
0
1
2
3
4
5
6
7
8
9
10
OUTPUT CURRENT (A)
FIGURE 9. EVALUATION BOARD LOAD REGULATION
(VOUT = 3.3V)
Power Good
VOUT
PGOOD will be true (open drain) when the FB pin voltage
is within ±10% of the reference voltage and the softstart sequence is complete, i.e., once the soft-start
capacitor is finished charging. The assertion of PGOOD
signal can be delayed by a time proportional to a CDEL
current of 2µA and the value of the capacitor connected
between this pin and ground.The status of PGOOD can
be monitored at the PGOOD test point (TP1).
VOUT
ENSS
FIGURE 7. OUTPUT RIPPLE
Efficiency
CDEL
EFFICIENCY (%)
ISL6420B-based regulators enable the design of highly
efficient systems. The efficiency of the evaluation board
using a 12V, 18V and 24V input supply, as shown in
Figure 8.
96
94
92
90
88
86
84
82
80
78
76
74
72
70
PGOOD
VIN = 12V
VIN = 18V
VIN = 24V
FIGURE 10. PGOOD
Overcurrent Protection
The overcurrent function cycles the soft-start function in
a hiccup mode to provide fault protection. Figure 11
shows the overcurrent hiccup mode.
1
2
3
4
5
6
7
8
OUTPUT CURRENT (A)
9
10
FIGURE 8. EVALUATION BOARD EFFICIENCY
(VOUT = 3.3V)
The load regulation of the evaluation board using a 12V,
18V and 24V input supply is shown in Figure 9.
3
The overcurrent function protects the converter from a
shorted output by using the upper MOSFET’s rDS(ON) to
monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
AN1504.0
November 23, 2009
Application Note 1504
The overcurrent trip point on the evaluation board has
been set to 16A.
VOUT
Transient Performance
Figure 12, 13, and 14 show the response of the output
when subjected to transient loading from 0A to 10A at
1A/µs slew rate.
IOUT
VOUT
ENSS
IOUT
FIGURE 11. OVERCURRENT HICCUP MODE
A resistor, ROCSET (R8), programs the overcurrent trip
level. The PHASE node voltage is compared to the
voltage on the OCSET pin while the upper FET is on. A
current (100µA typically) is pulled from the OCSET pin to
establish this voltage across an external resistor. If
PHASE is lower than OCSET, while the upper FET is on,
then an overcurrent condition is detected for that clock
cycle. The pulse is immediately terminated, and a
counter is incremented. If an overcurrent condition is
detected for 8 consecutive clock cycles, and the circuit is
not in soft-start, the ISL6420B enters into hiccup mode.
During hiccup, the external capacitor on the ENSS pin is
discharged and soft-start is initiated. During soft-start,
pulse termination limiting is enabled, but the 8-cycle
hiccup counter is held in reset until soft-start is
completed.
FIGURE 12. TRANSIENT RESPONSE
VOUT
IOUT
The overcurrent function will trip at a peak inductor
current (IPEAK) determined by Equation 1:
I OCSET • R OCSET
I PEAK = --------------------------------------------------R DS ( ON )
(EQ. 1)
where IOCSET is the internal OCSET current source.
The OC trip point varies mainly due to the MOSFET’s
rDS(ON) variations. To avoid overcurrent tripping in the
normal operating load range, calculate the ROCSET
resistor from Equation 1 using:
1. The maximum rDS(ON) at the highest junction
temperature
FIGURE 13. TRANSIENT RESPONSE
VOUT
2. The minimum IOCSET from the data sheet
specification table
Determine ,
I PEAK for I PEAK > I OUT ( MAX ) + ( ΔI ) ⁄ 2
IOUT
(EQ. 2)
where ΔI is the output inductor ripple current. A small
ceramic capacitor should be placed in parallel with
ROCSET to smooth the voltage across ROCSET in the
presence of switching noise on the input voltage.
FIGURE 14. TRANSIENT RESPONSE
4
AN1504.0
November 23, 2009
Application Note 1504
Voltage Margining
Voltage margining mode is enabled by connecting a
margining set resistor (R6) from the VMSET pin to
ground. This resistor to ground will set a current, which is
switched to the FB pin. The current will be equal to
2.468V divided by the value of the external resistor tied
to the VMSET pin. The range of the VMSET resistor is
150kΩ to 400kΩ.
The GPIO1 (TP4) and GPIO2 (TP5) pins control the
current switching as per Table 3. The power supply
output increases when GPIO2 is HIGH and decreases
when GPIO1 is HIGH. Using a jumper to short the pins of
JP1 and JP2 will pull GPIO1 and GPIO2 LOW, respectively.
Remove one of the jumpers to pull GPIO1 or GPIO2 HIGH
for voltage margining. The amount that the output
voltage of the power supply changes with voltage
margining will be equal to 2.468V times the ratio of the
external feedback resistor (R1) and the external resistor
tied to VMSET (R6).
VIN = 18V, VOUT = 3.3V, NO LOAD
VOUT
CDEL
GPIO1
GPIO2
FIGURE 15. NEGATIVE VOLTAGE MARGINING SLEW
TIME
TABLE 3.
GPIO1
GPIO2
VOUT
L
L
No Change
L
H
+Δ VOUT
H
L
-Δ VOUT
H
H
Ignored
VIN = 18V, VOUT = 3.3V, NO LOAD
VOUT
CDEL
The evaluation board has a 330kΩ VMSET resistor (R6)
setting a current:
I VM = 2.468V ⁄ 330kΩ = 7.48μA
GP101
(EQ. 3)
GP102
and:
V ( Δ ) = 7.48μA • 11.5kΩ = 0.086V
(EQ. 4)
The slew time of the current is set by an external
capacitor (C13) on the CDEL pin, which is charged and
discharged with a 100µA current source. The change in
voltage on the capacitor is 2.5V. This same capacitor is
also used to set the PGOOD rise delay. When PGOOD is
low, the internal PGOOD circuitry uses the capacitor and
when PGOOD is high the voltage margining circuit uses
the capacitor. The slew time for voltage margining can be
in the range of 300µs to 2.5ms. The CDEL capacitor on
the evaluation board is 0.1µF leading to a voltage
margining slew rate of 2.5ms. Figures 15 and 16 show
negative and positive voltage margining with a CDEL
capacitor of 0.1µF.
5
FIGURE 16. POSITIVE VOLTAGE MARGINING SLEW
TIME
AN1504.0
November 23, 2009
Application Note 1504
Layout Guidelines
References
DC to DC converter layout is extremely important to
obtain the desired attenuation to the EMI frequencies.
Poor layout practice can cause conducted emissions to
actually couple around the filter components directly into
the input conductors or cause radiated emissions. The
copper traces of power input and output and high current
paths must be sized according to the RMS current
passing through them. Keep the high current loops small
and the path defined. Use single point grounding.
Capacitor lead length must be minimized as much as
possible to reduce ESL. This includes the traces on the PC
board leading up to the capacitor pads. Based on the
layout, voltage transients may reduce the level of the
acceptable max VIN when operating close to 28V. In this
case, one can consider the use of snubbers or reduce the
max VIN. Use of a GND plane in a multilayered board is
preferred.
For Intersil documents available on the web, see
http://www.intersil.com/
6
[1] ISL6420A Data Sheet, Advanced Single
Synchronous Buck Pulse-Width Modulation (PWM)
Controller, Intersil Corporation, File No. FN9169.
[2] ISL6420B Data Sheet, Advanced Single
Synchronous Buck Pulse-Width Modulation (PWM)
Controller, File No. FN6901
AN1504.0
November 23, 2009
ISL6420BEVAL1Z Schematic
VMSET REFOUT GPIO1
TP3
TP2
TP4
GPIO2
TP5
TP7
1
2
3
1
2
2
3
2
1
1
2
3 4
Q5
BSS138
1 PGOOD 1
PGOOD
2
5
TP1
1
2
2
1
C29
0.1uF
2
C27
0.1uF
C32
10uF
VOUT
C28
0.1uF
2
1
2
C15
0.1uF
1
1
C26
DNP
2
2
C24
DNP
1
1
1
2
C22
330uF
2
C31
10uF
C25
DNP
1
C23
DNP
C20
330uF
2
1
1
C21
330uF
1
C19
330uF
1
Q4
DNP
1
1
R15
2.2
BSC018N04LS G
4
VOUT 1
2
Q2
2
5
2
P3
2
1
1
1
1
2
2
C10
0.1uF
2
C13
0.1uF
R1
11.5K
1
2
GREEN
L1
2
2
VCC5
SW1
1
LED3
RED
P4
1
GND
1
1
R21
4.7K
GND
C14
1000pF
R17
2.2
R20
4.7K
3.3uH
1
2
1UF
C17
GND
PHASE
TP6
2
1
2
3
PGND
R13
0
1
LGATE
C1
10nF
JP3
R4
2.55K
1
1
1
2
1
1 2
1 GPIO2
GPI02
GPI01/REFIN
3 OCSET
2 GPIO1
CDEL
16
1
R2
15K
17 PVCC
P2
1
1
1
1
2
R14
0
1
+18V
C18
220uF
Q3
DNP
2
2
1
PVCC
LGATE
C30
220uF
P10
18 PHASE
15
C2
220pF
2
OCSET
5 VMSET
2
PGOOD
R9
FB
COMP
0
PHASE
20 BOOT
19 UGATE
Q1
BSC059N04LS G
4
C11
0.1uF
BOOT
ISL6420BIR
RT
ENSS 12
VCC5 1
FB10
0
R12
UGATE
U1
SGND
CDEL 14
RT 9
1
R5
DNP
VIN
C8
2.2uF
R7
10K
R3
191
R11
2
N16246185
1
0
2
C3
2
2
1
R16
5.6nF
1
0
2
Application Note 1504
2
VCC5
PGOOD 13
8
4 REFOUT
21
VCC5 6
VIN1 7
REFOUT
1
VMSET/MODE
2
1
COMP11
2
EP
C5
0.1uF
2
C16
1uF
ENSS
7
C4
10uF
1
2
R18
C7
2.2uF
D1
BAT54C/SOT
330K
2.2
2
1.27K
1
R6
VIN 1
R8
1
2
1000pF
1
1
P1
VIN 1
2
C12 JP1
2.2uF
1
2
2
1
2
2
2
VCC5
C6
2
1
JP2
VCC5
1
1
1
1
1
2
AN1504.0
November 23, 2009
Application Note 1504
ISL6420BEVAL1Z Rev. A Bill of Materials
ID
REFERENCE
QTY
PART NUMBER
PART TYPE
DESCRIPTION
PACKAGE
VENDOR
1
U1
1
ISL6420BIRZ
PWM Controller IC
IC, Single PWM
Controller
20 Ld 4x4
QFN
Intersil
2
Q1
1
BSC059N04LS G
MOSFET, Single
N-channel, 40V
SuperSO8
Infineon
3
Q2
1
BSC018N04LS G
MOSFET, Single
N-channel, 40V
SuperSO8
Infineon
4
Q3, Q4
5
Q5
1
BSS138LT1G
MOSFET, Single
N-channel, 50V, 200mA SOT23
On Semi
6
D1
1
BAT54C
Diode, Schottky
30V, 200mA
SOT23
Fairchild
7
L1
1
HC9-3R3-R
Inductor
3.3µH, 20%, 14.3A
SMD
Coiltronics
Do not populate
CAPACITORS
8
C1
1
Capacitor, Ceramic,
X7R
0.01µF, 10%, 50V
SM_0603
Various
9
C2
1
Capacitor, Ceramic,
COG
220pF, 10%, 50V
SM_0603
Various
10 C3
1
Capacitor, Ceramic,
X7R
5600pF, 10%, 50V
SM_0603
Various
11 C4, C31, C32
3
Capacitor, Ceramic,
X7R
1µF, 10%, 25V
SM_1210
Various
12 C5, C10, C11,
C13, C15, C27,
C28, C29
8
Capacitor, Ceramic,
X7R
0.1µF, 10%, 50V
SM_0603
Various
13 C6, C14
2
Capacitor, Ceramic,
X7R
1000pF, 10%, 50V
SM_0603
Various
14 C7, C8
2
Capacitor, Ceramic,
X7R
2.2µF, 10%, 50V
SM_1210
Various
15 C12
1
Capacitor, Ceramic,
X5R
2.2µF, 10%, 16V
SM_1206
Various
16 C16
1
Capacitor, Ceramic,
X7R
1µF, 10%, 50V
SM_1206
Various
17 C17
1
Capacitor, Ceramic,
X7R
1µF, 10%, 50V
SM_0805
Various
18 C18, C30
2
EEUFC1H221S
Capacitor, Alum. Elec. 220µF, 20%, 50V,
1150mA
12.5 X 15
Panasonic
19 C19, C20, C21,
C22
4
6TPB330M9L
Capacitor, POSCAP
330µF, 20%, 6.3V,
0.009Ω
Case D3L
SANYO
20 C23, C24, C25,
C26
Do not populate
RESISTORS
21 R1
1
Resistor, Film
11.5kΩ, 1%, 1/10W
SM_0603
Various
22 R2
1
Resistor, Film
15kΩ, 1%, 1/10W
SM_0603
Various
23 R3
1
Resistor, Film
191Ω, 1%, 1/10W
SM_0603
Various
24 R4
1
Resistor, Film
2.55kΩ, 1%, 1/10W
SM_0603
Various
25 R6
1
Resistor, Film
330kΩ, 1%, 1/10W
SM_0603
Various
26 R7
1
Resistor, Film
10kΩ, 1%, 1/10W
SM_0603
Various
27 R8
1
Resistor, Film
1.27kΩ,1%,1/10W
SM_0603
Various
8
AN1504.0
November 23, 2009
Application Note 1504
ISL6420BEVAL1Z Rev. A Bill of Materials (Continued)
ID
REFERENCE
QTY
PART NUMBER
PART TYPE
DESCRIPTION
PACKAGE
VENDOR
28 R9, R11, R12,
R13, R14, R16
6
Resistor, Film
0Ω, 1/10W
SM_0603
Various
29 R15, R17, R18
3
Resistor, Film
2.2Ω, 1%, 1/10W
SM_0603
Various
30 R20, R21
2
Resistor, Film
4.7kΩ,1%,1/10W
SM_0603
Various
31 R5
Do not populate
OTHERS
32 P1 - P4
4
1514-2
Turrett Post
Terminal post, through PTH
hole, 1/4 inch
Keystone
33 TP1 - TP5
3
5002
TEST POINT vertical,
white
PC test jack
Keystone
34 JP1, JP2, JP3
3
69190-202HLF
Header
1X2 Break Strip GOLD
BERG/FCI
35 JP1, JP2
2
SPC02SYAN
Jumper
Connector Jumper
Sullins
36 LED3
1
SSL-LXA3025IGC
LED
LED, Red/Green
SMD3x2.5
mm
Lumex
37 SW1
1
GT11MSCBE-T
Toggle Switch
SPDT Toggle Switch
SMD
ITT
38 P10
Do not populate
39 TP6
Do not populate
PTH
ISL6420BEVAL1Z Printed Circuit Board Layers
FIGURE 17. ISL6420BEVAL1Z - TOP LAYER (SILKSCREEN)
9
AN1504.0
November 23, 2009
Application Note 1504
ISL6420BEVAL1Z Printed Circuit Board Layers (Continued)
FIGURE 18. ISL6420BEVAL1Z - TOP LAYER (COMPONENT SIDE)
FIGURE 19. ISL6420BEVAL1Z - LAYER 2
FIGURE 20. ISL6420BEVAL1Z - LAYER 3
10
AN1504.0
November 23, 2009
Application Note 1504
ISL6420BEVAL1Z Printed Circuit Board Layers (Continued)
FIGURE 21. ISL6420BEVAL1Z - BOTTOM LAYER (SOLDER SIDE)
FIGURE 22. ISL6420BEVAL1Z - BOTTOM LAYER (SILKSCREEN)
11
AN1504.0
November 23, 2009
ISL6420BEVAL2Z Schematic
GPIO1
TP4
TP2
REFOUT
GPIO2
TP5
TP7
1
1
1
2
2
2
VCC5
R1
11.5K
2
1
R4
2.55K
1
R3
191
R11
2
N16246185
1
0
2
C3
2
1
3 4
1
1
2
2
2
3
2
5
1
2
3
1
P3
1
2
1
C27
0.1uF
2
C32
10uF
VOUT
C28
0.1uF
C29
0.1uF
2
C26
DNP
1
1
2
2
C24
DNP
C15
0.1uF
1
2
C22
330uF
1
2
C20
330uF
2
C31
10uF
C25
DNP
2
C23
DNP
1
1
1
C21
330uF
1
C19
330uF
1
Q4
DNP
1
1
2
R15
2.2
P4
1
GND
C10
0.1uF
1
Q2
BSC018N04LS G
4
C14
1000pF
R17
2.2
PGOOD
VOUT 1
2
1UF
C17
C13
0.1uF
1
SW1
2
2
U1
JP3
R13
0
1
1
1
1
1
2
1
4 PVCC
Q5
BSS138
1 PGOOD 1
2
2
CDEL
1 2
OCSET
PGND
PGOOD
PGOOD
ENSS
1
3 LGATE
GREEN
3.3uH
1
2
1
1
ENSS
2
R2
15K
20
LGATE
LED3
RED
L1
2
5 PHASE
PVCC
COMP
R21
4.7K
GND
2
19
C2
220pF
C1
10nF
FB
1
R20
4.7K
TP1
GND
PHASE
TP6
2
2
17
COMP18
1
PHASE
6 UGATE
P2
1
1
1
2
RT
R14
0
+18V
C18
220uF
Q3
DNP
1
FB
R9
UGATE
C11
0.1uF
7 BOOT
BOOT
SGND
C30
220uF
R7
10K
2
1
R16
5.6nF
1
0
2
Application Note 1504
VCC5 1
0
VIN
8
P1
P10
2
RT 16
1
R5
DNP
GPI02
4
5
2
VCC5
9
1
2
3
15
GPI01
2
VIN1 14
10
OCSET
VMSET
Q1
BSC059N04LS G
2
VCC5 13
1
1
REFOUT
C8
2.2uF
1
12
GPIO1
11
0
R12
2
2
isl6420BIA
GPIO2
C5
0.1uF
2
C16
1uF
2
REFOUT
C4
10uF
1
BAT54C/SOT
CDEL
R18
C7
2.2uF
D1
VMSET
12
2.2
2
1.27K
1
R6
VIN 1
R8
2
1
1
2
VIN 1
1000pF
2
330K
1
2
2
1
2
VCC5
C6
C12
2.2uF
JP1
VCC5
1
1
1
JP2
2
1
1
1
2
2
TP3
VMSET
AN1504.0
November 23, 2009
Application Note 1504
ISL6420BEVAL2Z Rev. A Bill of Materials
ID
REFERENCE
QTY
PART NUMBER
PART TYPE
DESCRIPTION
PACKAGE
VENDOR
1
U1
1
ISL6420BIAZ
PWM Controller IC
IC, Single PWM
Controller
20 Ld
QSOP
Intersil
2
Q1
1
BSC059N04LS G
MOSFET, Single
N-channel, 40V
SuperSO8 Infineon
3
Q2
1
BSC018N04LS G
MOSFET, Single
N-channel, 40V
SuperSO8 Infineon
4
Q3, Q4
5
Q5
1
BSS138LT1G
MOSFET, Single
N-channel, 50V, 200mA SOT23
On Semi
6
D1
1
BAT54C
Diode, Schottky
30V, 200mA
SOT23
Fairchild
7
L1
1
HC9-3R3-R
Inductor
3.3µH, 20%, 14.3A
SMD
Coiltronics
Do not populate
CAPACITORS
8
C1
1
Capacitor, Ceramic,
X7R
0.01µF, 10%, 50V
SM_0603
Various
9
C2
1
Capacitor, Ceramic,
COG
220pF, 10%, 50V
SM_0603
Various
10 C3
1
Capacitor, Ceramic,
X7R
5600pF, 10%, 50V
SM_0603
Various
11 C4, C31, C32
3
Capacitor, Ceramic,
X7R
1µF, 10%, 25V
SM_1210
Various
12 C5, C10, C11,
C13, C15, C27,
C28, C29
8
Capacitor, Ceramic,
X7R
0.1µF, 10%, 50V
SM_0603
Various
13 C6, C14
2
Capacitor, Ceramic,
X7R
1000pF, 10%, 50V
SM_0603
Various
14 C7, C8
2
Capacitor, Ceramic,
X7R
2.2µF, 10%, 50V
SM_1210
Various
15 C12
1
Capacitor, Ceramic,
X5R
2.2µF, 10%, 16V
SM_1206
Various
16 C16
1
Capacitor, Ceramic,
X7R
1µF, 10%, 50V
SM_1206
Various
17 C17
1
Capacitor, Ceramic,
X7R
1µF, 10%, 50V
SM_0805
Various
18 C18, C30
2
EEUFC1H221S
Capacitor, Alum. Elec. 220µF, 20%, 50V,
1150mA
12.5 X 15 Panasonic
19 C19, C20, C21,
C22
4
6TPB330M9L
Capacitor, POSCAP
330µF, 20%, 6.3V,
0.009Ω
Case D3L
SANYO
20 C23, C24, C25,
C26
Do not populate
RESISTORS
21 R1
1
Resistor, Film
11.5kΩ, 1%, 1/10W
SM_0603
Various
22 R2
1
Resistor, Film
15kΩ, 1%, 1/10W
SM_0603
Various
23 R3
1
Resistor, Film
191Ω, 1%, 1/10W
SM_0603
Various
24 R4
1
Resistor, Film
2.55kΩ, 1%, 1/10W
SM_0603
Various
25 R6
1
Resistor, Film
330kΩ, 1%, 1/10W
SM_0603
Various
26 R7
1
Resistor, Film
10kΩ, 1%, 1/10W
SM_0603
Various
27 R8
1
Resistor, Film
1.27kΩ,1%,1/10W
SM_0603
Various
13
AN1504.0
November 23, 2009
Application Note 1504
ISL6420BEVAL2Z Rev. A Bill of Materials (Continued)
ID
REFERENCE
QTY
PART NUMBER
PART TYPE
DESCRIPTION
PACKAGE
VENDOR
28 R9, R11, R12,
R13, R14, R16
6
Resistor, Film
0Ω, 1/10W
SM_0603
Various
29 R15, R17, R18
3
Resistor, Film
2.2Ω, 1%, 1/10W
SM_0603
Various
30 R20, R21
2
Resistor, Film
4.7kΩ,1%,1/10W
SM_0603
Various
31 R5
Do not populate
OTHERS
32 P1 - P4
4
1514-2
Turrett Post
Terminal post, through PTH
hole, 1/4 inch
Keystone
33 TP1 - TP5
3
5002
TEST POINT vertical,
white
PC test jack
Keystone
34 JP1, JP2, JP3
3
69190-202HLF
Header
1X2 Break Strip GOLD
BERG/FCI
35 JP1, JP2
2
SPC02SYAN
Jumper
Connector Jumper
Sullins
36 LED3
1
SSL-LXA3025IGC
LED
LED, Red/Green
SMD3x2.5 Lumex
mm
37 SW1
1
GT11MSCBE-T
Toggle Switch
SPDT Toggle Switch
SMD
38 P10
Do not populate
39 TP6
Do not populate
PTH
ITT
ISL6420BEVAL2Z Printed Circuit Board Layers
FIGURE 23. ISL6420BEVAL2Z - TOP LAYER (SILKSCREEN)
14
AN1504.0
November 23, 2009
Application Note 1504
ISL6420BEVAL2Z Printed Circuit Board Layers (Continued)
FIGURE 24. ISL6420BEVAL2Z - TOP LAYER (COMPONENT SIDE)
FIGURE 25. ISL6420BEVAL2Z - LAYER 2
FIGURE 26. ISL6420BEVAL2Z - LAYER 3
15
AN1504.0
November 23, 2009
Application Note 1504
ISL6420BEVAL2Z Printed Circuit Board Layers (Continued)
FIGURE 27. ISL6420BEVAL2Z - BOTTOM LAYER (SOLDER SIDE)
FIGURE 28. ISL6420AEVAL2Z - BOTTOM LAYER (SILKSCREEN)
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the
reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
16
AN1504.0
November 23, 2009
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