an1607

Application Note 1607
ISL8120EVAL4Z Evaluation Board Setup Procedure
FIGURE 1. ISL8120EVAL4Z EVALUATION BOARD
The ISL8120 integrates two voltage-mode synchronous buck
PWM controllers. It can be used either for dual independent
outputs or a 2-phase single-output regulator.
Circuits Description
The ISL8120EVAL4Z evaluation board is used for performance
demo of 2/n-phase single-output applications. This application
note introduces the setup procedure and performance of the
ISL8120EVAL4Z evaluation board.
J3 and J4 are output lugs for load connections.
The ISL8120EVAL3Z evaluation board is for performance demo
of dual independent outputs and DDR applications. Refer to
application note AN1528 “ISL8120EVAL3Z Evaluation Board
Setup Procedure” for details of the ISL8120EVAL3Z board.
Recommended Equipment
• 0V to 22V power supply with at least 20A source current
capability, battery, or notebook AC adapter.
• Two electronic loads capable of sinking current up to 30A.
• Digital multi-meters (DMMs).
• 100MHz quad-trace oscilloscope.
J1 and J2 are the input power terminals.
The input electrolytic caps are used to handle the input current
ripples.
Two upper and two lower Renesas “speed” series LFPAK
MOSFETs are used for each phase.
320nH PULSE surface mount inductors are used for each phase.
Under the 500kHz setup, the inductor current peak-to-peak ripple
is 7.5A at 12V input and 1.2V output.
Four SANYO POSCAP 2R5TPF470M7L (7m) are used as output
E-caps.
TP2 and TP3 are remote sense posts. These pins can be used to
monitor and evaluate the system voltage regulations. If the user
want to use these test posts for remote sense, the R29 and R31
need to be changed to higher values, such as 10Ω. Also, the
related voltage sense divider needs to be increased to a higher
resistance, such as 1k.
TP1 is a test socket to hold the scope probe to check the output
waveforms.
JP9 is used to disable the part.
JP6 is for connection of inputs of clock signal for the part to be
synchronized with.
May 30, 2013
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1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Application Note 1607
JP5 is used for connection of ISHARE signals of multiple boards
in parallel operation applications.
JP3, JP4, R15 and R17 are used to set up the phase shift
between the 2 phases of the IC.
R27 is used to isolate the noise at PVCC caused by driving. In
3.3V applications, it is recommended to short R27 to 0 in order
to prevent VCC from dropping below POR under low input voltage.
The ISL8120 regulator outputs can be paralleled with current
sharing control capability. The configuration for parallel
operation is shown in Typical Application VIII in the datasheet.
For this eval board, follow the following steps to set up the
parallel operation of 2 boards.
1. Change R5 to 100Ω for both boards.
Quick Start
1. Ensure that the circuit is correctly connected to the supply and
loads prior to applying any power.
2. Adjust the input supply to be 12V. Turn on the input power
supply.
3. Verify the output voltage is 1.2V. If PGOOD is set high, the
LED2 will be green. If PGOOD is set low, the LED2 will be red.
TP4 is the test post to monitor PGOOD.
Evaluating the Other Output
Voltage
The ISL8120EVAL4Z kit output is preset to 1.2V/50A. VOUT1 can
also be adjusted between 0.6V to 3V by changing the value of
R26 and R6 for VOUT, as given by Equation 1. The same rule
applies for VOUT2.
R6
R26 = ------------------------------------------------ V OUT  V REF  – 1
Parallel Operation for Current
Sharing Application
where VREF = 0.6V
2. Use 2 wires (ISHARE, GND) connecting the ISHARE signals of
the 2 boards through JP5.
3. Use 2 wires (EN/FF, GND) connecting the EN/FF signals of the
2 boards through JP9.
4. Use 2 wires connecting from JP10 (CLKOUT, GND) of one
board to JP6 (FSYNC, GND) of another board.
5. Connecting the power supply to the inputs of the 2 boards.
6. Connecting the output of the 2 boards together and apply the
loads.
Figure 2 shows the setup picture of 2 boards in parallel
operation.
(EQ. 1)
Programming the Input Voltage
UVLO and its Hysteresis
By programming the voltage divider at the EN/FF pin connected
to the input rail, the input UVLO and its hysteresis can be
programmed. The ISL8120EVAL4Z has R20 4.32k and R21
1.62k; the IC will be disabled when input voltage drops below
2.94V and will restart until VIN recovers to be above 3.2V.
For 12V applications, it’s suggested to have R20 24.9k and R21
2.43k, of which the IC is disabled when the input voltage drops
below 9V and will restart until VIN recovers to be above 10.5V.
Refer to equations on page 22 of the ISL8120 datasheet
(FN6641) to program the UVLO falling threshold and hysteresis.
The equations are re-stated here in Equations 2 and 3, where RUP
and RDOWN are the upper and lower resistors of the voltage
divider at EN/FF pin, VHYS is the desired UVLO hysteresis and VFTH
is the desired UVLO falling threshold.
V HYS
R UP = --------------I HYS
where IHYS = 2x30µA
R UP  V ENREF
R DOWN = -------------------------------------------- where RENREF = 0.8V
V FTH – V ENREF
(EQ. 2)
(EQ. 3)
Note the ISL8120 EN/FF pin is a triple function pin and the
voltages applied to the EN/FF pins are also fed to adjust the
amplitude of each channel’s individual sawtooth.
2
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Application Note 1607
Board 1
Board 2
+ P/S ---
VIN
VIN
+
-
+
ISHARE
ISHARE
ENABLE
ENABLE
CLKOUT
SYNC
+
-
+
-
-
VOUT
VOUT
+
ELECTRONIC LOAD
FIGURE 2. PARALLEL OPERATION SETUP
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ISL8120EVAL4Z Schematic
'Vin+'
J2
TP9
'VIN+'
Vin+
12V TYP
C56
DNP
J1
C55
1500uF/25V
TP10
'GND'
'GND'
VCC
JP10
'ENABLE'
COMP
R16
3.3k
1
'GND'
R19
3.3k
LED2
PGOOD
33
BOOT1 (I/O)
26
VCC (I)
25
27
ISEN1A (I)
ISEN1B (I)
28
29
VSEN1+ (I)
PGND (PAD)
22
21
C23
10u
6V3 X5R
R28
Q7
2k
RJK0305DPB
Q8
RJK0305DPB
20
C3 25V X5R
22u
25V X5R
19
18
17
C5
1u
C28
0.22u
10V X5R
Q9
RJK0301DPB
Q10
RJK0301DPB
R25
DNP
C13
DNP
C21
10u
16V X5R
Vin+
JP4
2
Phase Decode
tolerance resistors can be used unless specified.
C14
DNP
C15
DNP
C17
DNP
C33
DNP
TP2
'VREM+'
1
C58
0.1u
16V X5R
L2
320nH
R1
6.49k
1%
C40
1u
16V X5R
C59
0.1u
10V X7R
OC=65A
1
C30
C31
2R5TPF470M7L
2R5TPF470M7L
C16
10u
16V X5R
C39
10u
16V X5R
J4
VOUT+
+1.2V/50A
TP1
R29
0
TP3
JP2
C29
4.7u
25V X5R
5%
C12
DNP
C22
1u
25V X5R
C42
DNP
Q1
2N7002LT1
1
C20
10u
16V X5R
VOUT
VCC
JP3
C26
C27
2R5TPF470M7L
2R5TPF470M7L
R31
0
R30
2k
R78
2
C60
0.1u
10V X7R
C18
DNP
34
TP4
R2
499
1%
BOOT2 (I/O)
JP1
L1
320nH
R14
DNP
GREEN
2
RED
'PGOOD'
R17
10k
R15
10k
C7
100p
10V X5R
Q6
RJK0301DPB
3
JP9
30
UGATE2 (O)
VMON
VCC
VSEN1- (I)
CLKOUT/REFIN (I/O)
9
R20
4.32k
1%
VMON1 (I/O)
PHASE2 (O)
R18
10k
'GND'
31
EN/FF2 (I/O)
PGOOD (O)
Q5
RJK0301DPB
C6
C1
C2
1u
22u
22u 25V X5R
25V X5R 25V X5R
R4
6.49k
1%
23
VIN (I)
'CLKOUT'
LGATE2 (O)
ISEN2A (I)
8
CLOCKOUT
Q4
RJK0305DPB
24
16
7
'GND'
FSYNC (I/O)
15
JP6
PVCC (I/O)
ISL8120IRZ
ISEN2B (I)
6
'FSYNC'
U1
EN/FF1 (I/O)
VSEN2+ (I)
5
LGATE1 (O)
14
FSYNC
4
Q3
RJK0305DPB
R27
5.1
ISHARE (O)
VSEN2- (I)
R12
76.8k 1%
R22
0
C11
0.22u
10V X5R
PHASE1 (O)
13
'ISHARE'
C19
2.2u
10V X5R
ISET (O)
12
3
ISHARE
C4
100p
10V X5R
UGATE1 (O)
VMON2 (I/O)
2
R3
499
1%
COMP1 (I/O)
FB2 (I/O)
1
C25
1n
10V X5R
R11
10k 1%
'GND'
32
FB1 (I/O)
'GND'
JP5
R7
1k
1%
C24
1n
10V X5R
R10
10k 1%
JP7
VCC
R5
0
11
'COMP'
R8
10k
1%
R9
45.3
1%
'VREM-'
J3
GND
Application Note 1607
R20=4.32k, R21=1.62k: PORH=3.2V, PORL= 2.94V;
R20=24.9k, R21=2.43k: PORH=10.5V, PORL= 9V
4
C9
2.2n
10V X7R
COMP
C8
15n
10V X7R
COMP2 (I/O)
JP8
'GND'
C10
150p
10V X7R
C32
100p
10V X5R
10
'VMON'
C34
1n
10V X5R
R26
200
1%
VMON
R21
1.62k
1%
R6
200
1%
R13
0
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Application Note 1607
ISL8120EVAL4Z Bill of Materials
REF DES
PART NUMBER
QTY
MANUFACTURER
DESCRIPTION
C32
1
VARIOUS
CAP, SMD, 0603, 100pF, 50V, 5%, COG, ROHS
C24, C25, C34
3
VARIOUS
CAP, SMD, 0603, 1000pF, 16V, 10%, X7R, ROHS
C58, C59, C60
3
VARIOUS
CAP, SMD, 0603, 1µF, 16V, 10%, X5R, ROHS
C40
1
VARIOUS
CAP, SMD, 0603, 1µF, 16V, 10%, X5R, ROHS
C23
1
VARIOUS
CAP, SMD, 0603, 10µF, 6.3V, 20%, X5R, ROHS
C10
1
VARIOUS
CAP, SMD, 0603, 150pF, 50V, 5%, NPO, ROHS
C8
1
VARIOUS
CAP, SMD, 0603, 15000pF, 16V, 10%, X7R, ROHS
C9
1
VARIOUS
CAP, SMD, 0603, 2200pF, 50V, 5%, COG, ROHS
C11, C28
2
VARIOUS
CAP, SMD, 0805, 1.0µF, 25V, 10%, X5R, ROHS
C19
1
VARIOUS
CAP, SMD, 0603, 2.2µF, 16V, 10%, X5R, ROHS
C4, C7, C18, C42
0
VARIOUS
CAP, SMD, 0603, DNP-PLACE HOLDER
C5, C6, C22
3
VARIOUS
CAP, SMD, 0805, 1.0µF, 25V, 10%, X5R, ROHS
C29
1
VARIOUS
CAP, SMD, 0805, 4.7µF, 25V, 10%, X5R, ROHS
C16, C20, C21, C39
4
VARIOUS
CAP, SMD, 1206, 10µF, 16V, 10%, X5R, ROHS
C1, C2, C3
3
VARIOUS
CAP, SMD, 1210, 22µF, 25V, 10%, X5R, ROHS
C12, C13, C14, C15,
C17, C33
0
C55
25ZL1500M12.5X25
C56
1
CAP, SMD, 1210, DNP-PLACE HOLDER
RUBYCON
0
CAP, RADIAL, 12.5x25, 1500µF, 25V, 20%, ALUM. ELEC., ROHS
DNP-PLACE HOLDER
C26, C27, C30, C31
2R5TPF470M7L
4
SANYO
CAP, POSCAP, SMD, 7.3x4.3, 470µF, 2.5V, 20%, 7mΩ, ROHS
L1, L2
PA1513.321NLT
2
PULSE
COIL-PWR INDUCTOR, SMD, 13mm, 320nH, 20%, 45A, Pb-Free
LED2
SSL-LXA3025IGC-TR
1
LUMEX
LED, SMD, 3x2.5mm, 4P, RED/GREEN, 12/20MCD, 2V
U1
ISL8120IRZ
1
INTERSIL
IC-DUAL PHASE PWM CONTROLLER, 32P, QFN, 5x5, ROHS
Q1
2N7002-7-F
1
DIODES, INC.
TRANSISTOR, N-CHANNEL, 3LD, SOT-23, 60V, 115mA, ROHS
Q5, Q6, Q9, Q10
RJK0301DPB
4
RENESAS TECHNOLOGY
TRANSISTOR, N-CHANNEL, 5P, LFPAK, 30V, 60A, ROHS
Q3, Q4, Q7, Q8
RJK0305DPB
4
RENESAS TECHNOLOGY
TRANSISTOR, N-CHANNEL, 5P, LFPAK, 30V, 30A, ROHS
R27
1
VARIOUS
RES, SMD, 0603, 5.1Ω, 1/10W, 1%, TF, ROHS
R5, R22, R29, R31
4
VARIOUS
RES, SMD, 0603, 5.1Ω, 1/10W, 1%, TF, ROHS
R7
1
VARIOUS
RES, SMD, 0603, 1k, 1/10W, 1%, TF, ROHS
R8, R10, R11, R15,
R17, R18
6
VARIOUS
RES, SMD, 0603, 10k, 1/10W, 1%, TF, ROHS
R6, R26
2
VARIOUS
RES, SMD, 0603, 200Ω, 1/10W, 1%, TF, ROHS
R28, R30
2
VARIOUS
RES, SMD, 0603, 2k, 1/10W, 1%, TF, ROHS
R21
1
VARIOUS
RES, SMD, 0603, 1.62k, 1/10W, 1%, TF, ROHS
R16, R19
1
VARIOUS
RES, SMD, 0603, 3.3kΩ, 1/10W, 1%, TF, ROHS
R2, R3
2
VARIOUS
RES, SMD, 0603, 390Ω, 1/10W, 1%, TF, ROHS
R9
1
VARIOUS
RES, SMD, 0603, 45.3Ω, 1/10W, 1%, TF, ROHS
R1, R4
2
VARIOUS
RES, SMD, 0603, 6.49k, 1/10W, 1%, TF, ROHS
R12
1
VARIOUS
RES, SMD, 0603, 76.8k, 1/10W, 1%, TF, ROHS
R20
1
VARIOUS
RES, SMD, 0603, 4.32kΩ, 1/10W, 1%, TF, ROHS
5
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Application Note 1607
ISL8120EVAL4Z Bill of Materials (Continued)
REF DES
PART NUMBER
QTY
MANUFACTURER
DESCRIPTION
R13
0
VARIOUS
RES, SMD, 0603, DNP-PLACE HOLDER, ROHS
R14, R25
0
VARIOUS
RES, SMD, 0805, DNP-PLACE HOLDER, ROHS
R78
1
VARIOUS
RES, SMD, 1206, 2Ω, 1/4W, 1%, TF, ROHS
ISL8120EVAL4Z Board Layout
FIGURE 3. TOP SILKSCREEN
FIGURE 4. TOP LAYER
FIGURE 5. 2 nd LAYER
FIGURE 6. 3 rd LAYER
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Application Note 1607
ISL8120EVAL4Z Board Layout (Continued)
FIGURE 7. 4 th LAYER
FIGURE 8. 5 th LAYER
FIGURE 9. BOTTOM LAYER
FIGURE 10. BOTTOM SILKSCREEN (MIRRORED)
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Application Note 1607
ISL8120EVAL4Z Board Layout (Continued)
FIGURE 11. BOTTOM SILKSCREEN
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Application Note 1607
90
100
80
90
70
80
70
60
EFFICIENCY (%)
EFFICIENCY (%)
Test Data for ISL8120EVAL4Z
50
40
30
20
60
50
40
30
20
10
10
0
0
0
5
10
15
20
25
30
35
40
45
50
55
0
5
OUTPUT CURRENT (A)
1.2075
1.208
VOLTAGE OUTPUT (VDC)
VOLTAGE OUTPUT
1.210
1.2060
1.2055
1.2050
1.2045
20
25
30
35
40
45
50
55
FIGURE 13. EFFICIENCY (12V V IN AND 3.3V VOUT )
1.2080
1.2065
15
OUTPUT CURRENT (A)
FIGURE 12. EFFICIENCY (12V V IN AND 1.2V VOUT)
1.2070
10
1.206
1.204
1.202
1.200
1.198
1.196
1.194
1.192
1.2040
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22
VOLTAGE INPUT
1.190
1
5
9 13 17 21 25 29 33 37 41 45 49 53 57
CURRENT OUTPUT (A)
FIGURE 14. LINE REGULATION
FIGURE 15. LOAD REGULATION
FIGURE 16. OUTPUTS RIPPLE UNDER 0A LOAD
FIGURE 17. OUTPUTS RIPPLE UNDER 50A LOAD
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Application Note 1607
Test Data for ISL8120EVAL4Z (Continued)
FIGURE 18. LOAD TRANSIENT (0A TO 50A STEP, SLEW_RATE =
2.5A/µs)
FIGURE 19. LOAD TRANSIENT (50A TO 0A STEP, SLEW_RATE =
2.5A/µs)
VIN
LGATE
PGOOD
VOUT
FIGURE 20. POWER-UP UNDER 50A FULL LOAD
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
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