an1258

Using the ISL8105AEVAL1Z PWM Controller
Evaluation Board
®
Application Note
November 1, 2007
AN1258.1
Introduction
The ISL8105AEVAL1Z evaluation board highlights the
operations of the ISL8105A controller in a DC/DC application.
The evaluation board is configured for an output voltage of
1.8V and 15A maximum load.
VIN = 12V, VOUT = 1.8V, IOUT = 10A
VOUT
COMP-EN
FIGURE 2. SOFT-START
FIGURE 1. ISL8105AEVAL1Z EVALUATION BOARD
Figure 1 shows the start-up profile of the ISL8105AEVAL1Z
in relation to the start-up of the 12V input supply and the bias
supply.
Power and Load Connections
Soft-Start with Pre-Biased Output
INPUT VOLTAGE
If the output is pre-biased to a voltage less than the expected
value, the ISL8105A will detect that condition. Neither
MOSFET will turn on until the soft-start ramp voltage
exceeds the output; VOUT starts seamlessly ramping from
there.
The evaluation board is optimized for an input supply of 12V,
however, the input supply based on the connection can
range from 4.5V to 5.5V or 6.5V to 14.4V.
The IC bias supply and the converter input voltage are
connected together through R10 to provide single rail power
supply application.
VIN = 12V, VOUT = 1.8V, IOUT = 1A
OUTPUT VOLTAGE LOADING AND MONITORING
VOUT
Connect the positive lead of the electronic load and the
positive lead of a digital multimeter to the VOUT terminal (J4)
and the ground lead to the GND terminal (J5). The scope
probe terminal (TPV01) can be used to monitor VOUT with
an oscilloscope.
COMP-EN
Start-up
The ISL8105A starts up when VBIAS rises above POR
threshold and the COMP/EN rises above VDISABLE level. The
entire start-up time sequence from POR typically takes up to
17ms. There is fixed 6.8ms delay for the POR to initiate the
Overcurrent Protection (OCP) sample and hold operation.
The OCP sample and hold operation takes an additional 0ms
to 3.4ms (the longer time occurs with the higher overcurrent
setting). When the OCP sampling and hold operations are
done, the soft-start function internally ramps the reference on
the non-inverting terminal of the error amp from 0V to 0.6V in
6.8ms (typ).
1
FIGURE 3. SOFT-START WITH PRE-BIASED OUTPUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Application Note 1258
Output Performance
VOUT
Switching Frequency
The evaluation board comes with a ISL8105A that has a
fixed switching frequency of 600kHz.
IOUT
Output Ripple
Figure 4 shows the ripple voltage on the output of the
regulator.
VOUT
FIGURE 6. TRANSIENT RESPONSE
VOUT
IOUT
FIGURE 4. OUTPUT VOLTAGE RIPPLE (20MHz BW)
VOUT
FIGURE 7. TRANSIENT RESPONSE
VOUT
FIGURE 5. OUTPUT VOLTAGE RIPPLE AND NOISE
(500MHz BW)
IOUT
Transient Performance
Figures 6, 7 and 8 show the response of the output when
subjected to transient loading from 7.5A to 15A.
Overcurrent Protection
The overcurrent function limits the output current by using the
bottom-side MOSFET’s rDS(ON) to monitor the current. A
resistor, RBSOC, (R8) programs the overcurrent trip level. This
method enhances the converter's efficiency and reduces cost
by eliminating a current sensing resistor. If overcurrent is
detected, the output immediately shuts off, it cycles the
soft-start function in a hiccup mode (2 dummy soft-start
time-outs, then up to one real one) to provide fault protection.
If the shorted condition is not removed, this cycle will continue
indefinitely. Figure 9 shows the overcurrent response and
hiccup mode operation.
2
FIGURE 8. TRANSIENT RESPONSE
AN1258.1
November 1, 2007
Application Note 1258
Efficiency
ISL8105A based regulators enable the design of highly
efficient systems. The efficiency of the evaluation board
using a 5V and a 12V input supply is shown in Figure 11.
VOUT
100
IOUT
VIN = 5V
90
EFFICIENCY (%)
80
FIGURE 9. OVERCURRENT HICCUP MODE
VIN = 12V
70
60
50
40
30
The overcurrent function will trip at a peak inductor current
(IPEAK) determined by Equation 1:
20
10
0
2 • I OCSET • R OCSET
I PEAK = -----------------------------------------------------------r DS ( ON )
(EQ. 1)
where IOCSET is the internal 21.5µA OCSET current source.
The OC trip point varies mainly due to the MOSFET’s
rDS(ON) variations. To avoid overcurrent tripping in the
normal operating load range, calculate the ROCSET resistor
from Equation 1 using:
1. The maximum rDS(ON) at the highest junction
temperature.
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
IOUT (A)
FIGURE 11. EVALUATION BOARD EFFICIENCY (VOUT = 1.8V)
References
For Intersil documents available on the web, see
http://www.intersil.com/
[1] ISL8105, ISL8105A Data Sheet, Intersil Corporation,
FN6306
2. The minimum IOCSET from the specification table.
Determine I PEAK for I PEAK > I OUT ( MAX ) + ( ΔI ) ⁄ 2
where ΔI is the output inductor ripple current.
The overcurrent trip point on the evaluation board has been
set to 19A for 5VBIAS (24A for 12VBIAS).
Figure 10 shows the output voltage recovers from overcurrent
condition.
VOUT
IOUT
FIGURE 10. OVERCURRENT HICCUP MODE
3
AN1258.1
November 1, 2007
ISL8105AEVAL1Z Schematic
4
J1
VIN
TP2
R10
zero
VCC
LGATE/OCSET
4
GND
3
UGATE
2
BOOT
1
Q1
DNP
FB
Q5
RJK0305
G2
S2
G1
S1
SO-8 DUAL
R8
1.33k
5
6
7
8
J4
VOUT
TP8
L1
DNP
2
COMP/SD
8
PHASE
1.0uH
1
+
C6
0.1uF
3
C30
+
C34
TP1
ISL8105A SOIC
SW1
GND
J6
2
7
4
DPAK FET
J3
GND
1
Q2
DNP
DNP
DNP
DNP
D2_5
D2_6
D1_7
D1_8
C26
1uF
C25
1uF
2200uF
220uF
DNP
DNP
+
Q6
RJK0301
C33
220uF
C35
100uF
C32
1.0uF
C38
1.0uF
DNP
C31
100uF
C36
100uF
C37
1.0uF
DNP
TP3
GND
J5
R1
10.5k
1
C1
47pF
R4
5.23k
C3
1500pF
2
R3
187
Probe Socket
4 TPVO1
DNP
3
R2
9.53k
U2
VCC
ISL8105A DFN
VCC
LGATE/OCSET
7
NC2
GND
4
NC1
3
FB
8
FB
COMP
9
COMP/SD
10
PHASE
11
PH
DNP
6
EP
C2
0.01uF
5
LG
UGATE
2
UG
BOOT
1
BT
Application Note 1258
6
DPAK FET
5
TP7
4
3
2
1
C24
10uF
C22
10uF
470uF
DNP
Q7
TP4
U1
TP6
C21
10uF
C23
+
470uF
J2
VCC
C20
+
C4
1.0uF
AN1258.1
November 1, 2007
Application Note 1258
ISL8105AEVAL1Z Bill of Materials
ID
REFERENCE
1
U1
2
QTY
1
PART NUMBER
PART TYPE
DESCRIPTION
PACKAGE
VENDOR
ISL8105AIBZ
IC, Linear
IC, Single PWM Controller
8LD SOIC
Intersil
U2
DNP ISL8105AIRZ
IC, Linear
IC, Single PWM Controller
10LD DFN
Intersil
3
Q1, Q2
DNP
MOSFET
N-Channel
DPAK
4
Q5
1
RJK0305
MOSFET
N-Channel, 30V
LFPAK
Renasas
5
Q6
1
RJK0301
MOSFET
N-Channel, 30V
LFPAK
Renasas
6
Q7
DNP
MOSFET
N-Channel, Dual
8LD SOIC
7
L1
1
IHLP5050FDER1R0M01
Inductor
1.0µH, high current inductor SMD
Vishay
8
SW1
1
EVQ-PAD04M
Push Switch
SWITCH-PUSH, TH, 6mm,
1P, PUSHB MOM-SPST
PANASONIC
CAPACITORS
9
C1
1
Capacitor, Ceramic, X7R 47pF, 50V, 5%, NPO,
ROHS
SM_0603
TDK/Generic
10 C2
1
Capacitor, Ceramic, X7R 0.01µF, 50V, 10%, ROHS
SM_0603
TDK/Generic
11 C3
1
Capacitor, Ceramic, X7R 1500pF, 50V, 10%, ROHS
SM_0603
TDK/Generic
12 C4
1
Capacitor, Ceramic, X7R 1µF, 16V, 10%, X7R, ROHS SM_0603
TDK/Generic
13 C6
1
Capacitor, Ceramic, X7R 0.1µF, 16V, 10%, ROHS
SM_0603
TDK/Generic
Capacitor, Alum. Elec
RADIAL 8x11 RUBYCON
14 C20, C23
15 C21, C22, C24
DNP 16MCZ470M8X11.5
470µF, 16V, 20%, 21mΩ,
Pb-free
3
Capacitor, Ceramic, X5R 10µF, 16V, 10%, ROHS
SM_1210
TDK/Generic
16 C25, C26
DNP
Capacitor, Ceramic, X5R 1µF, 6.3V, 20%, ROHS
SM_1812
TDK/Generic
17 C30, C33, C34
DNP 6.3MCZ1200M8X16
Capacitor, Alum. Elec
18 C31, C35, C36
Capacitor, Ceramic, X5R 100µF, 6.3V, 20%, ROHS
SM_1812
TDK/Generic
DNP
Capacitor, Ceramic, X5R 1µF, 6.3V, 10%, ROHS
SM_0603
TDK/Generic
2
Capacitor, Ceramic, X5R 1µF, 6.3V, 10%, ROHS
SM_0603
TDK/Generic
21 R1
1
Resistor, Film
10.5kΩ, 1%, 1/16W
SM_0603
Panasonic/Generic
22 R2
1
Resistor, Film
9.53kΩ, 1%, 1/16W
SM_0603
Panasonic/Generic
23 R3
1
Resistor, Film
187Ω, 1%, 1/16W
SM_0603
Panasonic/Generic
24 R4
1
Resistor, Film
5.23kΩ, 1%, 1/16W
SM_0603
Panasonic/Generic
25 R8
1
Resistor, Film
1.33kΩ, 1%, 1/16W
SM_0603
Panasonic/Generic
26 R10
1
Resistor, Film
1/8W, TF, ROHS
SM_0805
YAGEO
19 C32
20 C37, C38
3
1200µF, 6.3V, 20%, 18mΩ, RADIAL 8x16 RUBYCON
Pb-free
RESISTORS
RC0805JR-070RL
OTHERS
27 TPVO1
DNP 0293-0-15-15-16-27-10-0 Terminal, Scope Probe
CONN-PIN RECEPTACLE,
0.086 DIA, 0.200 L, ROHS
MILL-MAX
28 J1, J3, J4, J5
4
111-0702-001
Banana Connector
CONN-GEN, BIND. POST,
THMBNUT-GND
JOHNSON
COMPONENTS
29 J2, J6
2
1514-2
Turrett Post
CONN-TURRET,
TERMINAL POST, TH,
ROHS
Keystone
Test Point
CONN-MINI TEST POINT,
VERTICAL, WHITE, ROHS
Keystone
30 TP1-TP4, TP6-TP8 DNP 5002
5
AN1258.1
November 1, 2007
Application Note 1258
ISL8105AEVAL1Z Printed Circuit Board Layers
ISL8105AEVAL1Z
FIGURE 12. ISL8105AEVAL1Z - TOP LAYER (SILKSCREEN)
FIGURE 13. ISL8105AEVAL1Z - TOP LAYER (COMPONENT SIDE)
FIGURE 14. ISL8105AEVAL1Z - LAYER 2
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AN1258.1
November 1, 2007
Application Note 1258
ISL8105AEVAL1Z Printed Circuit Board Layers (Continued)
FIGURE 15. ISL8105AEVAL1Z - LAYER 3
FIGURE 16. ISL8105AEVAL1Z - LAYER 4
FIGURE 17. ISL8105AEVAL1Z - BOTTOM LAYER (SOLDER SIDE)
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to
verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
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AN1258.1
November 1, 2007