an1861

Application Note 1861
Author: Paul Orfanu
ISL85415DEMO1Z Wide VIN 500mA Synchronous Buck
Regulator - Short Form
Description
Quick Setup Guide
The ISL85415DEMO1Z kit is intended for use for Point-ofLoad applications sourcing from 3V to 36V. The kit is used to
demonstrate the performance of the ISL85415 Wide VIN Low
Quiescent Current High Efficiency Sync Buck Regulator with
500mA output current.
1. Ensure that the circuit is correctly connected to the supply
and loads prior to applying any power.
The ISL85415 is offered in a 4mmx3mm 12 Ld DFN package
with 1mm maximum height. The converter occupies 1.516
cm2 area.
3. Turn on the power supply.
Key Features
• Wide input voltage range 3V to 36V
• Synchronous operation for high efficiency
• No compensation required
• Integrated high-side and low-side NMOS devices
2. Connect the bias supply to VIN, the plus terminal to VIN (P4)
and the negative return to GND (P5).
4. Verify the output voltage is 3.3V for VOUT.
Evaluating the Other Output Voltage
The ISL85415DEMO1Z kit output is preset to 3.3V; however,
output voltages can be adjusted from 0.6V to 15V. Please refer
to the application note (AN1860 and to the ISL85415 datasheet
(FN8373 for further information.
Frequency Control
• Internal or external soft-start
The ISL85415 has an FS pin that controls the frequency of operation.
Default switching frequency is 500kHz when FS is tied to VCC
(R10 = 0). By removing R10 the switching frequency could be
changed from 300kHz (R12 = 340k) to 2MHz (R12 = 32.4k). Please
refer to datasheet ISL85415 (FN8373) for calculating the value of
R10. Do not leave this pin floating.
• Minimal external components required
Disabling/Enabling Function
• Selectable PFM or forced PWM mode at light loads
• Internal fixed (500kHz) or adjustable switching frequency
300kHz to 2MHz
• Continuous output current up to 500mA
• Power-good and enable functions available
Recommended Equipment
The following materials are recommended to perform testing:
• 0V to 50V Power Supply with at least 2A source current
capability
• Electronic Loads capable of sinking current up to 1.5A
• Digital Multimeters (DMMs)
• 100MHz quad-trace oscilloscope
• Signal generator
ISL85415DEMO1Z board has EN pin tied to VCC via R7. This
keeps the part enabled all the time. To disable the part,
remove R7 and populate R8 with a 0Ω resistor.
SYNC Control
The ISL85415 evaluation board has a SYNC pin that allows
external synchronization frequency to be applied. Default
board configuration has R6 = 200k to VCC, which defaults to
PWM operation mode and also to the pre-selected switching
frequency set by R12 (see datasheet and previous section”
Frequency Control” for details). If this pin is tied to GND the IC
will operate in PFM mode. For PFM operation, remove R6 and
populate R9 with 0Ω resistor
Soft-Start /COMP Control
R15 selects between internal (R15 = 0) and external soft-start.
R11 selects between internal (R11 = 0) and external
compensation. Please refer to Pin Description Table (Page 3)
of the ISL85415 (FN8373) datasheet.
July 22, 2013
AN1861.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright Intersil Americas LLC 2013. All Rights Reserved.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
Application Note 1861
100
VIN = 12V
VIN = 15V
95
VIN = 5V
EFFICIENCY (%)
90
85
80
75
70
VIN = 33V
VIN = 24V
65
60
55
50
FIGURE 1. FRONT OF EVALUATION BOARD ISL85415DEMO1Z
0
0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50
OUTPUT LOAD (A)
FIGURE 2. EFFICIENCY vs LOAD, PFM, VOUT = 3.3V
ISL85415DEMO1Z Schematic
R10
OPEN
VCC
CSS
0.033UF
R15
OPEN
? A
SS
1 SS
SYNC
P4
C3
P7
C1
10UF
C10
150UF
C2
10UF
2 SYNC
VO
C6
22UF
C5
22UF
FS 12
COMP11
3 BOOT
0.1UF
VIN
R12
120K
4 VIN
5 PHASE
L1
22UH
6 PGND
EN 7
EP
DFN12
P5
C7
470PF
C8
OPEN
ISL85415
R11
OPEN
R3
100K
VO
R1
FB 10
VCC 9
PG 8
VCC
VCC
PG
EN
90.9K
P8
C9
1UF
C4
100PF
R2
20K
A
A
VIN
P9
A
VCC
R7
200K
R6
200K
SYNC
EN
P2
P1
R9
OPEN
A
PG
R8
OPEN
A
NOTE: If the IC is used in an application where the input test leads have large parasitic inductance, the input electrolytic
capacitor C10 may be added to prevent transient voltages on the input pin.
ISL85415DEMO1Z Board Layout
FIGURE 3. SILK SCREEN TOP
FIGURE 4. SILKSCREEN BOTTOM
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
2
AN1861.0
July 22, 2013
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