DATASHEET

ISL84714
®
Data Sheet
January 19, 2009
Ultra Low ON-Resistance, Low Voltage,
Single Supply, SPDT Analog Switch
The Intersil ISL84714 device is a low ON-resistance, low
voltage, bidirectional, single pole/double throw (SPDT)
analog switch designed to operate from a single +1.65V to
+3.6V supply. Targeted applications include battery powered
equipment that benefit from low ON-resistance and fast
switching speeds (tON = 7.5ns, tOFF = 2.9ns). The digital logic
input is 1.8V CMOS compatible when using a single +3V
supply.
FN6086.3
Features
• Pb-Free Available (RoHS Compliant)
• Drop In Replacement for the MAX4714
• ON-resistance (rON)
- VCC = +2.7V . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.44Ω
- VCC = +1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.75Ω
• rON Matching Between Channels . . . . . . . . . . . . . . . 0.005Ω
• rON Flatness (+2.7V Supply) . . . . . . . . . . . . . . . . . . . . 0.06Ω
Cell phones, for example, often face ASIC functionality
limitations. The number of analog input or GPIO pins may be
limited and digital geometries are not well suited to analog
switch performance. This part may be used to “mux-in”
additional functionality while reducing ASIC design risk. The
ISL84714 is offered in the 6 Ld SC70 package, alleviating
board space limitations.
• Single Supply Operation. . . . . . . . . . . . . . . . +1.65V to +3.6V
The ISL84714 is a committed SPDT that consists of one
normally open (NO) and one normally closed (NC) switch.
This configuration can also be used as a 2-to-1 multiplexer.
• 1.8V, CMOS Logic Compatible (+3V supply)
TABLE 1. FEATURES AT A GLANCE
ISL84714
Number of Switches
1
SW
SPDT or 2-1 MUX
1.8V rON
0.75Ω
1.8V tON/tOFF
15.6ns/4.5ns
3V rON
0.38Ω
3V tON/tOFF
7.5ns/2.9ns
Package
6 Ld SC70
1
• Fast Switching Action (+2.7V Supply)
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.9ns
• Guaranteed Break-Before-Make
• ESD HBM rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >6kV
• Available in 6 LD SC70 package
Applications
• Battery Powered, Handheld, and Portable Equipment
- Cellular/Mobile Phones
- Pagers
- Laptops, Notebooks, Palmtops
• Portable Test and Measurement
• Medical Equipment
• Audio and Video Switching
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL84714
Pinout
Ordering Information
(Note )
ISL84714 (SC70)
TOP VIEW
PART
NUMBER
(Note)
IN 1
6 NO
V+ 2
5 COM
4 NC
GND 3
Note: Switches Shown for Logic “0” Input.
Truth Table
LOGIC
PIN NC
PIN NUMBER
0
On
Off
1
Off
On
PART
MARKING
TEMP.
RANGE
(°C)
PACKAGE
PKG.
DWG.
NO.
ISL84714IH-T*
CAA
-40 to +85 6 Ld SC70
Tape and Reel
P6.049
ISL84714IHZ-T*
CDA
-40 to +85 6 Ld SC70
Tape and Reel
(Pb-free)
P6.049
*Please refer to TB347 for details on reel specifications
NOTE: These Intersil Pb-Free plastic packaged products employ
special Pb-Free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-Free soldering operations). Intersil Pb-Free products are MSL
classified at Pb-Free peak reflow temperatures that meet or exceed
the Pb-Free requirements of IPC/JEDEC J STD-020..
Note: Logic “0” ≤0.5V. Logic “1” ≥1.4V with a 3V supply.
Pin Descriptions
PIN
V+
FUNCTION
System Power Supply Input (+1.65V to +3.6V)
GND
Ground Connection
IN
Digital Control Input
COM
Analog Switch Common Pin
NO
Analog Switch Normally Open Pin
NC
Analog Switch Normally Closed Pin
2
FN6086.3
January 19, 2009
ISL84714
Absolute Maximum Ratings
Thermal Information
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 4.8V
Input Voltages
NO, NC, IN (Note 1) . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Output Voltages
COM (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Continuous Current NO, NC, or COM . . . . . . . . . . . . . . . . . ±150mA
Peak Current NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . ±300mA
ESD Rating:
HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>6kV
MM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>300V
CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>1000V
Thermal Resistance (Typical, Note 2)
θJA (°C/W)
6 Ld SC70 Package . . . . . . . . . . . . . . . . . . . . . . . . .
590
Maximum Junction Temperature (Plastic Package). . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range
ISL84714IH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. Signals on NC, NO, IN, or COM exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings.
2. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications - 3V Supply
PARAMETER
Test Conditions: V+ = +2.7V to +3.6V, GND = 0V, VINH = 1.4V, VINL = 0.5V (Note 3),
Unless Otherwise Specified.
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 7)
Full
TYP
MAX
(Note 7)
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
0
-
V+
V
ON Resistance, rON
V+ = 2.7V, ICOM = 100mA, VNO or VNC = 1.5V
(See Figure 5)
25
-
0.44
0.6
Ω
Full
-
-
0.7
Ω
rON Matching Between Channels,
ΔRON
V+ = 2.7V, ICOM = 100mA, VNO or VNC = 1.5V
25
-
0.005
0.03
Ω
Full
-
-
0.04
Ω
rON Flatness, RFLAT(ON)
V+ = 2.7V, ICOM = 100mA, VNO or VNC = 0.6V, 1.5V,
2.1V (Note 5)
25
-
0.06
0.1
Ω
Full
-
-
0.12
Ω
25
-2
-
2
nA
Full
-10
-
10
nA
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 3.3V, VCOM = 0.3V, 3V, VNO or VNC = 3V, 0.3V
COM ON Leakage Current,
ICOM(ON)
V+ = 3.3V, VCOM = 0.3V, 3V, or VNO or VNC = 0.3V, 3V,
or Floating
25
-2
-
2
nA
Full
-20
-
20
nA
V+ = 2.7V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 6)
25
-
7.5
11
ns
Full
-
-
13
ns
V+ = 2.7V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 6)
25
-
2.9
7
ns
Full
-
-
9
ns
Full
1
4
-
ns
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
Turn-OFF Time, tOFF
Break-Before-Make Time Delay, tD
V+ = 3.0V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 3, Note 6)
Charge Injection, Q
VG = V+/2, RG = 0Ω, CL = 1.0nF (See Figure 2)
25
-
20
-
pC
OFF Isolation
RL = 50Ω, CL = 5pF, f = 1MHz, VCOM = 1VRMS
(See Figure 4)
25
-
-50
-
dB
Crosstalk (Channel-to-Channel)
RL = 50Ω, CL = 5pF, f = 1MHz, VCOM = 1VRMS
(See Figure 6)
25
-
-50
-
dB
Total Harmonic Distortion
f = 20Hz to 20kHz, VCOM = 2VP-P, RL = 32Ω
25
-
0.006
-
%
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
-
40
-
pF
f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
-
100
-
pF
Full
1.65
-
3.6
V
COM ON Capacitance, CCOM(ON)
POWER SUPPLY CHARACTERISTICS
Power Supply Range
3
FN6086.3
January 19, 2009
ISL84714
Electrical Specifications - 3V Supply
PARAMETER
Test Conditions: V+ = +2.7V to +3.6V, GND = 0V, VINH = 1.4V, VINL = 0.5V (Note 3),
Unless Otherwise Specified. (Continued)
TEST CONDITIONS
Positive Supply Current, I+
V+ = 3.6V, VIN = 0V or V+
TEMP
(°C)
MIN
(Note 7)
TYP
MAX
(Note 7)
UNITS
25
-
0.018
0.05
µA
Full
-
-
0.35
µA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINL
Full
-
-
0.5
V
Input Voltage High, VINH
Full
1.4
-
-
V
Full
-1
-
1
µA
Input Current, IINH, IINL
V+ = 3.6V, VIN = 0V or V+ (Note 6)
NOTES:
3. VIN = input voltage to perform proper function.
4. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
5. Flatness is defined as the difference between maximum and minimum value of ON-resistance over the specified analog signal range.
6. Limits should be considered typical and are not production tested.
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Electrical Specifications - 1.8V Supply
PARAMETER
Test Conditions: V+ = +1.8V, GND = 0V, VINH = 1V, VINL = 0.4V (Notes 3),
Unless Otherwise Specified.
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 7)
Full
0
-
V+
V
25
-
0.75
0.9
Ω
TYP
MAX
(Note 7)
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, rON
V+ = 1.8V, ICOM = 10mA, VNO or VNC = 0.9V
(See Figure 5)
Full
-
-
1
Ω
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 1.8V, VCOM = 0.3V, 1.5V, VNO or VNC = 1.5V, 0.3V
25
-2
-
2
nA
Full
-10
-
10
nA
COM ON Leakage Current,
ICOM(ON)
V+ = 1.8V, VCOM = 0.3V, 1.5V, or VNO or VNC = 0.3V,
1.5V, or Floating
25
-2
-
2
nA
Full
-20
-
20
nA
DYNAMIC CHARACTERISTICS
V+ = 1.8V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 6)
Turn-ON Time, tON
V+ = 1.8V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 6)
Turn-OFF Time, tOFF
25
-
15.6
19
ns
Full
-
-
21
ns
25
-
4.5
9
ns
Full
-
-
11
ns
Break-Before-Make Time Delay, tD
V+ = 1.8V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 3, Note 6)
Full
2
5
-
ns
Charge Injection, Q
VG = V+/2, RG = 0Ω, CL = 1.0nF (See Figure 2)
25
-
15
-
pC
POWER SUPPLY CHARACTERISTICS
VIN = 0V or V+
Positive Supply Current, I+
25
-
0.018
0.05
µA
Full
-
-
0.35
µA
Full
-
-
0.4
V
Full
1
-
-
V
Full
-1
-
1
µA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINL
Input Voltage High, VINH
Input Current, IINH, IINL
VIN = 0V or V+
4
FN6086.3
January 19, 2009
ISL84714
Test Circuits and Waveforms
V+
LOGIC
INPUT
V+
tr < 5ns
tf < 5ns
50%
0V
tOFF
VOUT
VOUT
NO or NC
SWITCH
INPUT
SWITCH
INPUT VNO
COM
IN
90%
SWITCH
OUTPUT
C
90%
LOGIC
INPUT
0V
CL
35pF
RL
50Ω
GND
tON
NOTE: LOGIC INPUT WAVEFORM IS INVERTED FOR SWITCHES THAT
HAVE THE OPPOSITE LOGIC SENSE.
NOTE: REPEAT TEST FOR ALL SWITCHES. CL INCLUDES FIXTURE AND
STRAY CAPACITANCE.
RL
--------------------------V OUT = V
(NO or NC) R + r
L
( ON )
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
SWITCH
OUTPUT
VOUT
RG
ΔVOUT
C
VOUT
COM
NO or NC
V+
LOGIC
INPUT
VG
ON
ON
GND
IN
CL
OFF
0V
LOGIC
INPUT
Q = ΔVOUTxCL
FIGURE 2B. TEST CIRCUIT
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2. CHARGE INJECTION
V+
C
NO
V+
VNX
LOGIC
INPUT
IN
90%
LOGIC
INPUT
CL
35pF
RL
50Ω
0V
SWITCH
OUTPUT
VOUT
VOUT
COM
NC
GND
0V
tD
NOTE: CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
FIGURE 3B. TEST CIRCUIT
FIGURE 3A. MEASUREMENT POINTS
FIGURE 3. BREAK-BEFORE-MAKE TIME
5
FN6086.3
January 19, 2009
ISL84714
Test Circuits and Waveforms (Continued)
V+
V+
C
C
rON = V1/100mA
SIGNAL
GENERATOR
NO or NC
NO or NC
VNX
100mA
IN
0V or V+
COM
ANALYZER
IN
V1
0V or V+
COM
GND
GND
RL
FIGURE 4. OFF ISOLATION TEST CIRCUIT
FIGURE 5. rON TEST CIRCUIT
V+
C
V+
C
50Ω
NO or NC
COM
NO or NC
IN1
SIGNAL
GENERATOR
0V or V+
NC or NO
ANALYZER
IN
0V or V+
IMPEDANCE
ANALYZER
COM
GND
GND
RL
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Detailed Description
Supply Sequencing And Overvoltage Protection
The ISL84714 is a bi-directional, single pole/double throw
(SPDT) analog switch that offers precise switching capability
from a single 1.65V to 3.6V supply with low ON-resistance
(0.44Ω) and high speed operation (tON = 7.5ns, tOFF = 2.9ns).
The device is especially well suited for portable battery
powered equipment due to its low operating supply voltage
(1.65V), low power consumption (1.05µW), low leakage
currents (20nA max), and the tiny SC70 packaging. The ultra
low ON-resistance and rON flatness provide very low insertion
loss and distortion to application that require signal
reproduction.
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (See
Figure 8). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and the input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
6
FN6086.3
January 19, 2009
ISL84714
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (see Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low rON switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 8). These
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
unaffected by this approach, but the switch signal range is
reduced and the resistance may increase, especially at low
supply voltages.
OPTIONAL PROTECTION
DIODE
V+
OPTIONAL
PROTECTION
RESISTOR
INX
VNO or NC
VCOM
GND
OPTIONAL PROTECTION
DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes
negative in this configuration.
Logic-Level Thresholds
This switch family is 1.8V CMOS compatible (0.5V and 1.4V)
over a supply range of 2V to 3.6V (see Figure 15). At 3.6V
the VIH level is about 1.1V. This is still below the 1.8V CMOS
guaranteed high output minimum level of 1.4V, but noise
margin is reduced.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat even past
90MHz (see Figure 16). The frequency response is very
consistent over a wide V+ range, and for varying analog
signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. OFF Isolation
is the resistance to this feedthrough, while crosstalk
indicates the amount of feedthrough from one switch to
another. Figure 17 details the high OFF Isolation and
crosstalk rejection provided by this family. At 1MHz, Off
Isolation is about 50dB in 50Ω systems, decreasing
approximately 20dB per decade as frequency increases.
Higher load impedances decrease OFF Isolation and
crosstalk rejection due to the voltage divider action of the
switch OFF impedance and the load impedance.
Leakage Considerations
Power-Supply Considerations
The ISL84714 construction is typical of most single supply
CMOS analog switches, in that they have two supply pins:
V+ and GND. V+ and GND drive the internal CMOS
switches and set their analog voltage limits. Unlike switches
with a 4V maximum supply voltage, the ISL84714 4.8V
maximum supply voltage provides plenty of room for the
10% tolerance of 3.6V supplies, as well as room for
overshoot and noise spikes.
The minimum recommended supply voltage is 1.65V but the
part will operate with a supply below 1.5V. It is important to
note that the input signal range, switching times, and
ON-resistance degrade at lower supply voltages. Refer to
the “Electrical Specifications” Table beginning on page 3 and
“Typical Performance Curves” on page 8 for details.
V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to switched
V+ and GND signals to drive the analog switch gate
terminals.
7
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the
analog-signal-path leakage current. All analog leakage
current flows between each pin and one of the supply
terminals, not to the other switch terminal. This is why both
sides of a given switch can show leakage currents of the
same or opposite polarity. There is no connection between
the analog signal paths and V+ or GND.
FN6086.3
January 19, 2009
ISL84714
Typical Performance Curves TA = +25°C, Unless Otherwise Specified
0.65
1.1
V+ = 2.7V
ICOM = 100mA
ICOM = 100mA
1.0
V+ = 1.5V
0.60
0.9
0.55
rON (Ω)
rON (Ω)
0.8
0.7
0.6
0.50
+85°C
0.45
+25°C
V+ = 1.8V
0.40
0.5
V+ = 2.7V
0.4
V+ = 3.6V
-40°C
0.35
V+ = 3V
0.30
0.3
0
1
2
3
0
4
0.5
1.0
1.5
2.0
2.5
3.0
VCOM (V)
VCOM (V)
FIGURE 10. ON-RESISTANCE vs SWITCH VOLTAGE
FIGURE 9. ON-RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
60
0.8
V+ = 1.8V
ICOM = 10mA
+85°C
40
0.7
V+ = 3V
20
+25°C
V+ = 1.8V
Q (pC)
rON (Ω)
0.6
-40°C
0.5
0
-20
0.4
-40
0.3
-60
0
0.5
1.0
1.5
2.0
0
0.5
1.0
VCOM (V)
FIGURE 11. ON-RESISTANCE vs SWITCH VOLTAGE
2.0
2.5
3.0
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
30
7
25
6
20
5
tOFF (ns)
tON (ns)
1.5
VCOM (V)
15
+85°C
4
+85°C
+25°C
10
3
-40°C
+25°C
-40°C
5.0
1.0
1.5
2.0
2.5
3.0
V+ (V)
3.5
4.0
FIGURE 13. TURN-ON TIME vs SUPPLY VOLTAGE
8
4.5
2
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
V+ (V)
FIGURE 14. TURN-OFF TIME vs SUPPLY VOLTAGE
FN6086.3
January 19, 2009
ISL84714
Typical Performance Curves TA = +25°C, Unless Otherwise Specified (Continued)
1.3
V+ = 1.8V to 3.6V
1.1
VINH AND VINL (V)
1.0
VINH
0.9
0.8
GAIN
0
-20
PHASE
0
0.7
20
VINL
0.6
40
0.5
60
0.4
0.3
1.0
80
RL = 50Ω
VIN = 0.2VP-P to 2.8VP-P (V+ = 3.0V)
1.5
2.0
2.5
3.0
3.5
4.0
4.5
1
10
V+ (V)
100
PHASE (DEGREES)
NORMALIZED GAIN (dB)
1.2
300
FREQUENCY (MHz)
FIGURE 16. FREQUENCY RESPONSE
FIGURE 15. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
0
0
-10
10
-20
20
-30
30
-40
40
ISOLATION
-50
50
-60
60
CROSSTALK
-70
70
-80
80
-90
90
-100
1k
10k
100k
1M
10M
OFF ISOLATION (dB)
CROSSTALK (dB)
V+ = 1.8V to 3.6V
100
100M 500M
FREQUENCY (Hz)
FIGURE 17. CROSSTALK AND OFF ISOLATION
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT: 57
PROCESS:
Submicron CMOS
9
FN6086.3
January 19, 2009
ISL84714
Small Outline Transistor Plastic Packages (SC70-6)
0.20 (0.008) M
P6.049
VIEW C
C
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
CL
INCHES
e
b
SYMBOL
6
5
4
CL
CL
E1
E
1
2
3
e1
C
D
CL
A
A2
SEATING
PLANE
A1
-C-
WITH
b
PLATING
b1
c
c1
MILLIMETERS
MAX
MIN
MAX
NOTES
A
0.031
0.043
0.80
1.10
-
A1
0.000
0.004
0.00
0.10
-
A2
0.031
0.039
0.00
1.00
-
b
0.006
0.012
0.15
0.30
-
b1
0.006
0.010
0.15
0.25
c
0.003
0.009
0.08
0.22
6
c1
0.003
0.009
0.08
0.20
6
D
0.073
0.085
1.85
2.15
3
E
0.071
0.094
1.80
2.40
-
E1
0.045
0.053
1.15
1.35
3
e
0.0256 Ref
0.65 Ref
-
e1
0.0512 Ref
1.30 Ref
-
L
0.10 (0.004) C
MIN
0.010
0.018
0.26
0.46
L1
0.017 Ref.
0.420 Ref.
L2
0.006 BSC
0.15 BSC
N
6
6
4
5
R
0.004
-
0.10
-
R1
0.004
0.010
0.15
0.25
α
0o
8o
0o
8o
Rev. 2 9/03
NOTES:
BASE METAL
1. Dimensioning and tolerance per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO203AB.
4X θ1
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
R1
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
R
GAUGE PLANE
SEATING
PLANE
L
C
L1
α
L2
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only
4X θ1
VIEW C
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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10
FN6086.3
January 19, 2009
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