an1763

Application Note 1763
Author:Jun Liu
ISL85402EVAL1Z Evaluation Board Setup Procedure
The ISL85402EVAL1Z board is to demonstrate the
synchronous/asynchronous buck or boost buck operation of
ISL85402.
The ISL85402EVAL1Z board input voltage range is 3V to 36V.
The output voltage is set to 5V and can be changed by voltage
feedback resistors. Note to change the output voltage higher, the
output capacitors’ voltage rating needs to be checked.
The board output current is 2A typical. The board is set with
default 3.6A overcurrent threshold. the OC threshold can be
programmed by the resistor at the ILIMIT pin.
The ISL85402EVAL1Z board has setting options to be configured
to synchronous buck, asynchronous buck, boost-buck topologies,
forced PWM mode or PFM mode.
The board is set to default frequency 500kHz. The frequency can
be programmed by the resistor at the FS pin.
The board can be synchronized to external clock. Multiple
ISL85402EVAL1Z boards can be synchronized simply by
connecting their SYNC pins together.
Recommended Equipment
• 0V to 36V power supply with at least 5A source current
capability
• Load capable of sinking current up to 3A
• Multimeters
• Oscilloscope
Input and Output Connectors
The board has 2 main circuits sections - buck and boost as
shown in Figure 1.
1. For synchronous/asynchronous buck, the inputs are J1 (VIN+)
and J2 (GND). The outputs are J3 (VOUT+) and J4 (GND).
2. For boost buck operation, the boost inputs are J5
(VIN_BOOST+) and J6 (GND) and the boost output positive
terminal is J7 (VOUT_BOOST+). By shorting J26 and J27, the
boost outputs are connected to inputs of the buck. The output
of the buck is still J3 (VOUT+) and J4 (GND).
Boost
Buck
FIGURE 1. ISL85402EVAL1Z BOARD IMAGE
June 18, 2012
AN1763.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright Intersil Americas Inc. 2012. All Rights Reserved.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
Application Note 1763
Board Setup and Start-up
Sequence
Synchronous Buck
1. Ensure J21 is shorted for non-boost mode.
2. The MODE and GND pins of J17 are shorted for forced PWM
mode (no PFM). If PFM mode is desired, short MODE and VCC
pins of J17 or leave MODE pin floating.
3. J9 is shorted to have AUXVCC connected to VOUT. If AUXVCC
switch-over function is not desired, open J9 and short J10.
4. J20 is shorted to have R11 shorted. R11 is only for loop
measurement purposes.
5. Leave all the other jumper connectors open.
6. Connect the power source to inputs J1(VIN+) and J2(GND).
Connect the load terminals to buck outputs J3 (VOUT+) and J4
(GND). Make sure the setup is correct prior to applying any
power or load to the board.
7. Connect the power source to inputs J1 (VIN+) and J2 (GND).
Connect the load terminals to buck outputs J3 (VOUT+) and J4
(GND). Make sure the setup is correct prior to applying any
power or load to the board.
8. Adjust the power source to 12V and turn on it.
9. Verify the output voltage is 5V and use oscilloscope to monitor
the phase node waveforms (J19).
Asynchronous Buck
1. Ensure J21 is shorted for non-boost mode.
2. The MODE and GND pins of J17 are shorted for forced PWM
mode (no PFM). If PFM mode is desired, short MODE and VCC
pins of J17 or leave MODE pin floating.
3. J9 is shorted to have AUXVCC connected to VOUT. If AUXVCC
switch-over function is not desired, open J9 and short J10.
4. J20 is shorted to have R11 shorted. R11 is only for loop
measurement purposes.
5. Remove R19. Change R20 (on bottom of the board) to 0Ω to
keep Q1 securely off.
6. Leave all the other jumper connectors open.
7. Connect the power source to inputs J1(VIN+) and J2(GND).
Connect the load terminals to buck outputs J3(VOUT+) and
J4(GND). Make sure the setup is correct prior to applying any
power or load to the board.
8. Adjust the power source to 12V and turn on it.
9. Verify the output voltage is 5V and use oscilloscope to monitor
the phase node waveforms (J19).
2
Boost Buck
1. Remove R19 and leave it open. Change R20 (on bottom of the
board) to keep Q1 securely off.
2. Put 0Ω resistor at R22 to set up LGATE to drive the boost
switch Q2.
3. Short jumpers J26 and J27 to connect boost outputs to buck
inputs.
4. Open J21 and short J28 to set the IC in boost mode. R17 and
R18 are used to set up the boost on/off threshold divided
from boost input. With R17 = 130kΩ and R18 = 1MΩ, the
boost will start to operate when VIN_BOOST+(J5) voltage
drops below 7V; and the boost will stop switching when boost
input recovers to be above 10V.
5. Open J9 and J10, and short J8 to set up the boost output
overvoltage protection. R24 and R25 are used to set up the
boost on/off OVP threshold. With 1MΩ at R24 and 42.2kΩ at
R25, the boost PWM will be turned off when boost output
voltage reaches 25V and recovers switching when it drops
below 22V.
6. J20 is shorted to have R11 shorted. R11 is only for loop
measurement purposes.
7. Leave all the other jumper connectors open.
8. Short J11 to disable the IC prior to applying the power source
to boost inputs.
9. Connect the power source to boost inputs J5 (VIN_BOOST+) and
J6 (GND). Connect the load terminals to buck outputs J3
(VOUT+) and J4(GND). Make sure the setup is correct prior to
applying any power or load to the board.
10. Adjust the power source to 12V and turn on the power source.
11. Open J11 to enable the IC.
12. Verify the buck output voltage is 5V. Use oscilloscope to monitor
the buck phase node waveforms (J19) and the boost phase
node waveforms (J32).
13. Adjust the input voltage down to 5V to start-up the boost. Note
the boost input voltage cannot be too low and it is limited by
the current ratings of the boost switch and boost inductor. The
boost input current will increase upon the decrease of boost
input voltage. The input current should be estimated before
turning the input voltage extremely low under heavy load
(refer to the boost operation description section in datasheet
for more details).
14. The shutdown sequence must be in the following order: short
J11 to shut down the IC first, then turn off the power source at
boost input. To turn off the power source (boost input) first
with the circuits operating at boost mode could cause boost
MOSFET and IC damages resulting from the current stress at
boost switches and inductors. In designs to use boost mode,
the same shutdown sequence must be followed.
AN1763.0
June 18, 2012
Application Note 1763
TABLE 1. CONNECTORS/TEST POINTS DESCRIPTIONS
J1
VIN+, positive terminal of buck inputs.
J2
GND, ground terminal of buck inputs.
J3
VOUT+, positive terminal of buck outputs.
J4
GND, ground terminal of buck outputs.
J5
VIN_BOOST+, positive terminal of boost inputs.
J6
GND, ground terminal of boost inputs.
J7
VOUT_BOOST+, positive terminal of boost output.
J8
In boost buck mode, with J8 shorted, the AUXVCC pin monitors the boost output voltage through R24 and R25 for over-voltage protection.
J9
With J9 shorted, VOUT+ is connected to AUXVCC for the switchover function. The IC switches over from main LDO to auxiliary LDO after
VOUT+ built up.
J10
Use this connector to apply any voltage to AUXVCC as the AUXLDO input. Short it to ground when not using AUXVCC.
J11
Use this connector to control IC ON/OFF.
J12
Use it to set up switching frequency. With FS pin connected to VCC or GND, or left open, the IC has default 500kHz frequency. R8 is a
placeholder for a resistor to program frequency.
J13
Test point connector to monitor the SS pin. Monitoring purpose only and don’t short it with jumper.
J14
Test point connector to monitor the FB pin. Monitoring purpose only and don’t short it with jumper.
J15
Test point connector to monitor the COMP pin. Monitoring purpose only and don’t short it with jumper.
J16
Use it to set up the over current limit threshold. With ILIMIT pin connected to VCC or GND, or left open, the IC has default 3.6A OC
threshold. R15 is a placeholder for a resistor to program the OC threshold.
J17
Mode setup connector. To connect MODE pin to GND will set the IC in forced PWM mode; to leave MODE pin open or connected to VCC
set the IC to have PFM available under light load condition and the IC has default 0.7A PFM current threshold. R16 is a placeholder for a
resistor to program the PFM current threshold.
J18
Test point connector to monitor the PGOOD pin. Monitoring purpose only and don’t short it with jumper.
J19
Test point connector to monitor the buck PHASE node. Monitoring purpose only and don’t short it with jumper.
J20
Test point connector for loop measurement. Short it to have R11 shorted when it is not used.
J21, J28
Connectors to set up the boost operation.
Option 1: to short J21 set the IC in non-boost mode (either synchronous or asynchronous buck mode).
Option 2: to open J21 and short J28 set the IC in boost mode. A voltage higher than 0.2V on EXT_BOOST pin before VCC POR ON latches
the IC in boost buck mode at startup.
J22
Use it to configure synchronization.
Option 1: to apply external clock for the IC to be synchronized with.
Option 2: to synchronize multiple ISL85402, simply connect those SYNC pins together.
J23
Test point connectors to monitor the LGATE. Monitoring purpose only and don’t short it with jumper.
J24
Short it in asynchronous buck configuration before startup to disable the low-side driver.
J25
Test point connector to monitor the boost output. Monitoring purpose only and don’t short it with jumper.
J26, J27
Shorting these connectors with jumpers will connect the boost outputs to buck inputs.
J29
Test point connector to monitor the buck output. Monitoring purpose only and don’t short it with jumper.
J30
Test point connector to monitor the buck input. Monitoring purpose only and don’t short it with jumper.
J31
Test point connector to monitor the boost input. Monitoring purpose only and don’t short it with jumper.
J32
Test point connectors to monitor the boost phase node. Monitoring purpose only and don’t short it with jumper.
3
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Application Note 1763
TABLE 1. BILL OF MATERIALS
REF DES
PART NUMBER
QTY
DESCRIPTION
MANUFACTURER
C57, C59
EEE-FK1K220P
2
CAP, SMD, 8X10.2, 22µF, 80V, 20%, ALUM.ELEC., ROHS
PANASONIC
C1
VARIOUS
1
CAP, SMD, 0805, 4.7µF, 10V, 10%, X7R, ROHS
VARIOUS
C18, C19, C22, C25
VARIOUS
4
CAP, SMD, 1206, 2.2µF, 50V, 10%, X7R, ROHS
VARIOUS
C9
VARIOUS
1
CAP, SMD, 0603, 10pF, 50V,5%, C0G, ROHS
VARIOUS
C8, C28
VARIOUS
2
CAP, SMD, 0603, 100pF, 50V, 5%, C0G, ROHS
VARIOUS
C20
VARIOUS
1
CAP, SMD, 0603, 0.01µF, 16V,10%, X7R, ROHS
VARIOUS
C2, C16, C23, C24
VARIOUS
4
CAP, SMD, 0603, 0.1µF, 50V, 10%, X7R, ROHS
VARIOUS
C3
VARIOUS
1
CAP, SMD, 0603, 1.0µF, 10V, 10%, X7R, ROHS
VARIOUS
C15
VARIOUS
1
CAP, SMD, 0603, 12000pF, 50V, 10%, X7R, ROHS
VARIOUS
C4
VARIOUS
1
CAP, SMD, 0603, 0.022µF, 16V, 10%, X7R, ROHS
VARIOUS
C7
VARIOUS
1
CAP, SMD, 0603, 470pF, 50V, 10%, X7R, ROHS
VARIOUS
C17, C26, C27
DNP
0
CAP, SMD, 0603, DNP-PLACE HOLDER, ROHS
N/A
C14
DNP
0
CAP, SMD, 0805, DNP-PLACE HOLDER, ROHS
N/A
C5
VARIOUS
1
CAP, SMD, 1210, 10µF, 25V, 10%, X7R, ROHS
VARIOUS
C6
DNP
0
CAP, SMD, 1210, DNP-PLACE HOLDER, ROHS
N/A
C58
16SVPD82M
1
CAP-OSCON, SMD, 6.9x8.3, 82µF, 16V, 20%, 40mΩ, ROHS
SANYO
L1
DR125-100-R
1
COIL-PWR INDUCTOR, SMD, 12.5mm, 10µH, 20%, 5.35A, ROHS
COOPER/COILTRONICS
L2
DR125-6R8-R
1
COIL-PWR INDUCTOR, SMD, 12.5mm, 6.8µH, 20%, 6.64A, ROHS
COOPER/COILTRONICS
D1, D3
SS3P6LHM3/86A
2
DIODE-SCHOTTKY RECTIFIER, SMD, SMPC, 60V, 3A, ROHS
VISHAY
U1
ISL85402IRZ
1
IC-SWITCHING REGULATOR, 20P, QFN, 4X4, ROHS
INTERSIL
Q1, Q2
BSZ100N06LS3G
2
TRANSIST-MOS, N-CHANNEL, 8P, PG-TSDSON-8, 60V, 20A, ROHS
INFINEON TECHNOLOGY
R11
VARIOUS
1
RES, SMD, 0603, 10Ω, 1/10W, 1%,TF, ROHS
VARIOUS
R6, R19
VARIOUS
2
RES, SMD, 0603, 0Ω, 1/10W, ROHS
VARIOUS
R18, R24
VARIOUS
2
RES, SMD, 0603, 1M, 1/10W, 1%, TF, ROHS
VARIOUS
R17
VARIOUS
1
RES, SMD, 0603, 130k, 1/10W, 1%,ROHS
VARIOUS
R2
VARIOUS
1
RES, SMD, 0603, 220k, 1/10W, 1%, ROHS
VARIOUS
R3
VARIOUS
1
RES, SMD, 0603, 232k, 1/10W, 1%,ROHS
VARIOUS
R7
VARIOUS
1
RES, SMD, 0603, 33.2k, 1/10W, 1%,ROHS
VARIOUS
R25
VARIOUS
1
RES, SMD, 0603, 42.2k, 1/10W, 1%,ROHS
VARIOUS
R4
VARIOUS
1
RES, SMD, 0603, 44.2k, 1/10W, 1%,ROHS
VARIOUS
R5, R20, R23
VARIOUS
3
RES, SMD, 0603, 5.11k, 1/10W, 1%,ROHS
VARIOUS
R8, R15, R16, R22
N/A
0
RES, SMD, 0603, DNP-PLACE HOLDER, ROHS
N/A
R1, R26
N/A
0
RES, SMD, 0805, DNP-PLACE HOLDER, ROHS
N/A
4
AN1763.0
June 18, 2012
ISL85402EVAL1Z Evaluation Board Schematic
TP13
3
2
BSZ100N06LS3G
J7
1
J25
C24
0.1UF
C19
2.2UF
C18
2.2UF
5
C15
4
J32
6
DNP
7
3
R26
2
1
VOUT_BOOST+
SS3P6LHM3
2
J26
1
E
E
VIN+
VIN+
R4
R3
44.2K
232K
C2
2
1
E
J20
VOUT+
2
IN
VCC
LGATE
IN
R11
R2
1
220K
J18
7
R18
1M
R17
L1
R19
0
R20
E
0.1UF
C16
1
82UF
C58
E
GND
J4
J29
TP1
TP2
GND
E
ISL85402EVAL1Z
5
A
2
1
5.11K
2
J3
2
C6
5
OPEN
4
BSZ100N06LS3G
C5
6
10UF
7
C17
2
3
VOUT+
10.0UH
HRDWR ID
6
B
+5V/2A
VOUT+
2
OPEN
8
R1
1
10
8
130K
DR125-100-R
1
E
E
1
IN
2
PHASE
PHASE
E
VIN_BOOST+
2
E
1
DNP
3
J28
1
J19
C27
1
E
J21
100PF
0
C28
R6
2
SS3P6LHM3
E
3
D1
J16
MODE
C7
470PF
R16
DNP
J17
ILIM
R5
1
J22
Q1
DNP
1
5.11K
2
10
9
PGOOD
8
6
EXT
BOOST
1
E
SYNC
11 EXT_BOOST
R15
E
LGATE
J23
12
OPEN
2
2
J15
0.1UF
2
J24
1
LGATE
SYNC
E
PGND
13
E
1
A
1
VIN+
17
18
16
14
ISL85402IRZ
EP
E
VIN
VIN
BOOT
PGND
LGATE
C3
COMP
BOOT
1UF
5
SGND
FB
U1
ILIMIT
MODE
C20
J10
1
AUXVCC
VCC
20
19
VCC
AUXVCC
4
DNP
OUT
FB
E
E
SS
E
2
2
FS
3
C
1N4148W-7-F
15
PHASE
R7
1
EN
2
33.2K
E
J14
D2
OPEN
ILIMIT
MODE
PGOOD
C9
E
1
21
10PF
E
C8
C4
SS
100PF
DNP
R8
1
2
0.022UF
1
EN
FS
SS
FB
COMP
J11
E
B
2
7
3
1
E
E
VOUT+
J13
0.1UF
E
0.01UF
2
2
J9
1
E
IN
J12
2
C1
1M
E
E
2
C23
C14
VCC
FS
4.7UF
2
J8
R25
GND
IN
2.2UF
4
3
FIGURE 2. ISL85402EVAL1Z EVALUATION BOARD SCHEMATIC
2
REV.
C1
SHEET
1
1
OF
1
Application Note 1763
TP11
VCC
C22
VCC
1
J30
1
22UF
EEEFK1K220P
R24
2
C
TP10
2
1
C57
OUT
VOUT_BOOST+
42.2K
5
E
D
2
J27
E
E
E
IN
J2
8
C26
2
1
DNP
1
OPEN
E
R22
LGATE
J6
GND
4
Q2
IN
J31
2.2UF
C25
2
6.8UH
DR125-6R8-R
2
1
C59
5
D3
R23
1
TP12
22UF
EEEFK1K220P
J1
6
L2
5.11K
J5
D
7
0.012UF
8
VIN_BOOST+
AN1763.0
June 18, 2012
Application Note 1763
ISL85402EVAL1Z Layout
FIGURE 3. SILKSCREEN TOP COMPONENTS
FIGURE 4. TOP LAYER
FIGURE 5. 2 nd LAYER
FIGURE 6. 3 rd LAYER
FIGURE 7. BOTTOM LAYER
FIGURE 8. SILKSCREEN BOTTOM COMPONENTS
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June 18, 2012
Application Note 1763
ISL85402EVAL1Z Layout
FIGURE 9. TOP COMPONENT ASSEMBLY
(Continued)
FIGURE 10. BOTTOM COMPONENT ASSEMBLY (MIRRORED)
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
7
AN1763.0
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