an1736

Application Note 1736
ISL9307 Evaluation Board
Evaluation Board Features
Required Equipment
• Input voltage rating from 2.5V to 5.5V
• Power supply capable of delivering up to 5.5V and 3A
• Two 1.5A buck converters
• Electronic load
• Two 300mA LDOs
• Voltmeter, Oscilloscope
• Enable control for power sequencing
• 3MHz switching frequency
• Connector, test point and jumper
P4
P1
L1
VINDCD1
13
14
C6A
PLACE HOLDER
SW2
GNDDCD2
1
GNDDCD1
SW1
C1
10µF/16V/X7R
VINDCD2
C2
10µF/16V/X7R
12
2
J2
3
2
1
P5
R4 49.9k
VIN
ENLDO2
E-PAD
C8
10
C10
GENERIC
47pF
R3
100k
9
VIN
J3
1
2
3
HDR3
8
5
HDR3
VOLDO2
3
2
1
GNDLDO
ENLDO1
7
VIN
VOLDO1
4
J1
ENDCD2
ENDCD1
6
C9
3
R2
100k
17
47pF
VINDCD2
11
ISL9307
GENERIC
VINLDO
FB2
FB1
VINLDO
C7
P3
C12
0.1µF
C11
0.1µF
VODCD1 = 3.3V
R1 316k
VODCD2
1.5µH
1
P2
VINDCD1
15
1.5µH
C5A
PLACE HOLDER
C6
4.7µF/16V/X7R
L2
16
C5
4.7µF/16V/X7R
VODCD1
VIN
J4
1
2
3
HDR3
HDR3
P6
VOLDO2
C14
P8
1µF/16V/X7R
C13
1µF/16V/X7R
VOLDO1
C15
1µF/16V/X7R
FOR FIXED OUTPUT, POPULATE RESISTOR R1/R4 WITH AN ZERO OHM RESISTOR AND LEAVE R2/R3 OPEN.
FIGURE 1. ISL9307 EVALUATION BOARD SCHEMATIC
March 30, 2012
AN1736.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright Intersil Americas Inc. 2012. All Rights Reserved.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
Application Note 1736
Quick Setup Guide
1. Install jumpers on J5, J6, JP7.
2. Install jumpers on J1, J2, J3, J4 to tied enable pins to VIN on
each channel.
3. Connect power supply to VIN and GND, with voltage setting at
3.6V.
4. Connect electronic loads at VODCD1, VODCD2, with load
setting up to 1.5A.
5. Connect electronic loads at VOLDO1, VOLDO2, with current
setting up to 300mA.
6. Place scope probes at 4 outputs.
7. Turn on the power supply.
CH1: VOLDO1 (1V/DIV),
CH2: VODCD1 (2V/DIV),
CH3: VODCD2 (2V/DIV),
CH4: VOLDO2 (1V/DIV)
8. Monitor 4 channel power sequencing. The waveforms will
look similar to Figure 2.
9. Turn on the electronic loads at all outputs.
10. Measure the output voltages with voltmeter. The voltages
should regulate within the datasheet spec limit (FN7931).
FIGURE 2. 4-CHANNEL POWER UP AFTER ENABLE
Evaluation Board Layout
FIGURE 3. ISL9305 EVALUATION BOARD SILKSCEEN TOP
2
March 30, 2012
AN1736.0
Application Note 1736
Evaluation Board Layout (Continued)
FIGURE 4. ISL9307 EVALUATION BOARD TOP COPPER
FIGURE 5. ISL9307 EVALUATION BOARD MIDLAYER 1 (VIN)
3
March 30, 2012
AN1736.0
Application Note 1736
Evaluation Board Layout (Continued)
FIGURE 6. ISL9307 EVALUATION BOARD MIDLAYER 2 (PGND)
FIGURE 7. ISL9307 EVALUATION BOARD BOTTOM LAYER (AGND)
4
March 30, 2012
AN1736.0
Application Note 1736
TABLE 1. ISL9307 EVALUATION BOARD BILL OF MATERIALS
ITEM#
QTY
DESIGNATOR
PART TYPE
FOOTPRINT
DESCRIPTION
VENDORS
1
1
U1
ISL9307
L16.4x4 TQFN
2
2
L1, L2
1.5µH
3x3x1.55
CDRH2D14NP-1R5NC
SUMIDA
3
4
C1, C2, C5, C6
10µF/10V/X7R
805
GRM21BR71A106KE51L
MURATA
4
3
C13, C14, C15
1µF/16V/X7R
805
C2012X7R1C105K
TDK
5
2
C7, C8
47PF/16V/X7R
603
C1608C0G1H470J
TDK
6
2
C5A, C6A
(Place holder)
805
Capacitor, 10V rating is OK
7
2
C9, C10
(Place holder)
603
Capacitor, 10V rating is OK
8
2
C11, C12
0.1µF/50V
603
GRM188R71H104KA93D
MURATA
9
1
R1
316kΩ, 1%, SMD
603
CR0603-16W-3163FT
VENKEL
Intersil ISL9307
10
1
R4
49.9kΩ, 1%, SMD
603
CR0603-16W-4992FT
VENKEL
11
2
R2, R3
100kΩ, 1%, SMD
603
CR0603-16W-1003T
VENKEL
12
1
R5
0
603
CR0603-16W-000T
VENKEL
13
5
J5 - J9
HDR2
Jumper-2 pin
538-22-28-4360
MOLEX
14
4
J1, J2, J3,J4
HDR3
Jumper-3 pin
538-22-28-4360
MOLEX
15
16
P1 - P16
GOLD PIN
POWER POST
3156-1-00-15-00-00-08-0
MILL-MAX
16
4
TP1 - TP4
HDR2
Jumper-2 pin
538-22-28-4360
MOLEX
TABLE 2. DESCRIPTION OF CONNECTORS AND TEST POINTS
TEST
POINT(S)
DESCRIPTION
TABLE 3. DESCRIPTION OF JUMPERS
JUMPER
DESCRIPTION
J1
Jumper installed to connect ENDCD1 to high to enable DCD1
and low to disable.
J2
Jumper installed to connect ENDCD1 to high to enable DCD2
and low to disable.
J3
Jumper installed to connect ENLDO1 to high to enable LDO1
and low to disable.
J4
Jumper installed to connect ENLDOs to high to enable LDO2
and low to disable.
P1
VODCD1 (Output of DCD1 buck converter)
P2
VINDCD1 (Input of DCD1 buck converter)
P3
VINDCD2 (Input of DCD2 buck converter)
P4
VODCD2 (Output of DCC2 buck converter)
P5
VINLDO (Input of LDO1 and LDO2)
P6
VOLDO2 (Output of LDO2)
P7
VIN (Power supply input for EVB)
J5
Jumper installed to tie VINDCD1 to VIN
P8
VOLDO1 (Output of LDO1)
J6
Jumper installed to tie VINDCD2 to VIN
JP7
Jumper installed to tie VINLDO to VIN
J8
Jumper installed to short VOLDO1 to ground
J9
Jumper installed to short VOLDO2 to ground
P9, P10, P11, GND (Ground)
P12, P13,
P15, P16
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
5
March 30, 2012
AN1736.0
Similar pages