an1551

Application Note 1551
ISL9440AEVAL1Z: Triple PWM Step-Down
Synchronous Buck Controller and One LDO
ISL9440AEVAL1Z Evaluation
Board
The ISL9440AEVAL1Z evaluation board features the
ISL9440A. The ISL9440A is a a quad-output controller
that integrates three PWM synchronous buck controllers
and one low-dropout linear regulator controller. The
ISL9440A offers internal soft-start, independent enable
functions and integrates UV/OV/OC/OT protection. Its
current mode control architecture and internal
compensation network keep peripheral component
count minimal. Switching frequency of 600kHz
minimizes inductor size while the strong gate drivers
deliver up to 12A to each PWM channel.
Table 1 shows the difference in terms of ISL944xx family
features.
TABLE 1. FEATURES OF ISL944xx FAMILY
EARLY
WARNING
SWITCHING
FREQUENCY
(kHz)
SOFT-STARTING
TIME
(ms)
ISL9440
Yes
300
1.7
ISL9440A
Yes
600
1.7
ISL9441
No
300
1.7
ISL9440B
Yes
300
Programmable
ISL9440C
Yes
600
Programmable
PART
NUMBER
The ISL9440AEVAL1Z is easy to set up to evaluate the
performance of the ISL9440A. Please refer to the
“Electrical Specifications” table on page 2 for typical
performance summary.
FIGURE 1. ISL9440AEVAL1Z EVALUATION BOARD
March 5, 2010
AN1551.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright Intersil Americas Inc. 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Application Note 1551
Electrical Specifications
Recommended operation conditions unless otherwise noted. Refer to the “Schematic” on
page 7 and “Typical Evaluation Board Performance Curves” on page 4.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
6.0
12
16
V
VOUT1
0.97
1.00
1.03
V
VOUT2
3.25
3.32
3.4
V
VOUT3
4.85
5.0
5.15
V
VOUT4
2.43
2.50
2.57
V
6
7
A
6
7
A
4
5
A
0.8
1.0
A
VIN
All outputs are in regulation
VIN = 12V, TA = +25°C, No forced airflow, all
three PWM outputs are fully loaded
PWM1 Rated Current
PWM2 Rated Current
PWM3 Rated Current
LDO Rated Current
R7 = 0Ω, R4 is not populated
VOUT1 Peak-to-Peak Ripple
VIN = 12V, all three PWM outputs are fully loaded,
oscilloscope is with full bandwidth
VOUT2 Peak-to-Peak Ripple
VOUT3 Peak-to-Peak Ripple
What’s Inside
19.4
mVP-P
36.6
mVP-P
32.2
mVP-P
Quick Test Guide
The Evaluation Board Kit contains the following
materials:
• The ISL9440AEVAL1Z
• The ISL9440, ISL9440A, ISL9441 datasheet FN6383
• This Evaluation Board Kit document (AN1551)
Recommended Equipment
The following materials are recommended to perform
testing:
• 0V to 20V Power Supply with at least 10A source
current capability
• Three electronic loads capable of sinking current up
to 7A
1. Ensure that the circuit is correctly connected to the
supply and electronic loads prior to applying any
power. Please refer to Figure 2 for proper set-up.
2. Connect Jumpers J3, J4 and J5 in the ENx positions.
3. Turn on the power supply.
4. Adjust input voltage VIN within the specified range
and observe output voltage. The output voltage
variation should be within 3%.
5. Adjust load current within the specified range and
observe output voltage. The output voltage
variation should be within 3%.
6. Use oscilloscope to observe output voltage ripple
and phase node ringing. For accurate measurement,
refer to Figure 3 for proper test set-up.
• Digital Multimeters (DMMs)
• 100MHz Quad-Trace Oscilloscope
• Signal Generator (for load transient tests)
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Application Note 1551
FIGURE 2. PROPER TEST SET-UP
OUTPUT
CAP
OUTPUT
OUTPUT
CAP
CAP
OR MOSFET
OR
MOSFET
FIGURE 3. PROPER PROBE SET-UP TO MEASURE
OUTPUT RIPPLE AND PHASE NODE
RINGING
Load Transient Circuit Set-Up
1. Select a SOIC8 N-Channel MOSFET with VDS
breakdown >20V.
4. R26, R23 and R24 are current sensing resistors to
monitor the load step. For accurate measurement,
please use 5% tolerance sensing resistor or better.
To alleviate thermal stress, use 0.1Ω or smaller
resistance. The resistance of the sensing resistors
sets the current scale on the oscilloscope.
5. Apply pulse square waveform across R27, R22 or
R25. The duty cycle of the pulse waveform should be
small (<5%) to limit thermal stress on current
sensing resistor and the MOSFETs (M8, M6 or M7).
6. The amplitude of the clock sets the current step
amplitude. Adjust the clock amplitude and slew rate
to set the current step and slew rate.
7. Monitor overshoot and undershoot at corresponding
output.
2. Install the load transient circuit as indicated on the
schematic. Refer to Figure 4 for detail.
3. R27, R22 and R25 are 10kΩ resistors for discharging
the MOSFET gates.
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Application Note 1551
.
OPT. LOAD TRAN.
OPT
R27
OPT
M8
R26
OPT
FIGURE 4. LOAD TRANSIENT CIRCUIT FOR PWM1
Typical Evaluation Board Performance Curves
100
85 VIN = 9V
95
80
90
EFFICIENCY (%)
EFFICIENCY (%)
90
VIN = 12V
75
VIN = 16V
70
65
60
55
70
65
55
3
4
5
LOAD CURRENT (A)
7
6
50
8
0
1
2
4
5
3
LOAD CURRENT (A)
6
FIGURE 5. PWM1 EFFICIENCY vs LOAD (VO = 1.0V)
FIGURE 6. PWM2 EFFICIENCY vs LOAD (VO = 3.3V)
100
1.010
95
VIN = 9V
85
VIN = 12V
OUTPUT VOLTAGE
90
EFFICIENCY (%)
75
45
2
VIN = 16V
VIN = 12V
80
60
1
VIN = 9V
85
50
40
0
VIN = 12V,
Unless Otherwise Noted.
VIN = 16V
80
75
70
65
60
7
1.005
VIN = 16V
1.000
VIN = 12V
0.995
VIN = 9V
55
50
0
1
2
3
4
LOAD CURRENT (A)
FIGURE 7. PWM3 EFFICIENCY vs LOAD (VO = 5.0V)
4
5
0.990
0
2
4
6
8
LOAD CURRENT (A)
FIGURE 8. PWM1 REGULATION CURVES (PWM2, PWM3
DISABLED)
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Application Note 1551
Typical Evaluation Board Performance Curves
5.000
3.310
4.995
OUTPUT VOLTAGE
OUTPUT VOLTAGE
VIN = 16V
3.305
VIN = 12V
3.300
VIN = 9V
3.295
3.290
VIN = 12V,
Unless Otherwise Noted. (Continued)
4.990
4.985
VIN = 12V
4.980
VIN = 16V
4.975
0
2
4
6
8
4.970
VIN = 9V
0
1
2
3
4
5
LOAD CURRENT
LOAD CURRENT
FIGURE 9. PWM2 REGULATION CURVES (PWM1, PWM3
DISABLED)
FIGURE 10. PWM3 REGULATION CURVES (PWM1,
PWM2 DISABLED)
VOUT1, 500mV/DIV
VOUT2, 2V/DIV
VOUT1(AC), 10mV/DIV
VOUT4, 2V/DIV
VOUT3, 2V/DIV
200µs/DIV
FIGURE 11. SOFT-START CURVES
VOUT2(AC), 20mV/DIV
VOUT3(AC), 20mV/DIV
500ns/DIV
FIGURE 13. PWM2 OUTPUT RIPPLE UNDER MAX LOAD
(VIN = 12V, IO1 = IO2 = 6A, IO3 = 4A, FULL
BANDWIDTH)
5
FIGURE 12. PWM1 OUTPUT RIPPLE UNDER MAX LOAD
(VIN = 12V, IO1 = IO2 = 6A, IO3 = 4A, FULL
BANDWIDTH)
500ns/DIV
FIGURE 14. PWM3 OUTPUT RIPPLE UNDER MAX LOAD
(VIN = 12V, IO1 = IO2 = 6A, IO3 = 4A, FULL
BANDWIDTH)
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Application Note 1551
Typical Evaluation Board Performance Curves
VIN = 12V,
Unless Otherwise Noted. (Continued)
ISTEP, 2A/DIV
ISTEP, 2A/DIV
VOUT1(AC), 50mV/DIV
VOUT2(AC, 100mV/DIV)
50µs/DIV
50µs/DIV
FIGURE 15. PWM1 LOAD TRANSIENT RESPONSE
(LOAD STEP FROM 1.5A TO 4.5A)
FIGURE 16. PWM2 LOAD TRANSIENT RESPONSE
(LOAD STEP FROM 1.5A TO 4.5A)
ISTEP, 1A/DIV
VOUT3(AC), 100mV/DIV
50µs/DIV
FIGURE 17. PWM3 LOAD TRANSIENT RESPONSE (LOAD STEP FROM 1A TO 3A)
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Schematic
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Application Note 1551
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Application Note 1551
TABLE 2. BILL OF MATERIALS
ESSENTIAL COMPONENTS
ITEM QTY
PART REFERENCE
VALUE
DESCRIPTION
PART #
MANUFACTURER
1
3
CB1, CB2, CB3
0.1µF
CAP Ceramic X5R, 16V, SMD, 0603
Generic
2
1
CFIN1
0.47µF
CAP Ceramic X5R, 25V, SMD, 0603
Generic
3
2
CIN1, CIN2
100µF
Alum. Elec. CAP 35V
4
4
CIN3, CIN4, CIN5, CIN6
10µF
CAP Ceramic X5R, 35V, SMD, 1206
Generic
5
3
CL1, CL2, CL3
820pF
CAP Ceramic X5R, 50V, SMD, 0603
Generic
6
1
CO11
330µF
POSCAP, 2.5V, SMD, D2E
7
5
CO13, CO14, CO24,
CO33, CO41
10µF
8
2
CO21, CO31
220µF
POSCAP, 6.3V, SMD, D2E
6TPE220MI
Sanyo
9
1
CO42
100µF
POSCAP, 4.0V, SMD, B
4TPE100MZB
Sanyo
10
1
CVCC1
4.7µF
CAP Ceramic X5R, 6.3V, SMD, 0805
Generic
11
1
Cff1
2.2nF
CAP Ceramic, SMD, 0603
Generic
12
2
Cff2, Cff3
100pF
CAP Ceramic, SMD, 0603
Generic
13
1
Cp1
3.3nF
CAP Ceramic, SMD, 0603
Generic
14
1
C1
0.22µF
CAP Ceramic X5R, 16V, SMD, 0603
Generic
15
1
C2
22pF
CAP Ceramic X5R, 16V, SMD, 0603
Generic
16
1
C3
1µF
CAP Ceramic X5R, 16V, SMD, 0603
Generic
17
1
L1
1.0µH
SHIELDED INDUCTOR
#919AS-1R0N
TOKO
18
1
L2
1.8µH
SHIELDED INDUCTOR
#919AS-1R8N
TOKO
19
1
L3
2.8µH
SHIELDED INDUCTOR
#919AS-2R8M
TOKO
20
3
M1, M2, M3
Dual N MOSFET, 30V, SOIC8
IRF7907
International
Rectifier
21
1
M4
P MOSFET, SOIC8
Si4423DY
Vishay
22
1
RFIN1
10Ω
RESISTOR, SMD, 0805, 10%
Generic
23
3
RL1, RL2, RL3
1.2Ω
RESISTOR, SMD, 0603, 10%
Generic
24
2
RPG1, ROC1
100kΩ
RESISTOR, SMD, 0603, 1%
Generic
25
2
ROC2, ROC3
200kΩ
RESISTOR, SMD, 0603, 1%
Generic
26
1
RSEN1
1.82kΩ
RESISTOR, SMD, 0603, 1%
Generic
27
2
RSEN2, RSEN3
3.32kΩ
RESISTOR, SMD, 0603, 1%
Generic
28
1
R1
25.5kΩ
RESISTOR, SMD, 0603, 1%
Generic
29
1
R2
102kΩ
RESISTOR, SMD, 0603, 1%
Generic
30
1
R3
105kΩ
RESISTOR, SMD, 0603, 1%
Generic
31
1
R5
51Ω
RESISTOR, SMD, 0603, 1%
Generic
32
1
R6
20kΩ
RESISTOR, SMD, 0603, 1%
Generic
33
1
R8
107kΩ
RESISTOR, SMD, 0603, 1%
Generic
34
1
R9
21.5kΩ
RESISTOR, SMD, 0603, 1%
Generic
35
1
R10
10kΩ
RESISTOR, SMD, 0603, 1%
Generic
8
EEU-FC1V101
2R5TPE330M7
CAP Ceramic X5R, 6.3V, SMD, 0805
Panasonic
Sanyo
Generic
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Application Note 1551
TABLE 2. BILL OF MATERIALS (Continued)
ESSENTIAL COMPONENTS
ITEM QTY
PART REFERENCE
VALUE
34kΩ
36
1
R11
37
1
U1
DESCRIPTION
PART #
RESISTOR, SMD, 0603, 1%
QUAD OUTPUT CONTROLLER
MANUFACTURER
Generic
ISL9440AIRZ
Intersil
OPTIONAL COMPONENTS OR RESISTOR JUMPERS
ITEM QTY
REFERENCE
VALUE
DESCRIPTION
RESISTOR Jumpers, SMD, 0603, 10%
38
10
R7, R12, R13, R14, R15,
R16, R17, R18, R19,
R20, R21
0
39
3
CO12, CO22, CO32
DNP
40
2
CO23, CO34
DNP
41
2
Cp2, Cp3
DNP
42
1
M5
DNP
P MOSFET TO-252
43
3
M6, M7, M8
DNP
N MOSFET
44
4
R4, R22, R25, R27
DNP
RESISTOR, SMD, 0603
45
3
R23, R24, R26
DNP
RESISTOR, SMD, 1206
PART #
MANUFACTURER
Generic
EVALUATION BOARD HARDWARE
ITEM QTY
REFERENCE
46
3
J3, J4, J5
47
11
TP1, TP2, TP3, TP4, TP6,
TP17, TP11, TP12, TP13,
TP14, TP7
48
9
TP8, TP10, TP16, TP19,
TP21, TP9, TP5, TP15,
TP20
VALUE
GND
DESCRIPTION
PART #
MANUFACTURER
3 Head Jumper
68000-236HLF
Generic
TEST POINT
5007
Keystone
TURRET
1514-2
Keystone
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the
reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
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ISL9440CEVAL1Z PCB Layout
10
Application Note 1551
FIGURE 18. TOP LAYER
FIGURE 19. SECOND LAYER (SOLID GROUND)
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ISL9440CEVAL1Z PCB Layout
(Continued)
11
Application Note 1551
FIGURE 20. THIRD LAYER
FIGURE 21. BOTTOM LAYER (MIRRORED)
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