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400MHz GBWP Gain-of-2 Stable
Operational Amplifier
The EL2074 is a precision voltagefeedback amplifier featuring a 400MHz
gain-bandwidth product, fast settling
time, excellent differential gain and differential phase performance, and a minimum of 50mA output current drive over
temperature.
The EL2074 is gain-of-2 stable with a -3dB bandwidth of
400MHz at AV = +2. It has a very low 200µV of input offset
voltage, only 2µA of input bias current, and a fully symmetrical differential input. Like all voltage-feedback operational
amplifiers, the EL2074 allows the use of reactive or non-linear components in the feedback loop. This combination of
speed and versatility makes the EL2074 the ideal choice for
all op-amp applications at a noise gain of 2 or greater requiring high speed and precision, including active filters,
integrators, sample-and-holds, and log amps. The low distortion, high output current, and fast settling makes the EL2074
an ideal amplifier for signal-processing and digitizing
systems.
Pinout
EL2074
FN7150
September 26, 2001
Features
• 400MHz gain-bandwidth product
• Gain-of-2 stable
• Ultra low video distortion = 0.01%/0.015° @NTSC/PAL
• Conventional voltage-feedback topology
• Low offset voltage = 200µV
• Low bias current = 2µA
• Low offset current = 0.1µA
• Output current = 50mA over temperature
• Fast settling = 13ns to 0.1%
• Low distortion = -55dB HD2, -70dB HD3 @20MHz, 2VPP,
AV = +2
Applications
• High resolution video
• Active filters/integrators
• High-speed signal processing
• ADC/DAC buffers
• Pulse/RF amplifiers
EL2074
(8-PIN SO, PDIP)
TOP VIEW
• Pin diode receivers
• Log amplifiers
NC
1
IN-
2
8
NC
7
V+
• Photo multiplier amplifiers
• High speed sample-and-holds
+
IN+
3
6
OUT
V-
4
5
NC
1
Ordering Information
PART
NUMBER
PACKAGE
TAPE & REEL
PKG. NO.
EL2074CN
8-Pin PDIP
-
MDP0031
EL2074CS
8-Pin SO
-
MDP0027
EL2074CS-T7
8-Pin SO
7”
MDP0027
EL2074CS-T13
8-Pin SO
13”
MDP0027
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
EL2074
Absolute Maximum Ratings (TA = 25°C)
Supply Voltage (V S). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±7V
Output Current Output is short-circuit protected to ground, however,
maximum reliability is obtained if IOUT does not exceed 70mA.
Common-Mode Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V
Thermal Resistance (PDIP) . . . . . . . . . . . . . . . . . . . . . . .θJA = 95°C/W
Thermal Resistance (PDIP) . . . . . . . . . . . . . . . . . . . . . .θJA = 175°C/W
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Lead Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Open-Loop DC Electrical Specifications
PARAMETER
DESCRIPTION
VS = ±5V, R L = 100Ω, unless otherwise specified.
TEST
CONDITIONS
VOS
Input Offset Voltage
VCM = 0V
TCV OS
Average Offset
(Note 1)
TEMP
MIN
25°C
TYP
MAX
UNIT
0.2
1.5
mV
TMIN, TMAX
3
All
8
mV
µV/°C
Voltage Drift
IB
Input Bias Current
VCM = 0V
All
2
6
µA
IOS
Input Offset Current
VCM = 0V
25°C
0.1
1
µA
2
µA
PSRR
Power Supply Rejection Ratio
(Note 2)
TMIN, TMAX
All
60
80
65
90
dB
CMRR
Common Mode Rejection Ratio
(Note 3)
All
IS
Supply Current - Quiescent
No Load
25°C
RIN (diff)
RIN (Differential)
Open-Loop
25°C
15
CIN (diff)
CIN (Differential)
Open-Loop
25°C
1
pF
RIN (cm)
RIN (Common-Mode)
25°C
1
MΩ
21
TMIN, TMAX
dB
25
mA
25
mA
kΩ
CIN (cm)
CIN (Common-Mode)
25°C
1
pF
ROUT
Output Resistance
25°C
20
mΩ
CMIR
Common-Mode Input Range
±3.5
V
25°C
±3
TMIN, TMAX
±2.5
V
IOUT
Output Current
All
50
70
mA
VOUT
Output Voltage Swing
No Load
All
±3.5
±4
V
VOUT 100
Output Voltage Swing
100Ω
All
±3
±3.6
V
VOUT 50
Output Voltage Swing
50Ω
All
±2.5
±3.4
V
AVOL 100
Open-Loop Gain
100Ω
1000
V/V
AVOL 50
Open-Loop Gain
50Ω
25°C
500
TMIN, TMAX
400
25°C
400
TMIN, TMAX
300
V/V
800
V/V
V/V
eN@ > 1MHz
Noise Voltage 1MHz to 100MHz
25°C
2.3
nV/√Hz
iN@ > 100kHz
Noise Current 100kHz to 100MHz
25°C
3.2
pA/√Hz
NOTES:
1. Measured from T MIN, TMAX
2. ±VCC = ±4.5V to 5.5V
3. ±VIN = ±2.5V, V OUT = 0V
2
EL2074
Closed-Loop AC Electrical Specifications
PARAMETER
SSBW
DESCRIPTION
VS = ±5V, A V = +2, RF = RG = 250Ω, C F = 3pF, R L = 100Ω unless otherwise specified.
TEST CONDITIONS
TEMP
MIN
-3dB Bandwidth
AV = -1
25°C
(V OUT = 0.4VPP)
AV = +2
25°C
250
TMIN, TMAX
250
TYP
MAX
UNIT
400
MHz
400
MHz
MHz
AV = +5
25°C
100
MHz
AV = +10
25°C
40
MHz
25°C
400
MHz
GBWP
Gain-Bandwidth Product
AV = +10
LSBWa
-3dB Bandwidth
VOUT = 2VPP (Note 1)
All
43
63
MHz
LSBWb
-3dB Bandwidth
VOUT = 5VPP (Note 1)
All
17
25
MHz
GFPL
Peaking (< 50MHz)
VOUT = 0.4VPP
25°C
0
TMIN, TMAX
GFPH
Peaking (> 50MHz)
VOUT = 0.4VPP
25°C
0
TMIN, TMAX
GFR
Rolloff (< 100MHz)
VOUT = 0.4VPP
25°C
0.1
TMIN, TMAX
LPD
Linear Phase Deviation
(< 100MHz)
VOUT = 0.4VPP
PM
Phase Margin
tr1, tf1
1
dB
1
dB
2
dB
2
dB
0.5
dB
0.5
dB
1.8
°
All
1
AV = +2
25°C
50
°
Rise Time, Fall Time
0.4V Step, AV = +2
25°C
1.8
ns
tr2, tf2
Rise Time, Fall Time
5V Step, A V = +2
25°C
8
ns
ts1
Settling to 0.1% (AV = -1)
2V Step
25°C
13
ns
ts2
Settling to 0.01% (A V = -1)
2V Step
25°C
25
ns
OS
Overshoot
2V Step
25°C
5
%
SR
Slew Rate
2V Step
All
400
V/µs
HD2a
2nd Harmonic Distortion
@ 10MHz, A V = +2
25°C
-65
-55
dBc
HD2c
2nd Harmonic Distortion
@ 20MHz, A V = +2
25°C
-55
-45
dBc
-45
dBc
275
DISTORTION
TMIN, TMAX
HD3a
3rd Harmonic Distortion
@ 10MHz, A V = +2
25°C
-72
-60
dBc
HD3c
3rd Harmonic Distortion
@ 20MHz, A V = +2
25°C
-70
-60
dBc
-60
dBc
TMIN, TMAX
VIDEO PERFORMANCE (Note 3)
dG
Differential Gain
NTSC
25°C
0.01
0.05
%PP
dP
Differential Phase
NTSC
25°C
0.015
0.05
°PP
dG
Differential Gain
30MHz
25°C
0.1
%PP
dP
Differential Phase
30MHz
25°C
0.1
°PP
VBW
±0.1dB Bandwidth Flatness
50
MHz
25°C
25
NOTES:
1. Large-signal bandwidth calculated using LSBW = Slew Rate / 2 π VPEAK.
2. All distortion measurements are made with VOUT = 2VPP, RL = 100Ω.
3. Video performance measured at AV = +2 with 2 times normal video level across RL = 100Ω. This corresponds to standard video levels across
a back-terminated 50Ω load, i.e., 0–100IRE, 40IREpp giving a 1V PP video signal across the 50Ω load. For other values of RL, see curves.
3
EL2074
Typical Performance Curves
Non-Inverting Frequency
Response
Inverting Frequency
Response
Frequency Response for
Various R Ls
Open Loop Gain and Phase
Output Voltage Swing vs
Frequency
Equivalent Input Noise
PSRR, CMRR, and ClosedLoop RO vs Frequency
2nd and 3rd Harmonic
Distortion vs Frequency
2-Tone, 3rd Order
Intermodulation Intercept
4
EL2074
Typical Performance Curves
Series Resistor and
Resulting Bandwidth vs
Capacitive Load
Common-Mode Rejection
Ratio vs Input CommonMode Voltage
Bias and Offset Current vs
Temperature
5
(Continued)
Settling Time vs
Output Voltage Change
Bias and Offset Current vs
Input Common-Mode Voltage
Offset Voltage vs
Temperature
Settling Time vs
Closed-Loop Gain
Supply Current
vs Temperature
AVOL, PSRR, and CMRR vs
Temperature
EL2074
Typical Performance Curves
(Continued)
Small Signal Transient Response
Differential Gain and Phase
vs DC Input Offset at
3.58MHz
Differential Gain and
Phase vs Number of
150Ω Loads at 3.58MHz
6
Large Signal Transient Response
Differential Gain and Phase
vs DC Input Offset at
4.43MHz
Differential Gain and Phase
vs DC Input Offset at 30MHz
Differential Gain and
Phase vs Number of
150Ω Loads at 4.43MHz
Differential Gain and
Phase vs Number of
150Ω Loads at 30MHz
EL2074
Equivalent Circuit
Burn-In Circuit
placed in the feedback path, making it an excellent choice for
applications such as active filters, sample-and-holds, or integrators. Similarly, because of the ability to use diodes in the
feedback network, the EL2074 is an excellent choice for
applications such as log amplifiers.
The EL2074 also has excellent DC specifications: 200µV,
VOS , 2µA IB, 0.1µA I OS , and 90dB of CMRR. These specifications allow the EL2074 to be used in DC-sensitive
applications such as difference amplifiers. Furthermore, the
current noise of the EL2074 is only 3.2pA/√Hz, making it an
excellent choice for high-sensitivity transimpedance amplifier
configurations.
Gain-Bandwidth Product
All Packages Use The Same Schematic
Applications Information
Product Description
The EL2074 is a wideband monolithic operational amplifier
built on a high-speed complementary bipolar process. The
EL2074 uses a classical voltage-feedback topology which
allows it to be used in a variety of applications requiring a
noise gain ≥ 2 where current-feedback amplifiers are not
appropriate because of restrictions placed upon the feedback element used with the amplifier. The conventional
topology of the EL2074 allows, for example, a capacitor to be
7
The EL2074 has a gain-bandwidth product of 400MHz. For
gains greater than 8, its closed-loop -3dB bandwidth is
approximately equal to the gain-bandwidth product divided
by the noise gain of the circuit. For gains less than 8, higherorder poles in the amplifier's transfer function contribute to
even higher closed loop bandwidths. For example, the
EL2074 has a -3dB bandwidth of 400MHz at a gain of +2,
dropping to 200MHz at a gain of +4. It is important to note
that the EL2074 has been designed so that this “extra” bandwidth in low-gain applications does not come at the expense
of stability. As seen in the typical performance curves, the
EL2074 in a gain of +2 only exhibits 1dB of peaking with a
100Ω load.
EL2074
Parasitic Capacitances and Stability
When used in positive-gain configurations, the EL2074 can
be quite sensitive to parasitic capacitances at the inverting
input, especially with values ≥ 250Ω for the gain resistor. The
problem stems from the feedback and gain resistance in conjunction with the approximately 3pF of board-related
parasitic capacitance from the inverting input to ground.
Assuming a gain-of-2 configuration with RF = RG = 250Ω, a
feedback pole occurs at 424MHz, which is equivalent to a
zero in the forward path at the same frequency. This zero
reduces stability by reducing the effective phase-margin from
about 50° to about 30°.
A common solution to this problem is to add an additional
capacitor from the inverting input to the output. This capacitor, in conjunction with the parasitic capacitance, maintains a
constant voltage-divider between the output and the inverting input. This technique is used for AC testing of the
EL2074. A 3pF capacitor is placed in parallel with the feedback resistor for all AC tests. When this capacitor is used, it
is also possible to increase the resistance values of the feedback and gain resistors without loss of stability, resulting in
less loading of the EL2074 from the feedback network.
Video Performance
An industry-standard method of measuring the video distortion of a component such as the EL2074 is to measure the
amount of differential gain (dG) and differential phase (dP)
that it introduces. To make these measurements, a
0.286V PP (40IRE) signal is applied to the device with 0V DC
offset (0IRE) at either 3.58MHz for NTSC, 4.43MHz for PAL,
or 30MHz for HDTV. A second measurement is then made at
0.714V DC offset (100IRE). Differential gain is a measure of
the change in amplitude of the sine wave, and is measured in
percent. Differential phase is a measure of the change in
phase, and is measured in degrees.
For signal transmission and distribution, a back-terminated
cable (75Ω in series at the drive end, and 75Ω to ground at
the receiving end) is preferred since the impedance match at
both ends will absorb any reflections. However, when double
termination is used, the received signal is halved; therefore a
gain of 2 configuration is typically used to compensate for the
attenuation.
The EL2074 has been designed to be among the best video
amplifiers in the marketplace today. It has been thoroughly
characterized for video performance in the topology
described above, and the results have been included as minimum dG and dP specifications and as typical performance
curves. In a gain of +2, driving 150Ω, with standard video test
levels at the input, the EL2074 exhibits dG and dP of only
0.01% and 0.015° at NTSC and PAL. Because dG and dP
vary with different DC offsets, the superior video performance of the EL2074 has been characterized over the entire
DC offset range from -0.714V to +0.714V. For more information, refer to the curves of dG and dP vs DC Input Offset.
8
The excellent output drive capability of the EL2074 allows it
to drive up to 4 back-terminated loads with excellent video
performance. With 4, 150Ω loads, dG and dP are only 0.15%
and 0.08° at NTSC and PAL. For more information, refer to
the curves for Video Performance vs Number of 150Ω
Loads.
Output Drive Capability
The EL2074 has been optimized to drive 50Ω and 75Ω
loads. It can easily drive 6V PP into a 50Ω load. This high output drive capability makes the EL2074 an ideal choice for
RF, IF and video applications. Furthermore, the current drive
of the EL2074 remains a minimum of 50mA at low temperatures. The EL2074 is current-limited at the output, allowing it
to withstand momentary shorts to ground. However, power
dissipation with the output shorted can be in excess of the
power-dissipation capabilities of the package.
Capacitive Loads
Although the EL2074 has been optimized to drive resistive
loads as low as 50Ω, capacitive loads will decrease the
amplifier's phase margin which may result in peaking, overshoot, and possible oscillation. For optimum AC
performance, capacitive loads should be reduced as much
as possible or isolated via a series output resistor. Coax lines
can be driven, as long as they are terminated with their characteristic impedance. When properly terminated, the
capacitance of coaxial cable will not add to the capacitive
load seen by the amplifier. Capacitive loads greater than
10pF should be buffered with a series resistor (RS) to isolate
the load capacitance from the amplifier output. A curve of
recommended R S vs Cload has been included for reference.
Values of R S were chosen to maximize resulting bandwidth
without peaking.
Printed-Circuit Layout
As with any high-frequency device, good PCB layout is necessary for optimum performance. Ground-plane construction
is highly recommended, as is good power supply bypassing.
A 1µF–10µF tantalum capacitor is recommended in parallel
with a 0.01µF ceramic capacitor. All pin lengths should be as
short as possible, and all bypass capacitors should be as
close to the device pins as possible. Parasitic capacitances
should be kept to an absolute minimum at both inputs and at
the output. Resistor values should be kept under 1000Ω to
2000Ω because of the RC time constants associated with the
parasitic capacitance. Metal-film and carbon resistors are
both acceptable, use of wire-wound resistors is not recommended because of parasitic inductance. Similarly,
capacitors should be low-inductance for best performance. If
possible, solder the EL2074 directly to the PC board without
a socket. Even high quality sockets add parasitic capacitance and inductance which can potentially degrade
performance. Because of the degradation of AC performance due to parasitics, the use of surface-mount
components (resistors, capacitors, etc.) is also
recommended.
EL2074
EL2074 Macromodel
*
* Connections: input
*
|
-input
*
| | +Vsupply
*
| | |
-Vsupply
*
| | |
|
output
*
| | |
|
|
.subckt M2074 3
2 7
4 6
*
*Input Stage
*
ie 37 4 1 mA
r6 36 37 125
r7 38 37 125
rc1 7 30 200
rc2 7 39 200
q1 30 3 36 qn
q2 39 2 38 qna
ediff 33 0 39 30 1
rdiff 33 0 1 Meg
*
* Compensation Section
*
ga 0 34 33 0 2m
rh 34 0 500K
ch 34 0 0.8 pF
rc 34 40 50
cc 40 0 0.05 pF
*
* Poles
*
ep 41 0 40 0 1
rpa 41 42 150
cpa 42 0 0.5 pF
rpb 42 43 50
cpb 43 0 0.5 pF
*
* Output Stage
*
ios1 7 50 3.0 mA
ios2 51 4 3.0 mA
q3 4 43 50 qp
q4 7 43 51 qn
q5 7 50 52 qn
q6 4 51 53 qp
ros1 52 6 2
ros2 6 53 2
*
Power Supply Current
*
ips 7 4 11.4 mA
*
Models
*
.model qna npn(is800e-18 bf170 tf0.2 ns)
.model qn npn(is810e-18 bf200 tf0.2 ns)
.model qp pnp(is800e-18 bf200 tf0.2 ns)
.ends
9
EL2074
EL2074 Macromodel (Continued)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
10
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