Data Sheet

PBSS5160PAPS
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
24 November 2014
Product data sheet
1. General description
PNP/PNP low VCEsat Breakthrough In Small Signal (BISS) transistor in a leadless
medium power DFN2020D-6 (SOT1118D) Surface-Mounted Device (SMD) plastic
package with visible and solderable side pads.
2. Features and benefits
•
•
•
•
•
•
•
•
Very low collector-emitter saturation voltage VCEsat
High collector current capability IC and ICM
High collector current gain hFE at high IC
Reduced Printed-Circuit Board (PCB) requirements
Exposed heat sink for excellent thermal and electrical conductivity
High energy efficiency due to less heat generation
Suitable for Automatic Optical Inspection (AOI) of solder joints
AEC-Q101 qualified
3. Applications
•
•
•
•
•
•
Load switch
Battery-driven devices
Power management
Charging circuits
LED lighting
Power switches (e.g. motors, fans)
4. Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCEO
collector-emitter
voltage
open base
-
-
-60
V
IC
collector current
-
-
-1
A
ICM
peak collector current
single pulse; tp ≤ 1 ms
-
-
-1.5
A
collector-emitter
saturation resistance
IC = -0.5 A; IB = -50 mA; pulsed;
-
-
360
mΩ
Per transistor
Per transistor
RCEsat
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C
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PBSS5160PAPS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
5. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
1
E1
emitter TR1
2
B1
base TR1
3
C2
collector TR2
4
E2
emitter TR2
5
B2
base TR2
6
C1
collector TR1
7
C1
collector TR1
8
C2
collector TR2
Simplified outline
6
Graphic symbol
5
7
1
C1
4
8
2
B2
TR2
TR1
E1
3
Transparent top view
E2
B1
C2
sym138
DFN2020D-6 (SOT1118D)
6. Ordering information
Table 3.
Ordering information
Type number
Package
PBSS5160PAPS
Name
Description
Version
DFN2020D-6
DFN2020D-6: plastic, thermally enhanced ultra thin and small
outline package; no leads; 6 terminals; body 2 x 2 x 0.65 mm
SOT1118D
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VCBO
collector-base voltage
open emitter
-
-60
V
VCEO
collector-emitter voltage
open base
-
-60
V
VEBO
emitter-base voltage
open collector
-
-7
V
IC
collector current
-
-1
A
ICM
peak collector current
-
-1.5
A
IB
base current
-
-0.3
A
IBM
peak base current
single pulse; tp ≤ 1 ms
-
-1
A
Ptot
total power dissipation
Tamb ≤ 25 °C
[1]
-
370
mW
[2]
-
570
mW
[3]
-
530
mW
[4]
-
700
mW
Per transistor
PBSS5160PAPS
Product data sheet
single pulse; tp ≤ 1 ms
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PBSS5160PAPS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
Symbol
Parameter
Conditions
Min
Max
Unit
[5]
-
450
mW
[6]
-
760
mW
[7]
-
700
mW
[8]
-
1450
mW
[1]
-
510
mW
[2]
-
780
mW
[3]
-
730
mW
[4]
-
960
mW
[5]
-
620
mW
[6]
-
1040
mW
[7]
-
960
mW
[8]
-
2000
mW
Per device
Ptot
total power dissipation
Tamb ≤ 25 °C
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
-55
150
°C
Tstg
storage temperature
-65
150
°C
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
PBSS5160PAPS
Product data sheet
Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated, mounting pad for
2
collector 1 cm .
Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated and standard footprint.
2
Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated, mounting pad for collector 1 cm .
Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated, mounting pad for
2
collector 1 cm .
Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated and standard footprint.
2
Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated, mounting pad for collector 1 cm .
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PBSS5160PAPS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
1.5
006aad165
(1)
Ptot
(W)
1.0
(2)
(3) (4)
(5)
0.5 (6)
(7)
(8)
0
-75
-25
25
75
(1) 4-layer PCB 70 µm, mounting pad for collector 1 cm
(2) FR4 PCB 70 µm, mounting pad for collector 1 cm
(3) 4-layer PCB 70 µm, standard footprint
Fig. 1.
2
2
(4) 4-layer PCB 35 µm, mounting pad for collector 1 cm
(5) FR4 PCB 35 µm, mounting pad for collector 1 cm
(6) 4-layer PCB 35 µm, standard footprint
(7) FR4 PCB 70 µm, standard footprint
(8) FR4 PCB 35 µm, standard footprint
125
175
Tamb (°C)
2
2
Per transistor: power derating curves
8. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Conditions
thermal resistance
from junction to
ambient
in free air
Min
Typ
Max
Unit
[1]
-
-
338
K/W
[2]
-
-
219
K/W
[3]
-
-
236
K/W
[4]
-
-
179
K/W
[5]
-
-
278
K/W
[6]
-
-
164
K/W
[7]
-
-
179
K/W
[8]
-
-
86
K/W
-
-
30
K/W
Per transistor
Rth(j-a)
Rth(j-sp)
thermal resistance
from junction to solder
point
PBSS5160PAPS
Product data sheet
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PBSS5160PAPS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
Symbol
Parameter
Conditions
thermal resistance
from junction to
ambient
in free air
Min
Typ
Max
Unit
[1]
-
-
245
K/W
[2]
-
-
160
K/W
[3]
-
-
171
K/W
[4]
-
-
130
K/W
[5]
-
-
202
K/W
[6]
-
-
120
K/W
[7]
-
-
130
K/W
[8]
-
-
63
K/W
Per device
Rth(j-a)
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated, mounting pad for
2
collector 1 cm .
Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated and standard footprint.
2
collector 1 cm .
Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated and standard footprint.
2
Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated, mounting pad for collector 1 cm .
006aad166
103
Zth(j-a)
(K/W)
2
Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated, mounting pad for collector 1 cm .
Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated, mounting pad for
duty cycle = 1
0.75
102
0.33
0.5
0.2
0.1
0.05
10
0.02
0.01
0
1
10-5
10-4
10-3
10-2
10-1
1
10
102
tp (s)
103
FR4 PCB 35 µm, standard footprint
Fig. 2.
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS5160PAPS
Product data sheet
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PBSS5160PAPS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
006aad167
103
Zth(j-a)
(K/W)
duty cycle = 1
102
0.75
0.33
0.5
0.2
0.1
0.05
10
0.02
1
10-5
0.01
0
10-4
10-3
10-2
10-1
FR4 PCB 35 µm, mounting pad for collector 1 cm
Fig. 3.
1
10
102
tp (s)
103
2
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aad168
103
Zth(j-a)
(K/W)
duty cycle = 1
102
0.75
0.33
0.5
0.2
0.1
0.05
10
0.02
1
10-5
0.01
0
10-4
10-3
10-2
10-1
1
10
102
tp (s)
103
4-layer PCB 35 µm, standard footprint
Fig. 4.
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS5160PAPS
Product data sheet
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PBSS5160PAPS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
006aad169
103
Zth(j-a)
(K/W)
duty cycle = 1
102
0.75
0.33
0.5
0.2
0.1
0.05
10
0.02
0.01
1
10-5
0
10-4
10-3
10-2
10-1
4-layer PCB 35 µm, mounting pad for collector 1 cm
Fig. 5.
1
10
102
tp (s)
103
2
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aac610
103
Zth(j-a)
(K/W)
duty cycle = 1
0.75
102
0.33
0.5
0.2
0.1
0.05
10
0.02
0
1
10- 5
0.01
10- 4
10- 3
10- 2
10- 1
1
10
102
tp (s)
103
FR4 PCB 70 µm, standard footprint
Fig. 6.
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS5160PAPS
Product data sheet
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PBSS5160PAPS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
006aac611
103
Zth(j-a)
(K/W)
duty cycle = 1
102
0.75
0.5
0.33
0.2
10
0.1
0.05
0.02
0
1
5
10
0.01
10- 4
10- 3
10- 2
10- 1
FR4 PCB 70 µm, mounting pad for collector 1 cm
Fig. 7.
1
10
102
tp (s)
103
2
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aad170
103
Zth(j-a)
(K/W)
duty cycle = 1
102
0.75
0.5
0.33
0.2
0.1
0.05
10
0.02
0.01
1
10-5
0
10-4
10-3
10-2
10-1
1
10
102
tp (s)
103
4-layer PCB 70 µm, standard footprint
Fig. 8.
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS5160PAPS
Product data sheet
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PBSS5160PAPS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
102
006aad171
duty cycle = 1
0.75
0.5
Zth(j-a)
(K/W)
0.33
0.2
10
0.1
0.05
0.02
0.01
0
1
10-5
10-4
10-3
10-2
10-1
4-layer PCB 70 µm, mounting pad for collector 1 cm
Fig. 9.
1
102
10
tp (s)
103
2
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
9. Characteristics
Table 6.
Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
collector-base cut-off
current
VCB = -48 V; IE = 0 A; Tamb = 25 °C
-
-
-100
nA
VCB = -48 V; IE = 0 A; Tj = 150 °C
-
-
-50
µA
IEBO
emitter-base cut-off
current
VEB = -5 V; IC = 0 A; Tamb = 25 °C
-
-
-100
nA
hFE
DC current gain
VCE = -2 V; IC = -100 mA; pulsed;
170
245
-
120
170
-
70
100
-
-
-125
-180
mV
-
-390
-550
mV
-
-240
-340
mV
-
-
360
mΩ
Per transistor
ICBO
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C
VCE = -2 V; IC = -500 mA; pulsed;
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C
VCE = -2 V; IC = -1 A; pulsed;
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C
VCEsat
collector-emitter
saturation voltage
IC = -500 mA; IB = -50 mA; pulsed;
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C
IC = -1 A; IB = -50 mA; pulsed;
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C
IC = -1 A; IB = -100 mA; pulsed;
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C
RCEsat
collector-emitter
saturation resistance
PBSS5160PAPS
Product data sheet
IC = -0.5 A; IB = -50 mA; pulsed;
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C
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PBSS5160PAPS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VBEsat
base-emitter saturation IC = -500 mA; IB = -50 mA; pulsed;
voltage
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C
-
-
-1
V
IC = -1 A; IB = -50 mA; Tamb = 25 °C
-
-
-1
V
IC = -1 A; IB = -100 mA; pulsed;
-
-
-1.1
V
-
-
-0.9
V
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C
VBEon
base-emitter turn-on
voltage
VCE = -2 V; IC = -0.5 A; pulsed;
delay time
VCC = -10 V; IC = -0.5 A; IBon = -25 mA;
-
15
-
ns
tr
rise time
IBoff = 25 mA; Tamb = 25 °C
-
40
-
ns
ton
turn-on time
-
55
-
ns
ts
storage time
-
95
-
ns
tf
fall time
-
40
-
ns
toff
turn-off time
-
135
-
ns
fT
transition frequency
65
125
-
MHz
-
9.5
13
pF
td
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C
VCE = -10 V; IC = -50 mA; f = 100 MHz;
Tamb = 25 °C
Cc
collector capacitance
VCB = -10 V; IE = 0 A; ie = 0 A;
f = 1 MHz; Tamb = 25 °C
006aad212
500
-1.50
hFE
IC
(A)
400
006aad213
IB = -20 mA
-18
-16
-14
-1.00
(1)
-12
-10
300
-8
-0.75
-6
(2)
200
(3)
100
0
-10-1
-4
-0.50
-1
-2
-0.25
-10
-102
0
-103
-104
IC (mA)
VCE = −2 V
0
-1
-2
-3
-4
VCE (V)
-5
Tamb = 25 °C
(1) Tamb = 100 °C
Fig. 11. Collector current as a function of collectoremitter voltage; typical values
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig. 10. DC current gain as a function of collector
current; typical values
PBSS5160PAPS
Product data sheet
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PBSS5160PAPS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
006aad214
-1.2
006aad215
-1.2
VBEsat
(V)
VBE
(V)
-1.0
-0.8
(1)
(1)
-0.8
(2)
(2)
-0.6
(3)
(3)
-0.4
-0.4
0
-10-1
-1
-10
-102
-0.2
-10-1
-103
-104
IC (mA)
-1
-10
VCE = −2 V
IC/IB = 20
(1) Tamb = −55 °C
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(3) Tamb = 100 °C
Fig. 12. Base-emitter voltage as a function of collector
current; typical values
006aad216
-10
-102
Fig. 13. Base-emitter saturation voltage as a function of
collector current; typical values
006aad217
-10
VCEsat
(V)
-103
-104
IC (mA)
VCEsat
(V)
-1
-1
(1)
(2)
-10-1
-10-1
(1)
(2)
(3)
-10-2
-10-3
-10-1
-1
-10
-102
(3)
-10-2
-10-3
-10-1
-103
-104
IC (mA)
-1
IC/IB = 20
Tamb = 25 °C
(1) Tamb = 100 °C
(1) IC/IB = 100
(2) Tamb = 25 °C
(2) IC/IB = 50
(3) Tamb = −55 °C
(3) IC/IB = 10
Fig. 14. Collector-emitter saturation voltage as a
function of collector current; typical values
PBSS5160PAPS
Product data sheet
-10
-102
-103
-104
IC (mA)
Fig. 15. Collector-emitter saturation voltage as a
function of collector current; typical values
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PBSS5160PAPS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
006aad218
103
006aad219
103
RCEsat
(Ω)
RCEsat
(Ω)
102
102
(1)
10
10
(1)
1
(2)
1
10-1
-10-1
(2)
10-1
(3)
-1
-10
-102
10-2
-10-1
-103
-104
IC (mA)
(3)
-1
IC/IB = 20
Tamb = 25 °C
(1) Tamb = 100 °C
(1) IC/IB = 100
(2) Tamb = 25 °C
(2) IC/IB = 50
(3) Tamb = −55 °C
(3) IC/IB= 10
Fig. 16. Collector-emitter saturation resistance as a
function of collector current; typical values
PBSS5160PAPS
Product data sheet
-10
-102
-103
-104
IC (mA)
Fig. 17. Collector-emitter saturation resistance as a
function of collector current; typical values
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PBSS5160PAPS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
10. Test information
- IB
input pulse
(idealized waveform)
90 %
- I Bon (100 %)
10 %
- I Boff
output pulse
(idealized waveform)
- IC
90 %
- I C (100 %)
10 %
t
td
ts
tr
t on
tf
t off
006aaa266
Fig. 18. BISS transistor switching time definition
VBB
RB
(probe)
oscilloscope
450 Ω
VCC
RC
Vo
(probe)
450 Ω
R2
VI
oscilloscope
DUT
R1
mgd624
Fig. 19. Test circuit for switching times
10.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is
suitable for use in automotive applications.
PBSS5160PAPS
Product data sheet
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PBSS5160PAPS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
11. Package outline
DFN2020D-6: plastic, thermally enhanced ultra thin and small outline package; no leads;
6 terminals; body 2 x 2 x 0.65 mm
bp
(6x)
v
SOT1118D
A B
D
A
B
A
E
A1
pin 1
index area
detail X
solderable lead end
protrusion maximum 0.035 mm (6x)
D1
(2x)
pin 1
index area
1
C
e1
e1
y1 C
3
Lp
(6x)
cut-off end of
non-fuctional
bonding wire
(8x)
E1
(2x)
6
e
4
e
X
0
1
A
A1
bp
max 0.65 0.04 0.35
nom 0.62
0.30
min 0.59
0.25
mm
2 mm
scale
Dimensions (mm are the original dimensions)
Unit
y
D
D1
E
E1
2.1
2.0
1.9
0.77
0.67
0.57
2.1
2.0
1.9
1.0
0.9
0.8
e
e1
Lp
0.54 0.30
0.65 0.49 0.25
0.44 0.20
v
0.1
y
y1
0.05 0.05
Note
1. Dimension A is including plating thickness.
Outline
version
SOT1118D
sot1118d_po
References
IEC
JEDEC
JEITA
European
projection
Issue date
14-07-16
14-10-16
---
Fig. 20. Package outline DFN2020D-6 (SOT1118D)
PBSS5160PAPS
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60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
12. Soldering
SOT1118D
2.2
1.65
0.2
0.3
0.45
0.35
0.25
0.65
0.53 0.43 0.33
solder lands
0.12 0.22
2.5 2.3
0.9
1
1.1
solder paste
solder resist
0.935
occupied area
0.49
0.31
0.21
0.57
0.67
Dimensions in mm
0.77
1.65
sot1118d_fr
Fig. 21. Reflow soldering footprint for DFN2020D-6 (SOT1118D)
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13. Revision history
Table 7.
Revision history
Data sheet ID
Release date
Data sheet status
Change notice
Supersedes
PBSS5160PAPS v.1
20141124
Product data sheet
-
-
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60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
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Document
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Product
status [3]
Objective
[short] data
sheet
Development This document contains data from
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development.
Preliminary
[short] data
sheet
Qualification
This document contains data from the
preliminary specification.
Product
[short] data
sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Definition
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60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
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15. Contents
1
General description ............................................... 1
2
Features and benefits ............................................1
3
Applications ........................................................... 1
4
Quick reference data ............................................. 1
5
Pinning information ............................................... 2
6
Ordering information ............................................. 2
7
Limiting values .......................................................2
8
Thermal characteristics .........................................4
9
Characteristics ....................................................... 9
10
10.1
Test information ................................................... 13
Quality information ............................................. 13
11
Package outline ................................................... 14
12
Soldering .............................................................. 15
13
Revision history ................................................... 16
14
14.1
14.2
14.3
14.4
Legal information .................................................17
Data sheet status ............................................... 17
Definitions ...........................................................17
Disclaimers .........................................................17
Trademarks ........................................................ 18
© NXP Semiconductors N.V. 2014. All rights reserved
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 24 November 2014
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