EL2150, EL2157 ® Data Sheet 125MHz Single Supply, Clamping Op Amps The EL2150 and EL2157 are the electronics industry's fastest single supply op amps available. Prior single supply op amps have generally been limited to bandwidths and slew rates ¼ that of the EL2150 and EL2157. The 125MHz bandwidth, 275V/µs slew rate, and 0.05%/0.05° differential gain/differential phase makes this part ideal for single or dual supply video speed applications. With its voltage feedback architecture, these amplifiers can accept reactive feedback networks, allowing them to be used in analog filtering applications. The inputs can sense signals below the bottom supply rail and as high as 1.2V below the top rail. Connecting the load resistor to ground and operating from a single supply, the outputs swing completely to ground without saturating. The outputs can also drive to within 1.2V of the top rail. The EL2150 and EL2157 will output ±100mA and will operate with single supply voltages as low as 2.7V, making them ideal for portable, low power applications. March 12, 2004 Features • Specified for 3V, 5V, or ±5V applications • Power-down to 0µA (EL2157) • Output voltage clamp (EL2157) • Large input common mode range 0V < VCM < VS - 1.2V • Output swings to ground without saturating • -3dB bandwidth = 125MHz • ±0.1dB bandwidth = 30MHz • Low supply current = 5mA • Slew rate = 275V/µs • Low offset voltage = 2mV max (SO package) • Output current = ±100mA • High open loop gain = 80dB • Diff gain/phase = 0.05%/0.05° The EL2157 has a high speed disable feature. Applying a low logic level to this pin reduces the supply current to 0µA within 50ns. This is useful for both multiplexing and reducing power consumption. Applications The EL2157 also has an output voltage clamp feature. This clamp is a fast recovery (<7ns) output clamp that prevents the output voltage from going above the preset clamp voltage. This feature is desirable for A/D applications, as A/D converters can require long times to recover if overdriven. • A/D drivers For applications where board space is critical the EL2150 is available in the tiny 5-pin SOT-23 package, which has a footprint 28% the size of an 8-pin SO. The EL2150 and EL2157 are both available in an 8-pin SO package. All parts operate over the industrial temperature range of -40°C to +85°C. For dual, triple, or quad applications, contact the factory. • RGB applications 1 FN7050.1 • Video amplifiers • PCMCIA applications • Line drivers • Portable computers • High speed communications • Broadcast equipment • Active filtering Ordering Information PART NUMBER PACKAGE TAPE & REEL PKG. DWG. # EL2150CS 8-Pin SO - MDP0027 EL2150CS-T7 8-Pin SO 7” MDP0027 EL2150CS-T13 8-Pin SO 13” MDP0027 EL2150CW-T7 5-Pin SOT-23 7” (3K pcs) MDP0038 EL2150CW-T7A 5-Pin SOT-23 7” (250 pcs) MDP0038 EL2157CS 8-Pin SO - MDP0027 EL2157CS-T7 8-Pin SO 7” MDP0027 EL2157CS-T13 8-Pin SO 13” MDP0027 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners. EL2150, EL2157 Pinouts EL2150 (8-PIN SO) TOP VIEW 2 EL2157 (8-PIN SO) TOP VIEW EL2150 (5-PIN SOT-23) TOP VIEW EL2150, EL2157 Absolute Maximum Ratings (TA = 25°C) Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C Supply Voltage between VS+ and GND . . . . . . . . . . . . . . . . +12.6V Input Voltage (IN+, IN-, ENABLE, CLAMP) . . . GND-0.3V, VS+0.3V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±6V Maximum Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90mA Output Short Circuit Duration. . . . . . . . . . . . . . . . . . . . . . . . (Note 1) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA DC Electrical Specifications VS = +5V, GND = 0V, TA = 25°C, VCM = 1.5V, VOUT = 1.5V, VCLAMP = +5V, VENABLE = +5V, unless otherwise specified. (Note 1) PARAMETER VOS DESCRIPTION Offset Voltage CONDITIONS MIN TYP MAX UNIT SO package -2 2 mV SOT-23 package -3 3 mV TCVOS Offset Voltage Temperature Coefficient Measured from TMIN to TMAX IB Input Bias Current VIN = 0V IOS Input Offset Current VIN = 0V TCIOS Input Bias Current Temperature Coefficient Measured from TMIN to TMAX PSRR Power Supply Rejection Ratio VS = VENABLE = 2.7V to 12V, VCLAMP = OPEN CMRR Common Mode Rejection Ratio 10 -750 µV/°C -5.5 -10 µA 150 750 nA 50 nA/°C 55 70 dB VCM = 0V to 3.8V 55 65 dB VCM = 0V to 3.0V 55 70 dB CMIR Common Mode Input Range 0 RIN Input Resistance Common mode CIN Input Capacitance ROUT V 2 MΩ SO package 1 pF Output Resistance AV = 1 40 mΩ IS,ON Supply Current - Enabled VS = VCLAMP = 12V, VENABLE = 12V 5 6.5 mA IS,OFF Supply Current - Shut Down VS = VCLAMP = 10V, VENABLE = 0.5V 0 50 µA VS = VCLAMP = 12V, VENABLE = 0.5V 5 PSOR Power Supply Operating Range AVOL Open Loop Gain 1 VS-1.2 2.7 VS = VCLAMP = 12V, VOUT = 2V 65 µA 12.0 V 80 dB 70 dB 60 dB 10.8 V 10.0 V 4.0 V 9V, RL = 1kΩ to GND VOUT = 1.5V to 3.5V RL = 1kΩ to GND VOUT = 1.5V to 3.5V RL = 150Ω to GND VOP Positive Output Voltage Swing VS = 12V, AV = 1, RL= 1kΩ to 0V VS = 12V, AV = 1, RL = 150Ω to 0V 9.6 VS = ±5V, AV = 1, RL = 1kΩ to 0V 3 VS = ±5V, AV = 1, RL = 150Ω to 0V 3.4 3.8 V VS = 3V, AV = 1, RL = 150Ω to 0V 1.8 1.95 V EL2150, EL2157 DC Electrical Specifications VS = +5V, GND = 0V, TA = 25°C, VCM = 1.5V, VOUT = 1.5V, VCLAMP = +5V, VENABLE = +5V, unless otherwise specified. (Note 1) (Continued) PARAMETER VON IOUT DESCRIPTION Negative Output Voltage Swing Output Current (Note 2) CONDITIONS TYP MAX UNIT VS = 12V, AV = 1, RL = 150Ω to 0V 5.5 8 mV VS = ±5V, AV = 1, RL = 1kΩ to 0V -4.0 VS = ±5V, AV = 1, RL = 150Ω to 0V -3.7 VS = ±5V, AV = 1, RL = 10Ω to 0V MIN ±75 VS = ±5V, AV = 1, RL = 50Ω to 0V IOUT,OFF Output Current, Disabled VENABLE = 0.5V VIH-EN ENABLE pin Voltage for Power Up Relative to GND pin VIL-EN ENABLE pin Voltage for Shut Down Relative to GND pin IIH-EN ENABLE pin Input Current-High (Note 3) VS = VCLAMP = 12V, VENABLE = 12V IIL-EN ENABLE pin Input Current-Low (Note 3) VS = VCLAMP = 12V, VENABLE = 0.5V VOR-CL Voltage Clamp Operating Range (Note 4) Relative to GND pin VACC-CL CLAMP Accuracy VIN = 4V, RL = 1kΩ to GND V -3.4 ±100 mA ±60 mA 0 20 2.0 µA V 0.5 V 340 410 µA 0 1 µA VOP V 100 250 mV 12 25 µA 1.2 -250 V VCLAMP = 1.5V and 3.5V IIH-CL CLAMP pin Input Current - High VS = VCLAMP = 12V IIL-CL CLAMP pin Input Current - Low VS = 12V, VCLAMP = 1.2V -20 -15 µA NOTES: 1. CLAMP pin and ENABLE pin specifications apply only to the EL2157. 2. Internal short circuit protection circuitry has been built into the EL2150/EL2157. See the Applications section. 3. If the disable feature is not desired, tie the ENABLE pin to the VS pin, or apply a logic high level to the ENABLE pin. 4. The maximum output voltage that can be clamped is limited to the maximum positive output Voltage, or VOP. Applying a voltage higher than VOP inactivates the clamp. If the clamp feature is not desired, either tie the CLAMP pin to the VS pin, or simply let the CLAMP pin float. 4 EL2150, EL2157 Closed Loop AC Electrical Specifications VS = +5V, GND = 0V, TA = 25°C, VCM = +1.5V, VOUT = +1.5V, VCLAMP = +5V, VENABLE = +5V, AV = +1, RF = 0Ω, RL = 150Ω to GND pin, unless otherwise specified. (Notes 1 and 2) PARAMETER BW BW DESCRIPTION -3dB Bandwidth (VOUT = 400mVP-P) CONDITIONS MIN TYP MAX UNIT VS = 5V, AV = 1, RF = 0Ω 125 MHz VS = 5V, AV = -1, RF = 500Ω 60 MHz VS = 5V, AV = 2, RF = 500Ω 60 MHz VS = 5V, AV = 10, RF = 500Ω 6 MHz VS = 12V, AV = 1, RF = 0Ω 150 MHz VS = 3V, AV = 1, RF = 0Ω 100 MHz 25 MHz VS = 5V, AV = 1, RF = 0Ω 30 MHz VS = 3V, AV = 1, RF = 0Ω 20 MHz ±0.1dB Bandwidth (VOUT = 400mVP-P) VS = 12V, AV = 1, RF = 0Ω GBWP Gain Bandwidth Product VS = 12V, @ AV = 10 60 MHz PM Phase Margin RL = 1kΩ, CL = 6 pF 55 ° SR Slew Rate VS = 10V, RL = 150Ω, VOUT = 0V to 6V 275 V/µs VS = 5V, RL = 150Ω, VOUT = 0V to 3V 300 V/µs 200 tR,tF Rise Time, Fall Time ±0.1V step 2.8 ns OS Overshoot ±0.1V step 10 % tPD Propagation Delay ±0.1V step 3.2 ns tS 0.1% Settling Time VS = ±5V, RL = 500Ω, AV = 1, VOUT = ±3V 40 ns 0.01% Settling Time VS = ±5V, RL = 500Ω, AV = 1, VOUT = ±3V 75 ns dG Differential Gain (Note 3) AV = 2, RF = 1kΩ 0.05 % dP Differential Phase (Note 3) AV = 2, RF = 1kΩ 0.05 ° eN Input Noise Voltage f = 10kHz 48 nV/√Hz iN Input Noise Current f = 10kHz 1.25 pA/√Hz tDIS Disable Time (Note 4) 50 ns tEN Enable Time (Note 4) 25 ns tCL Clamp Overload Recovery 7 ns NOTES: 1. CLAMP pin and ENABLE pin specifications apply only to the EL2157. 2. All AC tests are performed on a “warmed up” part, except slew rate, which is pulse tested. 3. Standard NTSC signal = 286mVP-P, f = 3.58MHz, as VIN is swept from 0.6V to 1.314V.RL is DC coupled. 4. Disable/Enable time is defined as the time from when the logic signal is applied to the ENABLE pin to when the supply current has reached half its final value. 5 EL2150, EL2157 Typical Performance Curves Non-Inverting Frequency Response (Gain) Non-Inverting Frequency Response (Phase) 3dB Bandwidth vs Temperature for Non-Inverting Gains Inverting Frequency Response (Gain) Inverting Frequency Response (Phase) In 3dB Bandwidth vs Temperature for Inverting Gains Frequency Response for Various RL Frequency Response for Various CL 6 Non-Inverting Frequency Response vs Common Mode Voltage EL2150, EL2157 Typical Performance Curves 3dB Bandwidth vs Supply Voltage for Non-Inverting Gains 3dB Bandwidth vs Supply Voltage for Inverting Gains Open Loop Gain and Phase vs Frequency 7 (Continued) Frequency Response for Various Supply Voltages, AV = + 1 Frequency Response for Various Supply Voltages, AV = + 2 Open Loop Voltage Gain vs Die Temperature PSSR and CMRR vs Frequency PSRR and CMRR vs Die Temperature Closed Loop Output Impedance vs Frequency EL2150, EL2157 Typical Performance Curves Large Signal Step Response, VS = +3V (Continued) Large Signal Step Response, VS = +5V Small Signal Step Response Slew Rate vs Temperature 8 Settling Time vs Settling Accuracy Large Signal Step Response, VS = +12V Large Signal Step Response, VS = ±5V Voltage and Current Noise vs Frequency EL2150, EL2157 Typical Performance Curves (Continued) Differential Gain for Single Supply Operation Differential Phase for Single Supply Operation Differential Gain and Phase for Dual Supply Operation 2nd and 3rd Harmonic Distortion vs Frequency 2nd and 3rd Harmonic Distortion vs Frequency 2nd and 3rd Harmonic Distortion vs Frequency Output Voltage Swing vs Frequency for THD < 0.1% 9 Output Voltage Swing vs Frequency for Unlimited Distortion Output Current vs Die Temperature EL2150, EL2157 Typical Performance Curves (Continued) Supply Current vs Supply Voltage Supply Current vs Die Temperature Input Resistance vs Die Temperature Offset Voltage vs Die Temperature (4 Samples) Input Bias Current vs Input Voltage Input Offset Current and Input Bias Current vs Die Temperature Positive Output Voltage Swing vs Die Temperature, RL = 150Ω to GND Negative Output Voltage Swing vs Die Temperature, RL = 150Ω to GND Clamp Accuracy vs Die Temperature 10 EL2150, EL2157 Typical Performance Curves (Continued) Clamp Accuracy RL = 150Ω Enable Response for a Family of DC Inputs Disable/Enable Response for a Family of Sine Waves 11 Clamp Accuracy RL = 1kΩ Clamp Accuracy RL = 10kΩ Disable Response for a Family of DC Inputs OFF Isolation EL2150, EL2157 Typical Performance Curves JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.6 1.4 1.2 1.136W SO8 1 θJA=110°C/W 0.8 0.6 0.4 0.2 0 0 25 50 75 85 100 125 JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 0.6 POWER DISSIPATION (W) POWER DISSIPATION (W) 1.8 (Continued) 0.5 543mW 0.3 0.2 0.1 0 150 0 AMBIENT TEMPERATURE (°C) JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 0.6 1 0.8 781mW SO8 θJA=160°C/W 0.6 0.4 0.2 0 0 25 50 75 85 100 125 AMBIENT TEMPERATURE (°C) Burn-In Circuit 12 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) POWER DISSIPATION (W) POWER DISSIPATION (W) 1.2 SOT23-5/6 θJA=230°C/W 0.4 150 JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 488mW 0.5 SOT23-5/6 0.4 θJA=256°C/W 0.3 0.2 0.1 0 0 25 50 75 85 100 125 AMBIENT TEMPERATURE (°C) 150 EL2150, EL2157 Simplified Schematic Applications Information Product Description The EL2150 and EL2157 are the industry's fastest single supply operational amplifiers. Connected in voltage follower mode, their -3dB bandwidth is 125MHz while maintaining a 275V/µs slew rate. With an input and output common mode range that includes ground, these amplifiers were optimized for single supply operation, but will also accept dual supplies. They operate on a total supply voltage range as low as +2.7V or up to +12V. This makes them ideal for +3V applications, especially portable computers. While many amplifiers claim to operate on a single supply, and some can sense ground at their inputs, most fail to truly drive their outputs to ground. If they do succeed in driving to ground, the amplifier often saturates, causing distortion and recovery delays. However, special circuitry built into the EL2150 and EL2157 allows the output to follow the input signal to ground without recovery delays. Power Supply Bypassing And Printed Circuit Board Layout As with any high-frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended. Lead lengths should be as short as possible. The power supply pins must be well bypassed to reduce the risk of oscillation. The combination of a 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor has been shown to work well when placed at each supply pin. For single supply operation, where pin 4 (VS-) is connected to the ground plane, a single 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor across pins 7 and 4 will suffice. For good AC performance, parasitic capacitance should be kept to a minimum. Ground plane construction should be used. Carbon or Metal-Film resistors are acceptable with the 13 Metal-Film resistors giving slightly less peaking and bandwidth because of their additional series inductance. Use of sockets, particularly for the SO package should be avoided if possible. Sockets add parasitic inductance and capacitance which will result in some additional peaking and overshoot. Supply Voltage Range and Single-Supply Operation The EL2150 and EL2157 have been designed to operate with supply voltages having a span of greater than 2.7V, and less than 12V. In practical terms, this means that the EL2150 and EL2157 will operate on dual supplies ranging from ±1.35V to ±6V. With a single-supply, the EL2150 and EL2157 will operate from +2.7V to +12V. Performance has been optimized for a single +5V supply. Pins 7 and 4 are the power supply pins. The positive power supply is connected to pin 7. When used in single supply mode, pin 4 is connected to ground. When used in dual supply mode, the negative power supply is connected to pin 4. As supply voltages continue to decrease, it becomes necessary to provide input and output voltage ranges that can get as close as possible to the supply voltages. The EL2150 and EL2157 have an input voltage range that includes the negative supply and extends to within 1.2V of the positive supply. So, for example, on a single +5V supply, the EL2150 and EL2157 have an input range which spans from 0V to 3.8V. The output range of the EL2150 and EL2157 is also quite large. It includes the negative rail, and extends to within 1V of the top supply rail. On a +5V supply, the output is therefore capable of swinging from 0V to +4V. On split supplies, the output will swing ±4V. If the load resistor is tied EL2150, EL2157 to the negative rail and split supplies are used, the output range is extended to the negative rail. For other biasing conditions see the Differential Gain and Differential Phase vs Input Voltage curves. Choice Of Feedback Resistor, RF The feedback resistor forms a pole with the input capacitance. As this pole becomes larger, phase margin is reduced. This increases ringing in the time domain and peaking in the frequency domain. Therefore, RF has some maximum value which should not be exceeded for optimum performance. If a large value of RF must be used, a small capacitor in the few picofarad range in parallel with RF can help to reduce this ringing and peaking at the expense of reducing the bandwidth. Output Drive Capability In spite of their moderately low 5mA of supply current, the EL2150 and EL2157 are capable of providing ±100mA of output current into a 10Ω load, or ±60mA into 50Ω. With this large output current capability, a 50Ω load can be driven to ±3V with VS = ±5V, making it an excellent choice for driving isolation transformers in telecommunications applications. Driving Cables and Capacitive Loads For AV = +1, RF = 0Ω is optimum. For AV = -1 or +2 (noise gain of 2), optimum response is obtained with RF between 500Ω and 1kΩ. For AV = -4 or +5 (noise gain of 5), keep RF between 2kΩ and 10kΩ. When used as a cable driver, double termination is always recommended for reflection-free performance. For those applications, the back-termination series resistor will decouple the EL2150 and EL2157 from the cable and allow extensive capacitive drive. However, other applications may have high capacitive loads without a back-termination resistor. In these applications, a small series resistor (usually between 5Ω and 50Ω) can be placed in series with the output to eliminate most peaking. The gain resistor (RG) can then be chosen to make up for any gain loss which may be created by this additional resistor at the output. Video Performance Disable/Power-Down For good video performance, an amplifier is required to maintain the same output impedance and the same frequency response as DC levels are changed at the output. This can be difficult when driving a standard video load of 150Ω, because of the change in output current with DC level. Differential Gain and Differential Phase for the EL2150 and EL2157 are specified with the black level of the output video signal set to +1.2V. This allows ample room for the sync pulse even in a gain of +2 configuration. This results in dG and dP specifications of 0.05% and 0.05° while driving 150Ω at a gain of +2. Setting the black level to other values, although acceptable, will compromise peak performance. For example, looking at the single supply dG and dP curves for RL=150Ω, if the output black level clamp is reduced from 1.2V to 0.6V dG/dP will increase from 0.05%/0.05° to 0.08%/0.25° Note that in a gain of +2 configuration, this is the lowest black level allowed such that the sync tip doesn't go below 0V. The EL2157 amplifier can be disabled, placing its output in a high-impedance state. The disable or enable action takes only about 40ns. When disabled, the amplifier's supply current is reduced to 0mA, thereby eliminating all power consumption by the EL2157. The EL2157 amplifier's power down can be controlled by standard CMOS signal levels at the ENABLE pin. The applied CMOS signal is relative to the GND pin. For example, if a single +5V supply is used, the logic voltage levels will be +0.5V and +2.0V. If using dual ±5V supplies, the logic levels will be -4.5V and -3.0V. Letting the ENABLE pin float will disable the EL2157. If the power-down feature is not desired, connect the ENABLE pin to the VS+ pin. The guaranteed logic levels of +0.5V and +2.0V are not standard TTL levels of +0.8V and +2.0V, so care must be taken if standard TTL will be used to drive the ENABLE pin. As far as the output stage of the amplifier is concerned, RF+ RG appear in parallel with RL for gains other than +1. As this combination gets smaller, the bandwidth falls off. Consequently, RF has a minimum value that should not be exceeded for optimum performance. If your application requires that the output goes to ground, then the output stage of the EL2150 and EL2157, like all other single supply op amps, requires an external pull down resistor tied to ground. As mentioned above, the current flowing through this resistor becomes the DC bias current for the output stage NPN transistor. As this current approaches zero, the NPN turns off, and dG and dP will increase. This becomes more critical as the load resistor is increased in value. While driving a light load, such as 1kΩ, if the input black level is kept above 1.25V, dG and dP are a respectable 0.03% and 0.03°. 14 Output Voltage Clamp The EL2157 amplifier has an output voltage clamp. This clamping action is fast, being activated almost instantaneously, and being deactivated in <7ns, and prevents the output voltage from going above the preset clamp voltage. This can be very helpful when the EL2157 is used to drive an A/D converter, as some converters can require long times to recover if overdriven. The output voltage remains at the clamp voltage level as long as the product of the input voltage and the gain setting exceeds the clamp voltage. If the EL2157 is connected in a gain of 2, for example, and +3V DC is applied to the CLAMP pin, any voltage higher than +1.5V at the inputs will be clamped and +3V will be seen at the output. EL2150, EL2157 Figure 1 below is a unity gain connected EL2157 being driven by a 3VP-P sinewave, with 2.25V applied to the CLAMP pin. The resulting output waveform, with its output being clamped to 2.25V, is shown in Figure 2. FIGURE 1. clamp voltage. Curves of Clamp Accuracy vs VCLAMP, and VIN for 3 values of RL are included in the Typical Performance Curves Section. Unlike amplifiers that clamp at the input and are therefore limited to non-inverting applications only, the EL2157 output clamp architecture works for both inverting and non-inverting gain applications. There is also no maximum voltage difference limitation between VIN and VCLAMP which is common on input clamped architectures. The voltage clamp operates for any voltage between +1.2V above the GND pin, and the minimum output voltage swing, VOP. Forcing the CLAMP pin much below +1.2V can saturate transistors and should therefore be avoided. Forcing the CLAMP pin above VOP simply de-activates the CLAMP feature. In other words, one cannot expect to clamp any voltage higher than what the EL2157 can drive to in the first place. If the clamp feature is not desired, either let the CLAMP pin float or connect it to the VS+ pin. EL2157 Comparator Application FIGURE 2. Figure 3 shows the output of the same circuit being driven by a 0.5V to 2.75V square wave, as the clamp voltage is varied from 1.0V to 2.5V, as well as the unclamped output signal. The rising edge of the signal is clamped to the voltage applied to the CLAMP pin almost instantaneously. The output recovers from the clamped mode within 5ns - 7ns, depending on the clamp voltage. Even when the CLAMP pin is taken 0.2V below the minimum 1.2V specified, the output is still clamped and recovers in about 11ns. The EL2157 can be used as a very fast, single supply comparator by utilizing the clamp feature. Most op amps used as comparators allow only slow speed operation because of output saturation issues. However, by applying a DC voltage to the CLAMP pin of the EL2157, the maximum output voltage can be clamped, thus preventing saturation. Figure 4 below is the EL2157 implemented as a comparator. 2.5V DC is applied to the CLAMP pin, as well as the IN- pin. A differential signal is then applied between the inputs. Figure 5 shows the output square wave that results when a ±1V, 10MHz triangular wave is applied, while Figure 6 is a graph of propagation delay vs. overdrive as a square wave is presented at the input. FIGURE 4. FIGURE 3. The clamp accuracy is affected by 1) the CLAMP pin voltage, 2) the input voltage, and 3) the load resistor. Depending upon the application, the accuracy may be as little as a few tens of millivolts to a few hundred millivolts. Be sure to allow for these inaccuracies when choosing the 15 FIGURE 5. EL2150, EL2157 Propagation Delay vs Overdrive EL2157 as a Comparator outputs are tied directly together. Decoupling resistors at each output are not necessary. In fact, adding them approximately doubles the switching time to 100ns. FIGURE 6. Video Sync Pulse Remover Application All CMOS Analog to Digital Converters (A/Ds) have a parasitic latch-up problem when subjected to negative input voltage levels. Since the sync tip contains no useful video information and it is a negative going pulse, we can chop it off. Figure 7 shows a unity gain connected EL2150 and EL2157. Figure 8 shows the complete input video signal applied at the input, as well as the output signal with the negative going sync pulse removed. FIGURE 9. FIGURE 10. FIGURE 7. Short Circuit Current Limit FIGURE 8. Multiplexing with the EL2157 The ENABLE pin on the EL2157 allows for multiplexing applications. Figure 9 shows two EL2157s with their outputs tied together, driving a back terminated 75Ω video load. A 2VP-P 10MHz sinewave is applied at one input, and a 1VP-P 5MHz sinewave to the other. Figure 10 shows the CLOCK signal which is applied, and the resulting output waveform at VOUT. Switching is complete in about 50ns. Notice the 16 The EL2150 and EL2157 have internal short circuit protection circuitry that protect it in the event of its output being shorted to either supply rail. This limit is set to around 100mA nominally and reduces with increasing junction temperature. It is intended to handle temporary shorts. If an output is shorted indefinitely, the power dissipation could easily increase such that the part will be destroyed. Maximum reliability is maintained if the output current never exceeds ±90mA. A heat sink may be required to keep the junction temperature below absolute maximum when an output is shorted indefinitely. Power Dissipation With the high output drive capability of the EL2150 and EL2157, it is possible to exceed the 150°C Absolute Maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if power-supply voltages, load conditions, or EL2150, EL2157 package type need to be modified for the EL2150 and EL2157 to remain in the safe operating area. Single Supply Voltage vs RLOAD for Various VOUT (SO Package) The maximum power dissipation allowed in a package is determined according to [1]: T JMAX - T AMAX PD MAX = -------------------------------------------θ JA where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature θJA = Thermal resistance of the package PDMAX = Maximum power dissipation in the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or [2] FIGURE 11. Single Supply Voltage vs RLOAD for Various VOUT (SOT-23 Package) V OUT PD MAX = V S × I SMAX + ( V s - V OUT ) × ---------------RL where: VS = Total supply voltage ISMAX = Maximum supply current VOUT = Maximum output voltage of the application RL = Load resistance tied to ground If we set the two PDMAX equations, [1] & [2], equal to each other, and solve for VS, we can get a family of curves for various loads and output voltages according to [3]: R L × ( T AMAX - T AMAX ) 2 ---------------------------------------------------------------- + ( V OUT ) θ JA V S = ----------------------------------------------------------------------------------------------( I s × R L ) + V OUT Figures 11 and 12 show total single supply voltage VS vs RL for various output voltage swings for the SO package. The curves assume WORST CASE conditions of TA = +85°C and IS = 6.5mA. 17 FIGURE 12. EL2150, EL2157 EL2157 Macromodel * Revision A, July 1995 * When not being used, the clamp pin, pin 1, * should be connected to +Vsupply, pin 7 * Connections: +input * | -input * | | +Vsupply * | | | -Vsupply * | | | | output * | | | | | clamp * | | | | | | .subckt EL2157/el 3 2 7 4 6 1 * * Input Stage * i1 7 10 250uA i2 7 11 250uA r1 10 11 4k q1 12 2 10 qp q2 13 3 11 qpa r2 12 4 100 r3 13 4 100 * * Second Stage & Compensation * gm 15 4 13 12 4.6m r4 15 4 15Meg c1 15 4 0.36pF * * Poles * e1 17 4 15 4 1.0 r6 17 25 400 c3 25 4 1pF r7 25 18 500 c4 18 4 1pF * * Output Stage & Clamp * i3 20 4 1.0mA q3 7 23 20 qn q4 7 18 19 qn q5 7 18 21 qn q6 4 20 22 qp q7 7 23 18 qn d1 19 20 da d2 18 1 da r8 21 6 2 r9 22 6 2 r10 18 21 10k r11 7 23 100k d3 23 24 da d4 24 4 da d5 23 18 da * * Power Supply Current * ips 7 4 3.2mA * * Models 18 EL2150, EL2157 * .model qn npn(is=800e-18 bf=150 tf=0.02nS) .model qpa pnp(is=810e-18 bf=50 tf=0.02nS) .model qp pnp(is=800e-18 bf=54 tf=0.02nS) .model da d(tt=0nS) .ends EL2157 Macromodel All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. 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