Digital Power Management Done Right - Power Electronics Technology Aug 2009

designfeature
Dave Clemans,
Senior Applications Engineer, Mixed Signal Products,
Linear Technology, Milipitas, Calif.
Digital Power
Management
Done
Right
A power-management IC operates autonomously to provide
continuous supervision; takes
pre-programmed action in
response to faults; sends back
system-health data and determines if repairs are needed.
Designers of today’s networking equipment are being pushed
to increase the data throughput
and performance of their systems,
as well as add functionality and features
that differentiate them from competitors. There is also
pressure to decrease the overall power consumption while
remaining in the same physical size. And, everyone is
“going green.”
These systems require many ASICs, DSPs and processors with multiple voltage rails—line cards with 30 to 40
rail voltages are not uncommon. In data centers, the challenge is to reduce overall power consumption by rescheduling the work flow and move jobs to under-utilized servers, thereby enabling shutdown of other servers.
To meet these demands, it is essential to know the
10 Power Electronics Technology | August 2009
power consumption of the end-user equipment. A properly designed digital power-management system (PMS) can
provide the user with power-consumption data, thereby
enabling smart energy-management decisions.
A large multi-rail power board is comprised of an isolated intermediate bus converter which converts −48 V
from the backplane to an intermediate bus voltage (IBV)
and is distributed around the card, typically 12 V to as low
as 3.3 V. Individual point-of-load (POL) dc-dc converters
step down the IBV to the required rail voltages, which
range from 5 V to 0.6 V with typical currents ranging
from 1 A to 120 A (Fig. 1).
The POLs can be self-contained modules or solutions
comprising dc-dc controller ICs with associated Ls, Cs
and MOSFETs. These rails have strict requirements for
sequencing, voltage accuracy, margining and supervision.
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Digital Power Management
tal power-management systems:
Clearly, the sophistication of power management is increasSequencing. Certain processors demand that their I/O volting. Power-management circuitry must be robust, easy
age rise before their core voltage, but certain DSPs require
to use, and must not consume too much of the available
their core voltage to rise before their I/O. Power-down
board area. In the past, power-management (PM) functions
sequencing is now required. ASICs with seven voltage
have been realized using a plethora of ICs such as FPGAs,
rails to sequence are now common. An ideal sequencer
sequencers, supervisors, DACs and margin controllers.
would allow arbitrary sequencing of any rail in the system
Newer power-management ICs combine multiple functions
and allow any rail to depend on any other rail. This can be
and can control all the rails on the board.
accomplished by using one universal clock to synchronize
Fig. 2 shows an example of one channel of Linear
all sequencer ICs to the same time base. Since sequencing
Technology’s LTC2978 digital power-management IC condelays are typically at the millisecond level, this clock can
trolling a dc-dc converter. Such solutions may operate autonbe low frequency and low noise, such as 100 kHz. In a
omously or communicate with a system host processor for
multi-rail sequencer, most dependencies are established with
command, control and to report telemetry. The LTC2978
configurable settings within the sequencer. If there is a need
combines all the required features into a single device that
to establish dependencies across sequencers, a fault-sharing
can be tied together with other LTC2978s via a single clock
bus can be used between sequencers. A fault group may be
line and optional fault sharing lines to control up to 72
the core and I/O rail of one processor or all seven rails on an
voltages on a single segment of an I2C bus. Let’s examine
ASIC. A dependency is established between these rails, such
some of the key requirements of such power-management
that if one of them does not come up to its full voltage dursystems.
ing the power-up sequence, the sequence is aborted. For an
The PMBus command language was developed to address
example of sequencing up, down and margining, see Fig. 3.
the needs of large multi-rail systems. PMBus is an open stanSupervision. High-speed comparators must monitor the
dard power-management protocol with a fully defined comvoltage levels of each rail and take immediate protective
mand language that facilitates communication with power
action if a rail goes out of its specified safe limits. The host
converters, power-management
devices and system host processors
INT BUS
ALERT
in a power system. In addition to a
SYSTEM
SIGNAL
VOUT1
LTC2978
HOST
well-defined set of standard comVOUT2
PROCESSOR
VOUT3
mands, PMBus-compliant devices
VOUT4
8
can also implement their own
DIGITAL
VOUT5
POWER
VOUT6
proprietary commands to provide
TRIM
MANAGER
VOUT7
I2C
innovative value-added features.
VOUT8
DC/DC
BUS
The standardization of the
8
majority of the commands and the
ENABLE
8
data format is a great advantage
VOUT SENSE OR IOUT SENSE
to OEMs producing these boards.
INT BUS
The protocol is implemented over
the industry-standard SMBus serial
VOUT9
LTC2978
VOUT10
interface and enables programming,
VOUT11
control, and real-time monitoring
VOUT12
8
DIGITAL
VOUT13
of power conversion products.
POWER
VOUT14
MANAGER TRIM
Command language and dataVOUT15
VOUT16
DC/DC
format standardization allows for
8
easy firmware development and
ENABLE
reuse by OEMs, which results in
8
reduced time-to-market for powerVOUT SENSE OR IOUT SENSE
systems designers. For more infor1 WIRE SYNC CLOCK
mation, visit http://pmbus.org.
OPTIONAL FAULT BUS (1 TO 4 WIRES)
ALERTB SIGNAL
Digital PM System Requirements
TO OTHER LTC2978s
Following are the major requirements that designers must consider Fig. 1. A typical on-board digital power-management architecture showing LTC2978s controlling multiple dc-dc
when developing board-level digi- converters.
clemans_Fig1Callouts_aug2009
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11
digitalpower-management
4.5 V < VIBUS < 15 V
LTC2978
PMBUS
VOUT
VDAC+
VSENSE+
EEPROM
VDAC–
VSENSE–
VOUT_EN
DGND
GND
R30
R20
SEQUENCE
DOWN
DC-DC
CONVERTER
2.5 V
VFB
LOAD
MARGIN
SEQUENCE
UP
3.3 V
VIN
VIN_SNS
VPWR
R10
2V
1.8 V
SGND
RUN/SS
GND
1.5 V
0.5V/DIV
1.2 V
1V
0.8 V
ONE OF EIGHT CHANNELS SHOWN
Fig. 2. One channel of an LTC2978 digital PM IC controls a dc-dc converter, which
may operate autonomously or communicate with a system host processor for
command, control and reporting.
is notified that a fault has occurred via the SMBus ALERTB
line and dependent rails are shut down to protect the ASIC.
Achieving
this requires reasonable accuracy and response
clemans_Fig2
times on the order of tens of microseconds. It is also useful
to have variable deglitching of the overvoltage/undervoltage
function to prevent false trips on noisy rails.
Accuracy. As voltages drop below 1.8
V, many off-the-shelf modules have
trouble maintaining Vout accuracy over
temperature. Absolute accuracy requirements of ±10 mV are not uncommon. It
may be necessary to trim the output
voltage. OEMs perform margin testing
to ensure their systems function properly even if rail voltages drift.
This rail-voltage drift can be completely eliminated by externally trimming
the module. The power-management IC contains a digital
servo loop that measures the rail voltage and continuously
trims out any inaccuracies.
Margining. The same digital servo loop described above is
used to margin the rail voltages up and down during manufacturing test with one I2C command. There is one servo
per channel.
Voltage and current monitoring. To achieve the desired reductions in power consumption, it is necessary to characterize
the loads during all modes of operation. FPGA users now
optimize their code to minimize power. Real-time telemetry
makes this easy. Off-the-shelf modules do not report current
or voltage.
To accurately measure currents without introducing
unwanted loss, the power-management IC must have extreme
accuracy and resolution. For example, a 20-A/1-V power stage
might have an output inductor with a 0.5-mΩ dc resistance.
To accurately measure its output power in increments of 1 W,
a resolution of less than 500 µV is needed. The LTC2978 has
8 SUPPLIES IN
ANY ORDER
INDIVIDUAL
MARGINING
FOR 8 SUPPLIES
8 SUPPLIES IN
ANY ORDER
200 ms/DIV
Fig. 3. Sequencing up and down, margining, and establishing dependencies
betweenclemans_Fig
rails are essential
functions of a power-management IC.
3
a resolution of 15.6 µV and an accuracy of 0.25%.
Fault diagnosis. Wouldn’t it be great if
you could immediately find out what’s
wrong with your 40-rail prototype board
when it fails to power-up the first time?
Now it’s possible. Inside the PM IC is a
log of all the faults that have occurred.
It is a simple task for the PM IC to
indicate which rail has faulted or which
part has exceeded its temperature limit
and shutoff.
Fault logging. Wouldn’t it be great to
be able to hook up your PC to a field return, click a button
in a GUI and read a log of what happened in the last 500
ms prior to the failure? Now it’s possible. The PM IC has a
rolling average recorder that records peak and instantaneous
values of voltages, currents and temperature. Designers will
also find this useful during the prototype phase.
Autonomous operation. We have already discussed firmware
and protocols that allow real-time communication, command and control, but a really good power-management IC
must perform all of the functions without any intervention
from a host processor. The PM IC is programmed at the factory. Then, set it and forget it.
Wouldn’t it be
great if you could
immediately find
out why your 40-rail
prototype board fails
to power up?
12 Power Electronics Technology | August 2009
Using These Features While Keeping it Simple
That’s where the GUI comes in (Fig. 4). A user-friendly
interactive GUI allows the designer to plug a PC into his
board through a tiny connector and use all these features.
The power-management system can be completely programmed and controlled without having to write a single
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digitalpower-management
Fig. 4. A GUI allows the designer to plug a PC into his board via connector, enabling the power-management system
to be completely programmed and controlled without writing a single line of code.
line of code.
The GUI translates commands into
a configuration file that is stored in the
EEPROM of the PM. An offline mode
allows the user to develop a configuration file for loading into the part.
During board development, users
interactively optimize their configuration. Once complete, the custom
configuration file is sent to the IC
manufacturer or the contract manufacturer and pre-loaded into the powermanagement IC.
First-pass success is assured. Digital
power management adds value during four key phases of the system life
cycle:
1. During the design and development
phase, the designer can configure
the digital PM system to optimize
sequencing, minimize power consumption and characterize system
performance.
2. Production margin testing is easier
to perform than using traditional
methods because the entire test can
be controlled by a couple of standard commands over an I2C bus.
www.powerelectronics.com 3. C
omplicated FPGAs with a lot of
custom code are not required.
4. At system power up, the board is
protected against faulty power converters because the PM IC immediately prevents the power-up of any
voltages that are dependent on each
other if one of them fails to start.
The PM IC provides a simple
GUI that informs the assembler if
any power supply fails. In the field,
the power-management IC operates
autonomously to provide continuous
supervision and takes pre-programmed
action in response to faults. The digital
power-management system can also
be used to send data back to the OEM
about system health status to determine if repairs are needed.
If a board is returned, the fault log
can be read back to determine which
fault occurred, the board temperature
and the time of the fault. This data can
be used to quickly determine root
cause, determine if the system was
operated outside specified operating
limits or to improve the design of
future products.
August 2009 | Power Electronics Technology
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