DATASHEET

EL5393A
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September 22, 2010
Triple 300MHz Current Feedback Amplifier
with Enable
The EL5393A is a triple current
feedback amplifier with a bandwidth of
300MHz. This makes these amplifiers
ideal for today’s high speed video and monitor applications.
FN7195.2
Features
• 300MHz -3dB bandwidth
• 4mA supply current (per amplifier)
• Single and dual supply operation, from 5V to 10V
• Fast enable/disable
With a supply current of just 4mA per amplifier and the ability
to run from a single supply voltage from 5V to 10V, these
amplifiers are also ideal for hand held, portable or battery
powered equipment.
• Available in 16-pin QSOP package
The EL5393A also incorporates an enable and disable
function to reduce the supply current to 100µA typical per
amplifier. Allowing the CE pin to float or applying a low logic
level will enable the amplifier.
• High speed, 6mA, 600MHz product available (EL5192,
EL5292, and EL5392)
For applications where board space is critical, the EL5393A
is offered in 16-pin QSOP package, as well as an industry
standard 16-pin SO (0.150"). The EL5393A operates over
the industrial temperature range of -40°C to +85°C.
• Battery-powered equipment
PART NUMBER
Applications
• Hand-held, portable devices
• Video amplifiers
• RGB amplifiers
PACKAGE
PKG.
DWG. #
EL5393ACS
EL5393ACS
16-Pin SO (0.150") MDP0027
EL5393ACS-T7*
EL5393ACS
16-Pin SO (0.150") MDP0027
Tape and Reel
EL5393ACS-T13* EL5393ACS
16-Pin SO (0.150") MDP0027
Tape and Reel
EL5393ACU
5393ACU
16-Pin QSOP
MDP0040
EL5393ACU-T7*
5393ACU
16-Pin QSOP
Tape and Reel
MDP0040
EL5393ACU-T13* 5393ACU
16-Pin QSOP
Tape and Reel
MDP0040
*Please refer to TB347 for details on reel specifications.
1
• High speed, 1GHz product available (EL5191)
• Cable drivers
Ordering Information
PART
MARKING
• Single (EL5193) and dual (EL5293) available
• Test equipment
• Instrumentation
• Current to voltage converters
Pinout
EL5393A
[16-PIN SO (0.150”), QSOP]
TOP VIEW
INA+
16 INA-
1
-
15 OUTA
CEA
2
VS-
3
CEB
4
INB+
5
12 INB-
NC
6
11 NC
CEC
7
INC+
8
+
14 VS+
+
-
+
-
13 OUTB
10 OUTC
9
INC-
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004, 2010. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
EL5393A
Absolute Maximum Ratings (TA = 25°C)
Thermal Information
Supply Voltage between VS+ and VS- . . . . . . . . . . . . . . . . . . . . . 11V
Pin Voltages . . . . . . . . . . . . . . . . . . . . . . . . . VS- -0.5V to VS+ +0.5V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 50mA
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VS+ = +5V, VS- = -5V, RF = 750Ω for AV = 1, RF = 375Ω for AV = 2, RL = 150Ω, TA = 25°C unless otherwise
specified.
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
AC PERFORMANCE
BW
-3dB Bandwidth
AV = +1
300
MHz
AV = +2
200
MHz
20
MHz
2200
V/µs
BW1
0.1dB Bandwidth
SR
Slew Rate
VO = -2.5V to +2.5V, AV = +2
tS
0.1% Settling Time
VOUT = -2.5V to +2.5V, AV = -1
12
ns
CS
Channel Separation
f = 5MHz
60
dB
eN
Input Voltage Noise
4.4
nV/√Hz
iN-
IN- Input Current Noise
17
pA/√Hz
iN+
IN+ Input Current Noise
50
pA/√Hz
dG
Differential Gain Error (Note 1)
AV = +2
0.03
%
dP
Differential Phase Error (Note 1)
AV = +2
0.04
°
1900
DC PERFORMANCE
VOS
Offset Voltage
TCVOS
Input Offset Voltage Temperature
Coefficient
ROL
Transimpedance
-10
Measured from TMIN to TMAX
1
10
mV
5
µV/°C
300
600
kΩ
INPUT CHARACTERISTICS
CMIR
Common Mode Input Range
±3
±3.3
V
CMRR
Common Mode Rejection Ratio
42
50
dB
+IIN
+ Input Current
-60
1
80
µA
-IIN
- Input Current
-35
1
35
µA
RIN
Input Resistance
45
kΩ
CIN
Input Capacitance
0.5
pF
OUTPUT CHARACTERISTICS
VO
RL = 150Ω to GND
±3.4
±3.7
V
RL = 1kΩ to GND
±3.8
±4.0
V
Output Current
RL = 10Ω to GND
95
120
mA
ISON
Supply Current - Enabled
No load, VIN = 0V
3
4
5
mA
ISOFF
Supply Current - Disabled
No load, VIN = 0V
300
450
µA
IOUT
Output Voltage Swing
SUPPLY
2
FN7195.2
September 22, 2010
EL5393A
Electrical Specifications
VS+ = +5V, VS- = -5V, RF = 750Ω for AV = 1, RF = 375Ω for AV = 2, RL = 150Ω, TA = 25°C unless otherwise
specified. (Continued)
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
75
PSRR
Power Supply Rejection Ratio
DC, VS = ±4.75V to ±5.25V
55
-IPSR
- Input Current Power Supply Rejection
DC, VS = ±4.75V to ±5.25V
-2
MAX
UNIT
dB
2
µA/V
ENABLE
tEN
Enable Time
40
ns
tDIS
Disable Time
600
ns
IIHCE
CE Pin Input High Current
CE = VS+
0.8
6
µA
IILCE
CE Pin Input Low Current
CE = VS-
0
-0.1
µA
VIHCE
CE Input High Voltage for Power-down
VILCE
CE Input Low Voltage for Power-down
VS+ -1
V
VS+ -3
V
NOTE:
1. Standard NTSC test, AC signal amplitude = 286mVP-P, f = 3.58MHz.
3
FN7195.2
September 22, 2010
EL5393A
Typical Performance Curves
Non-Inverting Frequency Response (Gain)
Non-Inverting Frequency Response (Phase)
90
AV=1
2
AV=1
0
AV=2
AV=2
Phase (°)
Normalized Magnitude (dB)
6
-2
AV=5
-6
-90
AV=5
-180
AV=10
AV=10
-10
-270
-14
1M
RF=750Ω
RL=150Ω
10M
100M
-360
1M
1G
RF=750Ω
RL=150Ω
10M
Frequency (Hz)
Inverting Frequency Response (Gain)
90
AV=-1
2
AV=-2
AV=-1
0
Phase (°)
Normalized Magnitude (dB)
1G
Inverting Frequency Response (Phase)
6
-2
AV=-3
-6
-10
-90
AV=-2
AV=-3
-180
-270
RF=500Ω
RL=150Ω
-14
1M
10M
100M
-360
1M
1G
RF=500Ω
RL=150Ω
10M
Frequency (Hz)
100M
1G
Frequency (Hz)
Frequency Response for Various CIN-
Frequency Response for Various RL
6
6
2pF added
1pF added
2
-2
0pF added
-6 A =2
V
RF=500Ω
RL=150Ω
-10
1M
10M
100M
Frequency (Hz)
4
1G
Normalized Magnitude (dB)
10
Normalized Magnitude (dB)
100M
Frequency (Hz)
2
RL=100Ω
-2
RL=500Ω
RL=150Ω
-6
-10
-14
1M
AV=2
RF=500Ω
10M
100M
1G
Frequency (Hz)
FN7195.2
September 22, 2010
EL5393A
Typical Performance Curves
(Continued)
Frequency Response for Various CL
AV=2
RL=150Ω
RF=RG=500Ω
10
Frequency Response for Various RF
6
33pF
Normalized Magnitude (dB)
Normalized Magnitude (dB)
14
22pF
6
15pF
2
8pF
-2
340Ω
620Ω
-2
750Ω
-6
1.2kΩ
-10
0pF
-6
1M
10M
100M
-14
1M
1G
AV=2
RG=RF
RL=150Ω
10M
Frequency (Hz)
Group Delay vs Frequency
6
Delay (ns)
Normalized Magnitude (dB)
3
AV=2
RF=500Ω
2
1.5
AV=1
RF=750Ω
1
0.5
0
1M
10M
1G
100M
Frequency Response for Various Common-Mode
Input Voltages
VCM=3V
-2
VCM=-3V
-6
-10
-14
1M
1G
VCM=0V
2
AV=2
RF=500Ω
RL=150Ω
10M
Frequency (Hz)
100M
1G
Frequency (Hz)
Transimpedance (ROL) vs Frequency
PSRR and CMRR vs Frequency
10M
20
Phase
0
1M
PSRR+
100k
-180
10k
-270
Gain
1k
PSRR/CMRR (dB)
0
-90
Phase (°)
Magnitude (Ω)
100M
Frequency (Hz)
3.5
2.5
475Ω
2
-20
PSRR-40
CMRR
-60
-360
100
1k
10k
100k
1M
10M
Frequency (Hz)
5
100M
1G
-80
10k
100k
1M
10M
Frequency (Hz)
100M
1G
FN7195.2
September 22, 2010
EL5393A
Typical Performance Curves
-3dB Bandwidth vs Supply Voltage for NonInverting Gains
RF=750Ω
RL=150Ω
-3dB Bandwidth (MHz)
350
250
-3dB Bandwidth vs Supply Voltage for Inverting
Gains
AV=1
-3dB Bandwidth (MHz)
400
(Continued)
300
250
200
AV=2
150
AV=5
100
50
200
AV=-1
150
AV=-2
100
AV=-5
50
RF=500Ω
RL=150Ω
AV=10
0
5
6
7
8
9
0
10
5
6
Total Supply Voltage (V)
Peaking vs Supply Voltage for Non-Inverting Gains
4
2.5
2
1.5
1.5
AV=-1
1
AV=2
1
AV=-2
0.5
0
5
AV=1
6
7
8
9
0
5
10
RF=750Ω
RL=150Ω
AV=1
300
200
AV=2
100
AV=5
0
-40
250
-3dB Bandwidth (MHz)
-3dB Bandwidth (MHz)
-3dB Bandwidth vs Temperature for Non-Inverting
Gains
400
AV=10
10
60
110
Ambient Temperature (°C)
6
6
7
8
9
10
Total Supply Voltage (V)
Total Supply Voltage (V)
500
10
RF=500Ω
RL=150Ω
2
AV=1
0.5
9
Peaking vs Supply Voltage for Inverting Gains
Peaking (dB)
Peaking (dB)
3
8
2.5
RF=750Ω
RL=150Ω
3.5
7
Total Supply Voltage (V)
160
-3dB Bandwidth vs Temperature for Inverting
Gains
200
AV=-1
AV=-2
150
100
AV=-5
50
0
-40
RF=500Ω
RL=150Ω
10
60
110
160
Ambient Temperature (°C)
FN7195.2
September 22, 2010
EL5393A
Typical Performance Curves
(Continued)
Peaking vs Temperature
2.5
Voltage and Current Noise vs Frequency
1k
RL=150Ω
Voltage Noise (nV/√Hz)
Current Noise (pA/√Hz)
2
Peaking (dB)
AV=1
1.5
1
0.5
AV=-1
0
-0.5
-40
10
60
110
100
i n+
i n-
10
en
1
100
160
1k
Ambient Temperature (°C)
10
10
8
1
0.1
0.01
0.001
10M
6
4
2
0
100
1k
10k
100k
1M
10M
Frequency (Hz)
100M
1G
0
2nd and 3rd Harmonic Distortion vs Frequency
-20
25
AV=+2
VOUT=2VP-P
RL=100Ω
-30
Input Power Intercept (dBm)
Harmonic Distortion (dBc)
1M
Supply Current vs Supply Voltage
100
Supply Current (mA)
Output Impedance (Ω)
Closed Loop Output Impedance vs Frequency
10k
100k
Frequency (Hz)
-40
2nd Order
Distortion
-50
-60
3rd Order
Distortion
-70
-80
-90
1
10
Frequency (MHz)
7
100
2
4
6
8
Supply Voltage (V)
10
12
Two-Tone 3rd Order
Input Referred Intermodulation Intercept (IIP3)
20
AV=+2
RL=150Ω
15
10
5
0
-5
-10
10
AV=+2
RL=100Ω
100
Frequency (MHz)
FN7195.2
September 22, 2010
EL5393A
Typical Performance Curves
Differential Gain/Phase vs DC Input
Voltage at 3.58MHz
AV=2
RF=RG=500Ω
RL=150Ω
0.02
dG (%) or dP (°)
0.01
0.04
dP
AV=1
RF=750Ω
RL=500Ω
0.02
0
dG
-0.01
-0.02
-0.01
-0.02
-0.03
0
0.5
dG
0
-0.04
-0.5
-0.04
-1
1
dP
0.01
-0.03
-0.05
-1
Differential Gain/Phase vs DC Input
Voltage at 3.58MHz
0.03
dG (%) or dP (°)
0.03
(Continued)
-0.5
DC Input Voltage
Output Voltage Swing vs Frequency
THD<1%
10
RL=500Ω
Output Voltage Swing (VPP)
Output Voltage Swing (VPP)
10
8
RL=150Ω
6
4
2
0
AV=2
1
10
Frequency (MHz)
0
1
Output Voltage Swing vs Frequency
THD<0.1%
8
RL=500Ω
6
RL=150Ω
4
2
0
100
Small Signal Step Response
AV=2
1
10
Frequency (MHz)
100
Large Signal Step Response
VS=±5V
RL=150Ω
AV=2
RF=RG=500Ω
200mV/div
0.5
DC Input Voltage
VS=±5V
RL=150Ω
AV=2
RF=RG=500Ω
1V/div
10ns/div
8
10ns/div
FN7195.2
September 22, 2010
EL5393A
Typical Performance Curves
(Continued)
Settling Time vs Settling Accuracy
Transimpedance (RoI) vs Temperature
25
625
AV=2
RF=RG=500Ω
RL=150Ω
VSTEP=5VP-P output
600
15
RoI (kΩ)
Settling Time (ns)
20
10
575
550
5
0
0.01
0.1
525
-40
1
10
PSRR and CMRR vs Temperature
110
160
110
160
ICMR and IPSR vs Temperature
90
2
80
PSRR
ICMR/IPSR (µA/V)
60
50
CMRR
40
ICMR+
1.5
70
PSRR/CMRR (dB)
60
Die Temperature (°C)
Settling Accuracy (%)
30
1
IPSR
0.5
ICMR-
0
20
10
-40
10
60
110
-0.5
-40
160
10
Die Temperature (°C)
60
Die Temperature (°C)
Offset Voltage vs Temperature
Input Current vs Temperature
2
60
40
Input Current (µA)
VOS (mV)
1
0
-1
20
IB0
IB+
-20
-40
-2
-40
10
60
Die Temperature (°C)
9
110
160
-60
-40
10
60
110
160
Temperature (°C)
FN7195.2
September 22, 2010
EL5393A
Typical Performance Curves
(Continued)
Positive Input Resistance vs Temperature
Supply Current vs Temperature
60
5
50
Supply Current (mA)
4
RIN+ (kΩ)
40
30
20
10
0
-40
10
60
110
3
2
1
0
-40
160
10
Temperature (°C)
4.2
Positive Output Swing vs Temperature for Various
Loads
-3.5
4.1
160
150Ω
-3.7
VOUT (V)
3.9
3.8
3.7
110
Negative Output Swing vs Temperature for Various
Loads
-3.6
1kΩ
4
VOUT (V)
60
Temperature (°C)
-3.8
-3.9
-4
150Ω
3.6
1kΩ
-4.1
3.5
-40
10
60
110
-4.2
-40
160
10
Temperature (°C)
60
110
160
Temperature (°C)
Output Current vs Temperature
Slew Rate vs Temperature
130
4000
Slew Rate (V/µS)
Sink
IOUT (mA)
125
120
115
-40
Source
10
60
Die Temperature (°C)
10
110
160
3500
3000
2500
-40
AV=2
RF=RG=500Ω
RL=150Ω
10
60
110
160
Die Temperature (°C)
FN7195.2
September 22, 2010
EL5393A
Typical Performance Curves
(Continued)
Channel-to-Channel Isolation vs Frequency
0
1
Package Power Dissipation vs Ambient Temperature
JEDEC JESD51-3 Low Effective Thermal Conductivity Test
Board
0.9
Power Dissipation (W)
Gain (dB)
-20
-40
-60
-80
909mW
0.8
0.7
0.6
633mW
0.5
0.4
0.3
SO
16
(0
11
.1
0°
50
C
”)
/W
QS
OP
15
16
8°
C/
W
0.2
0.1
-100
100k
1M
10M
100M
400M
0
0
Frequency (Hz)
25
50
75 85 100
125
150
Ambient Temperature (°C)
Package Power Dissipation vs Ambient
Temperature - JEDEC JESD51-7 High Effective
Thermal Conductivity Test Board
Enable Response
1.4
Power Dissipation (W)
1.2
1.250W
SO16 (0.150”)
80°C/W
1
0.8
500mV/div
893mW
0.6
QSOP16
112°C/W
0.4
5V/div
0.2
0
0
25
50
75 85
100
125
20ns/div
150
Ambient Temperature (°C)
Disable Response
500mV/div
5V/div
400ns/div
11
FN7195.2
September 22, 2010
EL5393A
PIN DESCRIPTIONS
16-PIN SO
(0.150")
16-PIN QSOP
PIN NAME
1
1
INA+
FUNCTION
EQUIVALENT CIRCUIT
Non-inverting input, channel A
VS+
IN+
IN-
VSCircuit 1
2
2
CEA
Chip enable, channel A
VS+
CE
VSCircuit 2
3
3
VS-
Negative supply
4
4
CEB
Chip enable, channel B
(See circuit 2)
5
5
INB+
Non-inverting input, channel B
(See circuit 1)
6, 11
6, 11
NC
7
7
CEC
Chip enable, channel C
(See circuit 2)
8
8
INC+
Non-inverting input, channel C
(See circuit 1)
9
9
INC-
Inverting input, channel C
(See circuit 1)
10
10
OUTC
Not connected
Output, channel C
VS+
OUT
VSCircuit 3
12
12
INB-
13
13
OUTB
14
14
VS+
15
15
OUTA
16
16
INA-
Inverting input, channel B
(See circuit 1)
Output, channel B
(See circuit 3)
Positive supply
Output, channel A
(See circuit 3)
Inverting input, channel A
(See circuit 1)
Applications Information
Product Description
The EL5393A is a current-feedback operational amplifier
that offers a wide -3dB bandwidth of 300MHz and a low
supply current of 4mA per amplifier. The EL5393A works
with supply voltages ranging from a single 5V to 10V and
they are also capable of swinging to within 1V of either
supply on the output. Because of their current-feedback
topology, the EL5393A does not have the normal gainbandwidth product associated with voltage-feedback
12
operational amplifiers. Instead, its -3dB bandwidth to remain
relatively constant as closed-loop gain is increased. This
combination of high bandwidth and low power, together with
aggressive pricing make the EL5393A the ideal choice for
many low-power/high-bandwidth applications such as
portable, handheld, or battery-powered equipment.
For varying bandwidth needs, consider the EL5191 with
1GHz on a 9mA supply current or the EL5192 with 600MHz
on a 6mA supply current. Versions include single, dual, and
triple amp packages with 5-pin SOT23, 16-pin QSOP, and
8-pin or 16-pin SO (0.150") outlines.
FN7195.2
September 22, 2010
EL5393A
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Low
impedance ground plane construction is essential. Surface
mount components are recommended, but if leaded
components are used, lead lengths should be as short as
possible. The power supply pins must be well bypassed to
reduce the risk of oscillation. The combination of a 4.7µF
tantalum capacitor in parallel with a 0.01µF capacitor has
been shown to work well when placed at each supply pin.
For good AC performance, parasitic capacitance should be
kept to a minimum, especially at the inverting input. (See the
Capacitance at the Inverting Input section) Even when
ground plane construction is used, it should be removed
from the area near the inverting input to minimize any stray
capacitance at that node. Carbon or Metal-Film resistors are
acceptable with the Metal-Film resistors giving slightly less
peaking and bandwidth because of additional series
inductance. Use of sockets, particularly for the SO (0.150")
package, should be avoided if possible. Sockets add
parasitic inductance and capacitance which will result in
additional peaking and overshoot.
Disable/Power-Down
The EL5393A amplifier can be disabled placing its output in
a high impedance state. When disabled, the amplifier supply
current is reduced to < 450µA. The EL5393A is disabled
when its CE pin is pulled up to within 1V of the positive
supply. Similarly, the amplifier is enabled by floating or
pulling its CE pin to at least 3V below the positive supply. For
±5V supply, this means that an EL5393A amplifier will be
enabled when CE is 2V or less, and disabled when CE is
above 4V. Although the logic levels are not standard TTL,
this choice of logic voltages allows the EL5393A to be
enabled by tying CE to ground, even in 5V single supply
applications. The CE pin can be driven from CMOS outputs.
Capacitance at the Inverting Input
Any manufacturer’s high-speed voltage- or current-feedback
amplifier can be affected by stray capacitance at the
inverting input. For inverting gains, this parasitic capacitance
has little effect because the inverting input is a virtual
ground, but for non-inverting gains, this capacitance (in
conjunction with the feedback and gain resistors) creates a
pole in the feedback path of the amplifier. This pole, if low
enough in frequency, has the same destabilizing effect as a
zero in the forward open-loop response. The use of largevalue feedback and gain resistors exacerbates the problem
by further lowering the pole frequency (increasing the
possibility of oscillation).
The EL5393A has been optimized with a 475Ω feedback
resistor. With the high bandwidth of these amplifiers, these
resistor values might cause stability problems when
combined with parasitic capacitance, thus ground plane is
13
not recommended around the inverting input pin of the
amplifier.
Feedback Resistor Values
The EL5393A has been designed and specified at a gain of
+2 with RF approximately 500Ω. This value of feedback
resistor gives 200MHz of -3dB bandwidth at AV=2 with 2dB
of peaking. With AV=-2, an RF of approximately 500Ω gives
175MHz of bandwidth with 0.2dB of peaking. Since the
EL5393A is a current-feedback amplifier, it is also possible
to change the value of RF to get more bandwidth. As seen in
the curve of Frequency Response for Various RF and RG,
bandwidth and peaking can be easily modified by varying the
value of the feedback resistor.
Because the EL5393A is a current-feedback amplifier, its
gain-bandwidth product is not a constant for different closedloop gains. This feature actually allows the EL5393A to
maintain about the same -3dB bandwidth. As gain is
increased, bandwidth decreases slightly while stability
increases. Since the loop stability is improving with higher
closed-loop gains, it becomes possible to reduce the value
of RF below the specified 475Ω and still retain stability,
resulting in only a slight loss of bandwidth with increased
closed-loop gain.
Supply Voltage Range and Single-Supply
Operation
The EL5393A has been designed to operate with supply
voltages having a span of greater than 5V and less than 10V.
In practical terms, this means that the EL5393A will operate
on dual supplies ranging from ±2.5V to ±5V. With singlesupply, the EL5393A will operate from 5V to 10V.
As supply voltages continue to decrease, it becomes
necessary to provide input and output voltage ranges that
can get as close as possible to the supply voltages. The
EL5393A has an input range which extends to within 2V of
either supply. So, for example, on +5V supplies, the
EL5393A has an input range which spans ±3V. The output
range of the EL5393A is also quite large, extending to within
1V of the supply rail. On a ±5V supply, the output is therefore
capable of swinging from -4V to +4V. Single-supply output
range is larger because of the increased negative swing due
to the external pull-down resistor to ground.
Video Performance
For good video performance, an amplifier is required to
maintain the same output impedance and the same
frequency response as DC levels are changed at the output.
This is especially difficult when driving a standard video load
of 150Ω, because of the change in output current with DC
level. Previously, good differential gain could only be
achieved by running high idle currents through the output
transistors (to reduce variations in output impedance.)
These currents were typically comparable to the entire 4mA
supply current of each EL5393A amplifier. Special circuitry
FN7195.2
September 22, 2010
EL5393A
has been incorporated in the EL5393A to reduce the
variation of output impedance with current output. This
results in dG and dP specifications of 0.03% and 0.04°, while
driving 150Ω at a gain of 2.
Video performance has also been measured with a 500Ω
load at a gain of +1. Under these conditions, the EL5393A
has dG and dP specifications of 0.03% and 0.04°.
Output Drive Capability
In spite of its low 4mA of supply current, the EL5393A is
capable of providing a minimum of ±95mA of output current.
With a minimum of ±95mA of output drive, the EL5393A is
capable of driving 50Ω loads to both rails, making it an
excellent choice for driving isolation transformers in
telecommunications applications.
where:
TMAX = Maximum ambient temperature
θJA = Thermal resistance of the package
n = Number of amplifiers in the package
PDMAX = Maximum power dissipation of each amplifier in
the package
PDMAX for each amplifier can be calculated as follows:
V OUTMAX
PD MAX = ( 2 × V S × I SMAX ) + ( V S - V OUTMAX ) × ---------------------------R
L
where:
Driving Cables and Capacitive Loads
VS = Supply voltage
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, the back-termination series resistor will
decouple the EL5393A from the cable and allow extensive
capacitive drive. However, other applications may have high
capacitive loads without a back-termination resistor. In these
applications, a small series resistor (usually between 5Ω and
50Ω) can be placed in series with the output to eliminate
most peaking. The gain resistor (RG) can then be chosen to
make up for any gain loss which may be created by this
additional resistor at the output. In many cases it is also
possible to simply increase the value of the feedback
resistor (RF) to reduce the peaking.
ISMAX = Maximum supply current of 1A
VOUTMAX = Maximum output voltage (required)
RL = Load resistance
Current Limiting
The EL5393A has no internal current-limiting circuitry. If the
output is shorted, it is possible to exceed the Absolute
Maximum Rating for output current or power dissipation,
potentially resulting in the destruction of the device.
Power Dissipation
With the high output drive capability of the EL5393A, it is
possible to exceed the 125°C Absolute Maximum junction
temperature under certain very high load current conditions.
Generally speaking when RL falls below about 25Ω, it is
important to calculate the maximum junction temperature
(TJMAX) for the application to determine if power supply
voltages, load conditions, or package type need to be
modified for the EL5393A to remain in the safe operating
area. These parameters are calculated as follows:
T JMAX = T MAX + ( θ JA × n × PD MAX )
14
FN7195.2
September 22, 2010
EL5393A
Small Outline Package Family (SO)
A
D
h X 45¬
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “
1
(N/2)
B
L1
0.010 M C A B
e
H
C
A2
GAUGE
PLANE
SEATING
PLANE
A1
0.004 C
0.010 M C A B
L
b
0.010
4¬× ¬±
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SYMBOL
SO-14
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCE
NOTES
A
0.068
0.068
0.068
0.104
0.104
0.104
0.104
MAX
-
A1
0.006
0.006
0.006
0.007
0.007
0.007
0.007
±0.003
-
A2
0.057
0.057
0.057
0.092
0.092
0.092
0.092
±0.002
-
b
0.017
0.017
0.017
0.017
0.017
0.017
0.017
±0.003
-
c
0.009
0.009
0.009
0.011
0.011
0.011
0.011
±0.001
-
D
0.193
0.341
0.390
0.406
0.504
0.606
0.704
±0.004
1, 3
E
0.236
0.236
0.236
0.406
0.406
0.406
0.406
±0.008
-
E1
0.154
0.154
0.154
0.295
0.295
0.295
0.295
±0.004
2, 3
e
0.050
0.050
0.050
0.050
0.050
0.050
0.050
Basic
-
L
0.025
0.025
0.025
0.030
0.030
0.030
0.030
±0.009
-
L1
0.041
0.041
0.041
0.056
0.056
0.056
0.056
Basic
-
h
0.013
0.013
0.013
0.020
0.020
0.020
0.020
Reference
-
16
20
24
28
Reference
-
N
SO-8
SO16
(0.150”)
8
14
16
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
15
FN7195.2
September 22, 2010
EL5393A
Quarter Size Outline Plastic Packages Family (QSOP)
MDP0040
A
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
D
(N/2)+1
N
INCHES
SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES
E
PIN #1
I.D. MARK
E1
1
(N/2)
B
0.010
C A B
e
H
C
SEATING
PLANE
0.007
0.004 C
b
C A B
A
0.068
0.068
0.068
Max.
-
A1
0.006
0.006
0.006
±0.002
-
A2
0.056
0.056
0.056
±0.004
-
b
0.010
0.010
0.010
±0.002
-
c
0.008
0.008
0.008
±0.001
-
D
0.193
0.341
0.390
±0.004
1, 3
E
0.236
0.236
0.236
±0.008
-
E1
0.154
0.154
0.154
±0.004
2, 3
e
0.025
0.025
0.025
Basic
-
L
0.025
0.025
0.025
±0.009
-
L1
0.041
0.041
0.041
Basic
-
N
16
24
28
Reference
Rev. F 2/07
NOTES:
L1
A
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
c
SEE DETAIL "X"
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.010
A2
GAUGE
PLANE
L
A1
4¬×¬±
DETAIL X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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16
FN7195.2
September 22, 2010
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