additional instructions

RH GCC Migration Information
MSP430 IDE Team
RH GCC & TI CGT migration
There are variations in the code creation for different compilers. Code examples from IAR or CCS
projects are likely not to work out-of-the-box e.g. when you are using interrupts. Our goal is to get as
close as possible to the current CGT and MSPGCC behavior from an intrinsic & attribute point of view.
As part of the CCS user’s guide, we plan to add an overview on how to migrate to/from GCC/TI CGT.
As a starting point, please find a list of intrinsics & attribute below for your reference.
Moreover, an interrupt driven Blink LED example is shown below to get over initial hurdles.
1. TI CGT intrinsics currently not supported on RH GCC
We aim for a similar intrinsic support in the RH GCC compared to the current TI CGT implementation.
The intrinsics below are not yet implemented in the current RHGCC build
a. Not supported in RH GCC:
i. __bcd_add_short
ii. __bcd_add_long
iii. __op_code
iv. __even_in_range
v. All of the data16/data20 read/writes...
vi. Get/set of SP/R4/R5...
vii. LPM intrinsics
2. GCC Attributes
a. Already supported in RHGCC vs MSPGCC
i. naked
ii. interrupt
iii. critical
iv. reentrant
b. Not supported in RH GCC
i. Wakeup
ii. noint_hwmul
iii. saveprologue
iv. signal
v. reserve
Example projects
1. The basic blink LED example may be used from CCS. An interrupt driven version is shown below for the
#include <msp430.h>
int main(void)
P1DIR |= 0x01;
TACCR0 = 50000;
__bis_SR_register(LPM0_bits + GIE);
// Stop WDT
// P1.0 output
// TACCR0 interrupt enabled
// SMCLK, contmode
// Enter LPM0 w/ interrupt
void __attribute__ ((interrupt(TIMER0_A0_VECTOR))) Timer_A (void)
P1OUT ^= 0x01;
// Toggle P1.0
TACCR0 += 50000;