DATASHEET

Data Sheet
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May 2003
1-888-IN
600MHz, Very High Slew Rate
Operational Amplifier
• Very High Slew Rate . . . . . . . . . . . . . . . . . . . . . . 600V/s
With a 600V/s slew rate and a 600MHz gain bandwidth
product, the HA-2539 is ideally suited for use in video and
RF amplifier designs, in closed loop gains of 10 or greater.
Full 10V swing coupled with outstanding AC parameters
and complemented by high open loop gain makes the
devices useful in high speed data acquisition systems.
For further design assistance please refer to Application Note
AN541 (Using the HA-2539 Very High Slew Rate Wideband
Operational Amplifiers) and Application Note AN556 (Thermal
Safe-Operating-Areas For High Current Operational Amplifiers.
For military grade product information, the HA-2539/883 data
sheet is available upon request.
• Open Loop Gain. . . . . . . . . . . . . . . . . . . . . . . . . . . 15kV/V
• Wide Gain-Bandwidth (AV  10). . . . . . . . . . . . . . 600MHz
• Power Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . 9.5MHz
• Low Offset Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mV
• Input Voltage Noise . . . . . . . . . . . . . . . . . . . . . . 6nV/Hz
• Output Voltage Swing. . . . . . . . . . . . . . . . . . . . . . . . 10V
• Monolithic Bipolar Dielectric Construction
Applications
• Pulse and Video Amplifiers
• Wideband Amplifiers
• High Speed Sample-Hold Circuits
• RF Oscillators
Pinout
HA-2539 (PDIP)
TOP VIEW
Part Number Information
0 to 75
PACKAGE
14 Ld PDIP
PKG. NO.
E14.3
+IN 1
NC 2
V-
14 -IN
+
-
HA3-2539-5
TEMP.
RANGE (oC)
FN2896.5
Features
The Intersil HA-2539 represents the ultimate in high slew
rate, wideband, monolithic operational amplifiers. It has
been designed and constructed with the Intersil High
Frequency Bipolar Dielectric Isolation process and features
dynamic parameters never before available from a truly
differential device.
PART NUMBER
HA-2539
13 NC
3
12 NC
NC 4
11 NC
NC 5
10 +V
NC 6
9 NC
NC 7
8 OUTPUT
NOTE: No-Connection (NC) leads may be tied to a ground plane
for better isolation and heat dissipation.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HA-2539
Absolute Maximum Ratings
Thermal Information
Supply Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . 35V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
Peak Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . 33mARMS
Thermal Resistance (Typical, Note 2)
JA (oC/W) JC (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
95
N/A
Maximum Internal Quiescent Power Dissipation (Note 1)
Maximum Junction Temperature (Plastic Package). . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range
HA-2539-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation with load conditions must be designed to maintain the maximum junction temperature below 150oC for the plastic
package. By using Application Note AN556 on Safe Operating Area equations, along with the thermal resistances, proper load conditions can
be determined. Heat sinking is recommended above 75oC.
2. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
VSUPPLY = ±15V, RL = 1kW, CL < 10pF, Unless Otherwise Specified
TEMP.
(oC)
MIN
TYP
MAX
UNITS
25
-
8
15
mV
Full
-
13
20
mV
Average Offset Voltage Drift
Full
-
20
-
V/oC
Bias Current
25
-
5
20
A
Full
-
-
25
A
25
-
1
6
A
Full
-
-
8
A
Input Resistance
25
-
10
-
k
Input Capacitance
25
-
1
-
pF
Common Mode Range
Full
10.0
-
-
V
Input Current Noise
(f = 1kHz, RSOURCE = 0)
25
-
6
-
pA/Hz
Input Voltage Noise
(f = 1kHz, RSOURCE = 0)
25
-
6
-
nV/Hz
25
10
15
-
kV/V
Full
5
-
--
kV/V
Common Mode Rejection Ratio
(Note 4)
Full
60
72
-
dB
Minimum Stable Gain
25
10
-
-
V/V
Gain Bandwidth (Notes 5, 6)
25
-
600
-
MHz
PARAMETER
INPUT CHARACTERISTICS
Offset Voltage
Offset Current
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain
(Note 3)
2
HA-2539
Electrical Specifications
VSUPPLY = ±15V, RL = 1kW, CL < 10pF, Unless Otherwise Specified (Continued)
TEMP.
(oC)
MIN
TYP
MAX
UNITS
Output Voltage Swing
(Notes 3, 10)
Full
10.0
-
-
V
Output Current (Note 3)
25
10
20
-
mA
Output Resistance
25
-
30
-

Full Power Bandwidth
(Notes 3, 7)
25
8.7
9.5
-
MHz
Rise Time
25
-
7
-
ns
Overshoot
25
-
15
-
%
Slew Rate
25
550
600
-
V/s
Settling Time: 10V Step to 0.1%
25
-
180
-
ns
Supply Current
Full
-
20
25
mA
Power Supply Rejection Ratio (Note 9)
Full
60
70
-
dB
PARAMETER
OUTPUT CHARACTERISTICS
TRANSIENT RESPONSE (Note 8)
POWER REQUIREMENTS
NOTES:
3. RL = 1k, VO = 10V.
4. VCM = 10.0V.
5. VO = 90mV.
6. AV = 10.
Slew Rate
7. Full Power Bandwidth guaranteed based on slew rate measurement using: FPBW = ----------------------------- .
2V PEAK
8. Refer to Test Circuits section of data sheet.
9. VSUPPLY = 5V, -15V and +15V, -5V.
10. Guaranteed range for output voltage is 10V. Functional operation outside of this range is not guaranteed.
3
HA-2539
Test Circuits and Waveforms
+
IN
OUT
900
NOTES:
100
12. AV = +10.
11. VS = 15V.
13. CL  10pF.
FIGURE 1. TEST CIRCUIT
A
B
Vertical Scale: Input = 10mV/Div., Output = 50mV/Div.
Horizontal Scale: 20ns/Div.
Vertical Scale: A = 0.5V/Div., B = 5.0V/Div.
Horizontal Scale: 50ns/Div.
FIGURE 2. LARGE SIGNAL RESPONSE
14. AV = -10.
15. Load Capacitance should be less than 10pF.
200
1F
-
+
500
NOTES:
0.001F
V+
INPUT
FIGURE 3. SMALL SIGNAL RESPONSE
0.001F
V-
1F
2k
SETTLE
POINT
OUTPUT
<10pF
PROBE
MONITOR
16. It is recommended that resistors be carbon composition and that
feedback and summing network ratios be matched to 0.1%.
17. SETTLE POINT (Summing Node) capacitance should be less
than 10pF. For optimum settling time results, it is recommended
that the test circuit be constructed directly onto the device pins.
A Tektronix 568 Sampling Oscilloscope with S-3A sampling
heads is recommended as a settle point monitor.
5k
FIGURE 4. SETTLING TIME CIRCUIT
4
HA-2539
Schematic Diagram
V+
R23
R2
R1
QP28
R4
R3
QP18
QP22
QP6
QP17
QP19
R24
R5
R13
QP5
VQP25
QN2
V-
R22
C1
R
QN1
R6
R7
R8
R9
QN7
QN9
+INPUT
QP23
QN21
QP3
QP8
R18
QN10
R19
OUTPUT
QP4
-INPUT
Z1
V+
QN20
DZ2
QN12
QN25
R25
DZ1
QP11
V+
R21
R10
QN15
QN14
R11
R16
QN16
QN13
R12
QN29
R14
R15
R17
V-
5
HA-2539
Typical Applications
SET AV = 1+
R1
=5
R2
R2
SET AV =
-R2
R1
= -3
HA-2539
+
-
20 - 100pF
R1
-
R1
ZIN
20
R2
+
FIGURE 5. FREQUENCY COMPENSATION BY OVERDAMPING
R5 1k
R4 10k
INPUT
0.039F
C2
R1
FIGURE 6. STABILIZATION USING ZIN
10k
3900pF
R2
1k
HA-2539
C1
+
+
R3
HA-5170
OUTPUT
1k
FIGURE 7. REDUCING DC ERRORS; COMPOSITE AMPLIFIER
FIGURE 8. DIFFERENTIAL GAIN ERROR (3%) HA-2539 20dB
VIDEO GAIN BLOCK
Typical Performance Curves
7
12
6
VS = 15V
OFFSET VOLTAGE
8
4
6
3
BIAS CURRENT
4
2
2
1
0
0
-80
-40
0
40
80
120
160
TEMPERATURE (oC)
FIGURE 9. INPUT OFFSET VOLTAGE AND BIAS CURRENT vs
TEMPERATURE
6
NOISE VOLTAGE (nV/Hz)
5
10
|VIO| OFFSET VOLTAGE (mV)
INPUT BIAS CURRENT (A)
RSOURCE = 0
25
50
20
40
15
30
10
20
5
VOLTAGE NOISE
CURRENT NOISE
0
10
100
1K
FREQUENCY (Hz)
10K
NOISE CURRENT (pA/Hz)
14
10
0
100K
FIGURE 10. INPUT NOISE VOLTAGE AND NOISE CURRENT vs
FREQUENCY
HA-2539
Typical Performance Curves
(Continued)
+40V
+30V
100
+20V
+10V
CMRR (dB)
80
0V
-10V
60
40
-20V
-30V
20
-40V
0
Vertical Scale: 10mV/Div.
Horizontal Scale: 50ms/Div.
1K
FIGURE 11. BROADBAND NOISE (0.1Hz TO 1MHz)
10K
100K
FREQUENCY (Hz)
1M
10M
FIGURE 12. COMMON MODE REJECTION RATIO vs
FREQUENCY
80
80
60
0
GAIN
PHASE
45
40
90
40
20
135
20
0
180
60
0
1K
10K
100K
FREQUENCY (Hz)
1M
-20
100
10M
FIGURE 13. POWER SUPPLY REJECTION RATIO vs
FREQUENCY
PHASE (DEGREES)
100
GAIN (dB)
PSRR (dB)
100
225
1K
10K
100K
1M
10M
FREQUENCY (Hz)
100M
FIGURE 14. OPEN LOOP GAIN/PHASE vs FREQUENCY
28
VS = 15V
100
OUTPUT VOLTAGE (VP-P)
CLOSED LOOP GAIN (dB)
VS = 15V
24
90
80
70
60
50
40
30
20
10
20
VS = 10V
16
12
8
VS = 5V
4
0
-10
100
1K
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 15. CLOSED LOOP FREQUENCY RESPONSE
7
0
1K
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 16. OUTPUT VOLTAGE SWING vs FREQUENCY
HA-2539
Typical Performance Curves
(Continued)
1.4
NORMALIZED PARAMETERS
REFERRED TO VALUES AT 25oC
OUTPUT VOLTAGE SWING (VP-P)
28
24
20
16
12
8
4
0
0
200
400
600
800
RESISTANCE ()
1K
BANDWIDTH
1.2
1.1
SLEW RATE
1.0
0.9
0.8
0.7
0.6
-80
1.2K
FIGURE 17. OUTPUT VOLTAGE SWING vs LOAD RESISTANCE
1.3
-40
0
40
80
120
160
TEMPERATURE (oC)
FIGURE 18. NORMALIZED AC PARAMETERS vs TEMPERATURE
28
VS = 15V
24
8
10mV
6
SUPPLY CURRENT (mA)
OUTPUT VOLTAGE STEP (V)
10
1mV
4
2
0
-2
10mV
-4
-6
1mV
-8
-10
20
16
VS = 5V
12
8
4
0
40
80
120
160
SETTLING TIME (ns)
200
240
FIGURE 19. SETTLING TIME FOR VARIOUS OUTPUT STEP
VOLTAGES
8
0
-80
-40
0
40
80
120
160
TEMPERATURE (oC)
FIGURE 20. POWER SUPPLY CURRENT vs TEMPERATURE
HA-2539
Die Characteristics
DIE DIMENSIONS:
SUBSTRATE POTENTIAL (POWERED UP):
62 mils x 76 mils x 19 mils
1575m x 1930m x 483m
METALLIZATION:
VTRANSISTOR COUNT:
30
Type: Al, 1% Cu
Thickness: 16kÅ 2kÅ
PROCESS:
Bipolar Dielectric Isolation
PASSIVATION:
Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.)
Silox Thickness: 12kÅ 2kÅ
Nitride Thickness: 3.5kÅ 1.5kÅ
Metallization Mask Layout
+IN
V-
OUTPUT
V+
-IN
9
HA-2539
Dual-In-Line Plastic Packages (PDIP)
E14.3 (JEDEC MS-001-AA ISSUE D)
N
14 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
1 2 3
INCHES
N/2
-B-
-AD
E
BASE
PLANE
-C-
SEATING
PLANE
A2
A
L
D1
e
B1
D1
A1
eC
B
0.010 (0.25) M
C A B S
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
C
L
B1
0.045
0.070
1.15
1.77
8
eA
C
0.008
0.014
C
D
0.735
0.775
18.66
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English
and Metric dimensions, the inch dimensions control.
0.204
0.355
19.68
5
D1
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
eA
0.300 BSC
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
eB
-
4. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS-3.
L
0.115
N
2.54 BSC
-
7.62 BSC
6
0.430
-
0.150
2.93
14
10.92
7
3.81
4
14
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
9
Rev. 0 12/93
7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 1.14mm).
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
10
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