DATASHEET

DATASHEET
Micropower, Single Supply, Rail-to-Rail Input-Output
Instrumentation Amplifiers
EL8170, EL8173
Features
The EL8170 and EL8173 are micropower instrumentation
amplifiers optimized for single supply operation over the
+2.4V to +5.5V range. Inputs and outputs can operate
rail-to-rail. As with all instrumentation amplifiers, a pair of
inputs provide very high common-mode rejection and are
completely independent from a pair of feedback terminals.
The feedback terminals allow zero input to be translated to any
output offset, including ground. A feedback divider controls the
overall gain of the amplifier.
• 95µA maximum supply current
The EL8170 is compensated for a gain of 100 or more, and the
EL8173 is compensated for a gain of 10 or more. The EL8170
and EL8173 have bipolar input devices for best offset and
1/f noise performance.
• Single supply operation
- Input voltage range is rail-to-rail
- Output swings rail-to-rail
The amplifiers can be operated from one lithium cell or two
Ni-Cd batteries. The EL8170 and EL8173 input range includes
ground to slightly above positive rail. The output stage swings
to ground and positive supply (no pull-up or pull-down resistors
are needed).
IN- 2
+
IN+ 3
8 FB+
6 VOUT
V- 4
5 FB-
EL8173
(8 LD SOIC)
TOP VIEW
DNC 1
IN- 2
+
+

IN+ 3
V- 4
• 192kHz -3dB bandwidth (G = 100)
• Pb-Free (RoHS Compliant)
Applications
• Battery- or Solar-Powered Systems
• Strain Gauges
Ordering Information
7 V+

• 396kHz -3dB bandwidth (G = 10)
• Thermocouple Amplifiers
EL8170
(8 LD SOIC)
TOP VIEW
+
-
• Maximum 3nA input bias current
• Current Monitors
Pin Configurations
DNC 1
• Maximum offset voltage
- 200µV (EL8170)
- 1000µV (EL8173)
PART NUMBER
(Notes 2, 3)
PART
MARKING
PACKAGE
(RoHS Compliant)
EL8170FSZ (Note 1)
8170FSZ
8 Ld SOIC
M8.15E
EL8173FSZ (Note 1)
(No longer available
or supported)
8173FSZ
8 Ld SOIC
M8.15E
EL8170FWZ-EVAL
Evaluation Board
EL8173EV1Z (No
longer available or
supported)
Evaluation Board
7 V+
Evaluation Board
EL8173FWZ-EVAL
(No longer available or
supported)
6 VOUT
NOTES:
8 FB+
5 FB-
PKG.
DWG. #
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
2. These Intersil Pb-free plastic packaged products employ special
Pb-free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is
RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information
page for EL8170, EL8173 For more information on MSL, please see
tech brief TB363.
August 11, 2015
FN7490.8
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2009, 2013, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
EL8170, EL8173
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage Range, V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V, 1V/µs
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage
EL8170. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5V
EL8173. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.0V
ESD Rating
Human Body Model (EL8173) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2500V
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250V
Thermal Resistance (Typical)
JA (°C/W)
8 Ld SOIC Package (Note 4) . . . . . . . . . . . . . . . . . . . . . .
122
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
Ambient Operating Temperature . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTE:
4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise
noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
V+ = +5V, V- = GND, VCM = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. Boldface limits apply
over the operating temperature range, -40°C to +125°C.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
(Note 5)
TYP
MAX
(Note 5)
UNIT
DC SPECIFICATIONS
VOS
TCVOS
Input Offset Voltage
Input Offset Voltage Temperature
Coefficient
EL8170
-200
-300
±50
200
300
µV
EL8173
-1000
-1500
±200
1000
1500
µV
EL8170
0.24
µV/°C
EL8173
2.5
µV/°C
IOS
Input Offset Current between IN+, and INand between FB+ and FB-
-2
-3
±0.2
2
3
nA
IB
Input Bias Current (IN+, IN-, FB+, and FBterminals)
-3
-4
±0.7
3
4
nA
VIN
Input Voltage Range
Guaranteed by CMRR test
5
V
CMRR
Common Mode Rejection Ratio
EL8170
VCM = 0V to +5V
EL8173
PSRR
Power Supply Rejection Ratio
EL8170
V+ = +2.4V to +5.5V
EL8173
EG
Gain Error
EL8170
EL8173
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2
RL = 100kΩ to +2.5V
0
90
85
114
dB
85
80
106
dB
85
80
106
dB
75
70
90
dB
-1.5
2
+0.35
1.5
2
%
-0.4
-0.8
+0.1
0.4
0.8
%
FN7490.8
August 11, 2015
EL8170, EL8173
Electrical Specifications
V+ = +5V, V- = GND, VCM = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. Boldface limits apply
over the operating temperature range, -40°C to +125°C. (Continued)
PARAMETER
VOUT
DESCRIPTION
Maximum Voltage Swing
CONDITIONS
MIN
(Note 5)
Output low, RL = 100kΩ to +2.5V
Output low, RL = 1kΩ to +2.5V
TYP
MAX
(Note 5)
UNIT
4
10
mV
0.13
0.2
0.25
V
Output high, RL = 100kΩ to +2.5V
4.985
4.980
4.996
V
Output high, RL = 1kΩto +2.5V
4.75
4.887
V
45
38
65
IS
Supply Current
VSUPPLY
Supply Operating Range
V+ to V-
2.4
IO+
Output Source Current into 10 to V+/2
V+ = +5V
23
19
32
mA
V+ = +2.4V
6
4.5
8
mA
V+ = +5V
19
15
26
mA
V+ = +2.4V
5
4
7
mA
Gain = 100
192
kHz
Gain = 200
93
kHz
IO-
Output Sink Current into 10 to V+/2
95
110
µA
5.5
V
AC SPECIFICATIONS
-3dB BW
-3dB Bandwidth
EL8170
EL8173
eN
Input Noise Voltage
EL8170
Gain = 500
30
kHz
Gain = 1000
13
kHz
Gain = 10
396
kHz
Gain = 20
221
kHz
Gain = 50
69
kHz
Gain = 100
30
kHz
f = 0.1Hz to 10Hz
3.5
µVP-P
EL8173
Input Noise Voltage Density
EL8170
fo = 1kHz
EL8173
iN
CMRR @ 60Hz
Input Noise Current Density
Input Common Mode Rejection Ratio
Power Supply Rejection Ratio (V+)
PSRR- @
120Hz
Power Supply Rejection Ratio (V-)
µVP-P
58
nV/Hz
220
nV/Hz
EL8170
fo = 1kHz
0.38
pA/Hz
EL8173
fo = 1kHz
0.8
pA/Hz
EL8170
VCM = 1VP-P,
RL = 10kΩ to VCM
100
dB
84
dB
V+, V- = ±2.5V,
VSOURCE = 1VP-P,
RL = 10kΩto VCM
98
dB
78
dB
V+, V- = ±2.5V,
VSOURCE = 1VP-P,
RL = 10kΩ to VCM
106
dB
82
dB
EL8173
PSRR+ @
120Hz
3.6
EL8170
EL8173
EL8170
EL8173
TRANSIENT RESPONSE
SR
Slew Rate
RL = 1kΩ to GND
0.4
0.35
0.55
0.7
0.7
V/µs
NOTE:
5. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
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FN7490.8
August 11, 2015
EL8170, EL8173
Typical Performance Curves V+ = +5V, V- = 0V, VCM = +2.5V, RL = Open, unless otherwise specified.
90
70
COMMON-MODE INPUT = 1/2V+
GAIN = 10,000V/V
80
COMMON-MODE INPUT = 1/2V+
GAIN = 1000
60
GAIN = 500
GAIN = 5,000V/V
50
GAIN = 2,000V/V
GAIN (dB)
GAIN (dB)
70
GAIN = 1,000V/V
60
GAIN = 500V/V
50
30
1
10
100
GAIN = 100
40
GAIN = 50
30
GAIN = 200V/V
GAIN = 100V/V
40
GAIN = 200
GAIN = 20
GAIN = 10
20
1k
10k
100k
10
1M
1
10k
100
1k
FREQUENCY (Hz)
10
FREQUENCY (Hz)
FIGURE 1. EL8170 FREQUENCY RESPONSE vs CLOSED LOOP
GAIN
25
40
V+ = 5V
V+ = 5V
20
35
25
GAIN (dB)
GAIN (dB)
V+ = 3.3V
V+ = 3.3V
30
V+ = 2.4V
AV AV
= 100
= 100
RL = 10kΩ
CL = 10pF
RF/RG = 99.02
RF = 221kΩ
RG = 2.23kΩ
20
15
10
5
0
100
1k
10k
100k
15
100
1k
10k
1M
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 4. EL8173 FREQUENCY RESPONSE vs SUPPLY VOLTAGE
50
30
25
45
CL = 820PF
40
CL = 220PF
AV = 100
V+, V- = ±2.5V
RL = 10kΩ
RF/RG = 99.02
RF = 221kΩ
RG = 2.23kΩ
25
100
1k
CL = 56PF
10k
FREQUENCY (Hz)
100k
FIGURE 5. EL8170 FREQUENCY RESPONSE vs CLOAD
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4
1M
CL = 100PF
CL = 47PF
20
GAIN (dB)
CL = 470PF
GAIN (dB)
V+ = 2.4V
10 AV = 10
RL = 10kΩ
CL = 10pF
5 RF/RG = 99.08Ω
RF = 178kΩ
RG = 19.6kΩ
0
1M
FIGURE 3. EL8170 FREQUENCY RESPONSE vs SUPPLY VOLTAGE
30
1M
FIGURE 2. EL8173 FREQUENCY RESPONSE vs CLOSED LOOP
GAIN
45
35
100k
CL = 27PF
15
AV = 10
10 V+ = 5V
RL = 10kΩ
RF/RG = 9.08Ω
5 RF = 178kΩ
RG = 19.6kΩ
0
100
1k
CL = 2.7PF
10k
1M
100k
FREQUENCY (Hz)
FIGURE 6. EL8173 FREQUENCY RESPONSE vs CLOAD
FN7490.8
August 11, 2015
EL8170, EL8173
Typical Performance Curves V+ = +5V, V- = 0V, VCM = +2.5V, RL = Open, unless otherwise specified. (Continued)
120
90
80
100
70
60
CMRR
CMRR (dB)
CMRR (dB)
80
60
40
CMRR
50
40
30
20
10
20
0
0
10
100
1k
10k
100k
-10
10
1M
100
10k
100k
1M
FIGURE 8. EL8173 CMRR vs FREQUENCY
FIGURE 7. EL8170 CMRR vs FREQUENCY
140
90
80
120
PSRR+
PSRR+
70
100
60
PSRR (dB)
PSRR (dB)
1k
FREQUENCY (Hz)
FREQUENCY (Hz)
80
PSRR-
60
PSRR-
50
40
30
40
20
20
0
10
10
100
1k
10k
100k
0
10
1M
100
FREQUENCY (Hz)
100k
1M
2.5
INPUT VOLTAGE NOISE (µV/Hz)
250
INPUT VOLTAGE NOISE (nV/Hz)
10k
FIGURE 10. EL8173 PSRR vs FREQUENCY
FIGURE 9. EL8170 PSRR vs FREQUENCY
200
150
100
50
1
1k
FREQUENCY (Hz)
10
100
1k
10k
FREQUENCY (Hz)
FIGURE 11. EL8170 VOLTAGE NOISE DENSITY
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5
100k
2.0
1.5
1.0
0.5
0.0
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 12. EL8173 VOLTAGE NOISE DENSITY
FN7490.8
August 11, 2015
EL8170, EL8173
Typical Performance Curves V+ = +5V, V- = 0V, VCM = +2.5V, RL = Open, unless otherwise specified. (Continued)
5.0
4.5
0.9
CURRENT NOISE (pA/Hz)
CURRENT NOISE (pA/Hz)
1.0
0.8
0.7
0.6
0.5
0.4
0.3
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
1
10
100
1k
10k
0.0
100k
1
10
100
FREQUENCY (Hz)
FIGURE 13. EL8170 CURRENT NOISE DENSITY
VOLTAGE NOISE (0.5µV/DIV)
VOLTAGE NOISE (0.5µV/DIV)
TIME (1s/DIV)
TIME (1s/DIV)
FIGURE 16. EL8173 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
(GAIN = 10)
90
N = 2000
85
MAX
75
SUPPLY CURRENT (µA)
SUPPLY CURRENT (µA)
80
70
65
MEDIAN
60
55
MIN
50
45
40
-40
100k
10k
FIGURE 14. EL8173 CURRENT NOISE DENSITY
FIGURE 15. EL8170 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
(GAIN = 100)
85
1k
FREQUENCY (Hz)
N = 1000
80
MAX
75
MEDIAN
70
65
60
MIN
55
50
45
-20
0
20
40
60
TEMPERATURE (°C)
80
100
FIGURE 17. EL8170 SUPPLY CURRENT vs TEMPERATURE,
V+, V- = ±2.5V, VIN = 0V
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120
40
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 18. EL8173 SUPPLY CURRENT vs TEMPERATURE,
V+, V- = ±2.5V, VIN = 0V
FN7490.8
August 11, 2015
EL8170, EL8173
Typical Performance Curves V+ = +5V, V- = 0V, VCM = +2.5V, RL = Open, unless otherwise specified. (Continued)
300
1000
N = 2000
200
MAX
500
VOS (µV)
100
VOS (µV)
N = 1000
MAX
MEDIAN
0
-100
MIN
-300
-20
0
20
40
-500
MIN
-1000
-200
-40
MEDIAN
0
60
80
100
-1500
120
-40
-20
20
40
60
80
TEMPERATURE (°C)
0
TEMPERATURE (°C)
FIGURE 19. EL8170 VOS vs TEMPERATURE, V+, V- = ±2.5V,
VIN = 0V
120
FIGURE 20. EL8173 VOS vs TEMPERATURE, V+, V- = ±2.5V,
VIN = 0V
400
1000
N = 1000
N = 2000
300
100
MAX
MAX
500
VOS (µV)
VOS (µV)
200
100
MEDIAN
0
-100
MIN
MEDIAN
-500
-1000
-200
MIN
-300
-1500
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
-40
120
0
20
40
60
80
100
120
FIGURE 22. EL8173 VOS vs TEMPERATURE, V+, V- = ±1.2V,
VIN = 0V
140
140
N = 2000
N = 1000
MAX
130
MAX
130
120
CMRR (dB)
MEDIAN
110
MIN
100
90
80
-40
-20
TEMPERATURE (°C)
FIGURE 21. EL8170 VOS vs TEMPERATURE, V+, V- = ±1.2V,
VIN = 0V
CMRR (dB)
0
120
MEDIAN
110
100
90
-20
0
20
40
60
80
TEMPERATURE (°C)
FIGURE 23. EL8170 CMRR vs TEMPERATURE,
VCM = +2.5V TO -2.5V, V+, V- = ±2.5V
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100
120
80
-40
MIN
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 24. EL8173 CMRR vs TEMPERATURE,
VCM = +2.5V TO -2.5V, V+, V- = ±2.5V
FN7490.8
August 11, 2015
EL8170, EL8173
Typical Performance Curves V+ = +5V, V- = 0V, VCM = +2.5V, RL = Open, unless otherwise specified. (Continued)
140
N = 2000
130
120
120
PSRR (dB)
MEDIAN
110
PSRR (dB)
140
MAX
130
100
90
80
N = 1000
MAX
110
100
MEDIAN
90
80
MIN
70
MIN
70
60
-40
-20
0
20
40
60
80
100
60
-40
120
-20
0
TEMPERATURE (°C)
2.4
120
100
120
0.7
N = 2000
0.6
GAIN ERROR (%)
1.9
GAIN ERROR (%)
100
FIGURE 26. EL8173 PSRR vs TEMPERATURE,
V+, V- = ±1.2V TO ±2.5V
FIGURE 25. EL8170 PSRR vs TEMPERATURE,
V+, V- = ±1.2V TO ±2.5V
MAX
1.4
0.9
MEDIAN
0.4
-0.1
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
MAX
0.3
0.2
MEDIAN
0.1
MIN
-20
0
20
60
80
FIGURE 28. EL8173 %GAIN ERROR vs TEMPERATURE,
RL = 100k
4.91
N = 2000
N = 1000
4.90
4.90
MAX
4.89
MAX
4.89
VOUT (V)
MEDIAN
4.88
4.87
MEDIAN
4.88
4.87
MIN
MIN
4.86
4.86
4.85
4.85
4.84
-40
40
TEMPERATURE (°C)
FIGURE 27. EL8170 %GAIN ERROR vs TEMPERATURE,
RL = 100k
4.91
0.4
-0.1
-40
120
N = 1000
0.5
0
MIN
VOUT (V)
20
40
60
80
TEMPERATURE (°C)
-20
0
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 29. EL8170 VOUT HIGH vs TEMPERATURE,
RL = 1k, V+, V- = ±2.5V
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8
120
4.84
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 30. EL8173 VOUT HIGH vs TEMPERATURE,
RL = 1k, V+, V- = ±2.5V
FN7490.8
August 11, 2015
EL8170, EL8173
Typical Performance Curves V+ = +5V, V- = 0V, VCM = +2.5V, RL = Open, unless otherwise specified. (Continued)
200
200
N = 1000
180
180
160
160
VOUT (mV)
VOUT (mV)
N = 2000
MAX
140
120
MEDIAN
MIN
120
-20
0
20
60
40
80
100
80
-40
120
-20
0
MEDIAN
0.50
MIN
0.45
0.40
100
120
100
120
0.60
MEDIAN
0.55
0.50
MIN
0.45
0.35
-20
0
20
40
60
80
100
0.40
-40
120
-20
0
0.70
MAX
0.65
40
60
80
FIGURE 34. EL8173 + SLEW RATE vs TEMPERATURE,
INPUT ±0.015V @ GAIN + 100
FIGURE 33. EL8170 + SLEW RATE vs TEMPERATURE,
INPUT ±0.015V @ GAIN + 100
N = 2000
20
TEMPERATURE (°C)
TEMPERATURE (°C)
MAX
N = 1000
0.65
0.60
- SLEW RATE (V/µS)
- SLEW RATE (V/µS)
80
MAX
0.65
+ SLEW RATE (V/µS)
+ SLEW RATE (V/µS)
N = 1000
MAX
0.55
MEDIAN
0.55
0.50
MIN
0.45
0.40
MEDIAN
0.60
0.55
MIN
0.50
0.45
0.35
0.30
-40
60
0.70
N = 2000
0.60
0.70
40
FIGURE 32. EL8173 VOUT LOW vs TEMPERATURE,
RL = 1k, V+, V- = ±2.5V
FIGURE 31. EL8170 VOUT LOW vs TEMPERATURE,
RL = 1k, V+, V- = ±2.5V
0.30
-40
20
TEMPERATURE (°C)
TEMPERATURE (°C)
0.65
MEDIAN
MIN
100
100
80
-40
MAX
140
-20
0
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 35. EL8170 - SLEW RATE vs TEMPERATURE,
INPUT ±0.015V @ GAIN + 100
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120
0.40
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 36. EL8173 - SLEW RATE vs TEMPERATURE,
INPUT ±0.015V @ GAIN + 100
FN7490.8
August 11, 2015
EL8170, EL8173
Pin Descriptions
EL8170
EL8173
PIN NAME
EQUIVALENT CIRCUIT
PIN FUNCTION
1
1
DNC
2
2
IN-
Circuit 1A, Circuit 1B
3
3
IN+
Circuit 1A, Circuit 1B
4
4
V-
Circuit 3
5
5
FB-
Circuit 1A, Circuit 1B
8
8
FB+
Circuit 1A, Circuit 1B
7
7
V+
Circuit 3
Positive supply terminal.
6
6
VOUT
Circuit 2
Output voltage.
Do Not Connect; Internal connection - Must be left floating.
High impedance input terminals. The EL8170 input circuit is shown in Circuit 1A,
and the EL8173 input circuit is shown in Circuit 1B.
The EL8173: to avoid offset drift, it is recommended that the terminals are not
overdriven beyond 1V and the input current must never exceed 5mA.
Negative supply terminal.
High impedance feedback terminals. The EL8170 input circuit is shown in
Circuit 1A, and the EL8173 input circuit is shown in Circuit 1B.
The EL8173: to avoid offset drift, it is recommended that the terminals are not
overdriven beyond 1V and the input current must never exceed 5mA.
V+
INFB-
V+
IN+
FB+
OUT
V-
V-
CIRCUIT 1A
V+
CAPACITIVELY
COUPLED
ESD CLAMP
VCIRCUIT 2
CIRCUIT 3
V+
INFB-
IN+
FB+
V-
CIRCUIT 1B
Description of Operation and
Applications Information
Product Description
The EL8170 and EL8173 are micropower instrumentation
amplifiers (in-amps) which deliver rail-to-rail input amplification and
rail-to-rail output swing on a single +2.4V to +5.5V supply. The
EL8170 and EL8173 also deliver excellent DC and AC specifications
while consuming only 65µA typical supply current. The EL8170 and
EL8173 provides an independent pairs of feedback terminals to set
the gain and to adjust output level, these in-amps achieve high
common-mode rejection ratio regardless of the tolerance of the gain
setting resistors. The EL8173 is internally compensated for a
minimum closed loop gain of 10 or greater, well suited for moderate
to high gains. For higher gains, the EL8170 is internally
compensated for a minimum gain of 100.
Input Protection
All input and feedback terminals of the EL8170 and EL8173 have
internal ESD protection diodes to both positive and negative
supply rails, limiting the input voltage to within one diode drop
beyond the supply rails. The inverting inputs and FB- have ESD
diodes to the V-rail, and the non-inverting inputs and FB+
terminals have ESD diodes to the V+ rail. The EL8170 has
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additional back-to-back diodes across the input terminals and
also across the feedback terminals. If overdriving the inputs is
necessary, the external input current must never exceed 5mA. On
the other hand, the EL8173 has no clamps to limit the
differential voltage on the input terminals allowing higher
differential input voltages at lower gain applications. It is
recommended however, that the input terminals of the EL8173
are not overdriven beyond 1V to avoid offset drift. An external
series resistor may be used as an external protection to limit
excessive external voltage and current from damaging the
inputs.
Input Stage and Input Voltage Range
The input terminals (IN+ and IN-) of the EL8170 and EL8173 are
single differential pair bipolar PNP devices aided by an Input
Range Enhancement Circuit to increase the headroom of
operation of the common-mode input voltage. The feedback
terminals (FB+ and FB-) also have a similar topology. As a result,
the input common-mode voltage range of both the EL8170 and
EL8173 is rail-to-rail. These in-amps are able to handle the input
voltages that are at or slightly beyond the supply and ground
making these in-amps well suited for single +5V or +3.3V low
voltage supply systems. There is no need to move the
common-mode input of the in-amps to achieve symmetrical input
voltage.
FN7490.8
August 11, 2015
EL8170, EL8173
Input Bias Cancellation, Input
Bias Compensation
The EL8170 and EL8173 are features an Input Bias Cancellation
and Input Bias Compensation Circuit for both the input and
feedback terminals (IN+, IN-, FB+ and FB-), achieving a low input
bias current all throughout the input common-mode range and the
operating temperature range. While the PNP bipolar input stages
are biased with an adequate amount of biasing current for speed
and increased noise performance, the Input Bias Cancellation and
the Input Bias Compensation Circuit, sinks most of the base
current of the input transistor leaving a small portion as input bias
current, typically 500pA. In addition, the Input Bias Cancellation
and Input Bias Compensation Circuit, maintains a smooth and flat
behavior of the input bias current over the common mode range
and over the operating temperature range. The Input Bias
Cancellation and Input Bias Compensation Circuit, operates from
the input voltages of 10mV above the negative supply to the input
voltages slightly above the positive supply. See “Average Input Bias
Current vs Common-Mode Input Voltage” in the “Typical
Performance Curves” beginning on page 4.
Output Stage and Output Voltage Range
A pair of complementary MOSFET devices drives the output VOUT
to within a few millivolts of the supply rails. At a 100k load, the
PMOS sources current and pulls the output up to 4mV below the
positive supply, while the NMOS sinks current and pulls the
output down to 4mV above the negative supply, or ground in the
case of a single supply operation. The current sinking and
sourcing capability of the EL8170 and EL8173 are internally
limited to 26mA.
RF 

V OUT =  1 + -------- V IN
R G

In Figure 37, the FB+ pin and one end of resistor RG are connected
to GND. With this configuration, Equation 1 is only true for a positive
swing in VIN; negative input swings will be ignored and the output
will be at ground.
Reference Connection
Unlike a three op amp instrumentation amplifier, a finite series
resistance seen at the REF terminal does not degrade the
EL8170 and EL8173's high CMRR performance, eliminating the
need for an additional external buffer amplifier. The circuit shown
in Figure 38 uses the FB+ pin as a REF terminal to center or to
adjust the output. Because the FB+ pin is a high impedance
input, an economical resistor divider can be used to set the
voltage at the REF terminal. The reference voltage error due to
the input bias current is minimized by keeping the values of the
voltage divider resistors, R1 and R2, as low as possible. Any
voltage applied to the REF terminal will shift VOUT by VREF times
the closed loop gain, which is set by resistors RF and RG
according to Equation 2. Note that any noise or unwanted signals
on the reference supply will be amplified at the output according
to Equation 2.
RF 
RF 


V OUT =  1 + --------  V IN  +  1 + --------  V REF 
R G
R G


VIN, the potential difference across IN+ and IN-, is replicated (less
the input offset voltage) across FB+ and FB-. The objective of the
EL8170 and EL8173 in-amp is to maintain the differential
voltage across FB+ and FB- equal to IN+ and IN-; (FB- - FB+) =
(IN+ - IN-). Consequently, the transfer function can be derived.
The gain of the EL8170 and EL8173 is set by two external
resistors, the feedback resistor RF, and the gain resistor RG.
(EQ. 2)
+2.4V TO +5.5V
7
VIN/2
Gain Setting
(EQ. 1)
3 IN+
2 IN-
VIN/2
8 FB+
5 FB-
+2.4V TO +5.5V
VCM
R1
1
V+
+
- EL8170,
EL8173
6
VOUT
+
-
V4
REF
R2
RG
RF
+2.4V TO +5.5V
7
VIN/2
3 IN+
2 IN-
VIN/2
8 FB+
5 FB-
VCM
FIGURE 38. GAIN SETTING AND REFERENCE CONNECTION
1
V+
+
- EL8170,
EL8173
+
-
6
VOUT
V4
RG
The FB+ pin can also be connected to the other end of resistor,
RG (see Figure 39). Keeping the basic concept that the EL8170
and EL8173 in-amps maintain constant differential voltage
across the input terminals and feedback terminals
(IN+ - IN- = FB+ - FB-), the transfer function of Figure 39 can be
derived (Equation 3). Note that the VREF gain term is eliminated,
and susceptibility to external noise is reduced.
RF
FIGURE 37. GAIN IS SET BY TWO EXTERNAL RESISTORS, RF
AND RG
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EL8170, EL8173
The term [1 - (ERG + ERF + EG)] is the deviation from the
theoretical gain. Thus, (ERG + ERF + EG) is the total gain error. For
example, if 1% resistors are used for the EL8170, the total gain
error would be as shown in Equation 5:
.
+2.4V TO +5.5V
7
VIN/2
3 IN+
1
V+
+
2 IN-
- EL8170,
8 FB+ EL8173
+
5 FBV-
VIN/2
VCM
=   E RG + E RF + E G  typical  
6
VOUT
=  2.3%
Power Dissipation
4
VREF
RG
RF
FIGURE 39. REFERENCE CONNECTION WITH AN AVAILABLE VREF
RF 

V OUT =  1 + --------  V IN  +  V REF 
R

G
(EQ. 3)
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power-supply conditions. It
is therefore important to calculate the maximum junction
temperature (TJMAX) for all applications to determine if power
supply voltages, load conditions, or package type need to be
modified to remain in the safe operating area. These parameters
are related in Equation 6:
T JMAX = T MAX +   JA xPD MAXTOTAL 
(EQ. 6)
where:
External Resistor Mismatches
Because of the independent pair of feedback terminals provided
by the EL8170 and EL8173, the CMRR is not degraded by any
resistor mismatches. Hence, unlike a three op amp and
especially a two op amp in-amp, the EL8170 and EL8173 reduce
the cost of external components by allowing the use of 1% or
more tolerance resistors without sacrificing CMRR performance.
The EL8170 and EL8173 CMRR is maintained regardless of the
tolerance of the resistors used.
• PDMAXTOTAL is the sum of the maximum power dissipation of
each amplifier in the package (PDMAX)
• PDMAX for each amplifier can be calculated as shown in
Equation 7:
V OUTMAX
PD MAX = 2*V S  I SMAX +  V S - V OUTMAX   ---------------------------RL
(EQ. 7)
where:
• TMAX = Maximum ambient temperature
Gain Error and Accuracy
The EL8173 has a Gain Error, EG, of 0.2% typical. The EL8170 has
an EG of 0.3% typical. The gain error indicated in the “Electrical
Specifications” table on page 2 is the inherent gain error of the
EL8170 and EL8173 and does not include the gain error
contributed by the resistors. There is an additional gain error due
to the tolerance of the resistors used. The resulting non-ideal
transfer function effectively becomes Equation 4:
RF 

V OUT =  1 + --------   1 –  E RG + E RF + E G    V IN
R G

(EQ. 5)
=   0.01 + 0.01 + 0.003 
• JA = Thermal resistance of the package
• PDMAX = Maximum power dissipation of 1 amplifier
• VS = Supply voltage (Magnitude of V+ and V-)
• IMAX = Maximum supply current of 1 amplifier
• VOUTMAX = Maximum output voltage swing of the application
• RL = Load resistance
(EQ. 4)
Where:
ERG = Tolerance of RG
ERF = Tolerance of RF
EG = Gain Error of the EL8170 or EL8173
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EL8170, EL8173
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE
REVISION
August 11, 2015
FN7490.8
CHANGE
Added Revision History beginning with Rev 8.
Added About Intersil Verbiage.
Updated Ordering Information on page 1.
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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FN7490.8
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EL8170, EL8173
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09
4
4.90 ± 0.10
A
DETAIL "A"
0.22 ± 0.03
B
6.0 ± 0.20
3.90 ± 0.10
4
PIN NO.1
ID MARK
5
(0.35) x 45°
4° ± 4°
0.43 ± 0.076
1.27
0.25 M C A B
SIDE VIEW “B”
TOP VIEW
1.75 MAX
1.45 ± 0.1
0.25
GAUGE PLANE
C
SEATING PLANE
0.10 C
0.175 ± 0.075
SIDE VIEW “A
0.63 ±0.23
DETAIL "A"
(0.60)
(1.27)
NOTES:
(1.50)
(5.40)
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5.
The pin #1 identifier may be either a mold or mark feature.
6.
Reference to JEDEC MS-012.
TYPICAL RECOMMENDED LAND PATTERN
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FN7490.8
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