DATASHEET

HA-4741
®
Data Sheet
July 2004
FN2922.5
Quad, 3.5MHz, Operational Amplifier
Features
HA-4741, which contains four amplifiers on a monolithic
chip, provides a new measure of performance for general
purpose operational amplifiers. Each amplifier in the
HA-4741 has operating specifications that equal or exceed
those of the 741-type amplifier in all categories of
performance.
• Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6V/µs
• Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5MHz
• Input Voltage Noise . . . . . . . . . . . . . . . . . . . . . . 9nV/√Hz
• Input Offset Voltage . . . . . . . . . . . . . . . . . . . . . . . . 0.5mV
• Input Bias Current . . . . . . . . . . . . . . . . . . . . . . . . . . 60nA
HA-4741 is well suited to applications requiring accurate
signal processing by virtue of its low values of input offset
voltage (0.5mV), input bias current (60nA) and input voltage
noise (9nV/√Hz at 1kHz). 3.5MHz bandwidth, coupled with
high open-loop gain, allow the HA-4741 to be used in
designs requiring amplification of wide band signals, such as
audio amplifiers. Audio application is further enhanced by
the HA-4741’s negligible output crossover distortion.
These excellent dynamic characteristics also make the
HA-4741 ideal for a wide range of active filter designs.
Performance integrity of multi-channel designs is assured by
a high level of amplifier-to-amplifier isolation (69dB at
10kHz).
A wide range of supply voltages (±2V to ±20V) can be used
to power the HA-4741, making it compatible with almost any
system including battery-powered equipment.
HA-4741/883 product and data sheets available upon
request.
• Supply Range. . . . . . . . . . . . . . . . . . . . . . . . ±2V to ±20V
• No Crossover Distortion
• Standard Quad Pinout
Applications
• Universal Active Filters
• D3 Communications Filters
• Audio Amplifiers
• Battery-Powered Equipment
Pinout
HA-4741 (PDIP, CERDIP)
TOP VIEW
-IN1 2
+IN1 3
Ordering Information
14 OUT4
OUT1 1
1
4
+
- 13 -IN4
+ 12 +IN4
11 V-
V+ 4
PART
NUMBER
TEMP.
RANGE (°C)
HA1-4741-2
-55 to 125
HA3-4741-5
0 to 75
PACKAGE
PKG. DWG. #
14 Ld CERDIP F14.3
14 Ld PDIP
1
E14.3
+IN2 5 +
-IN2 6
OUT2 7
+ 10 +IN3
-
2
3
9 -IN3
8 OUT3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Harris Corporation 1990, 1993, 1996, 1998. Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved.
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HA-4741
Absolute Maximum Ratings
Thermal Information
TA = 25°C Unless Otherwise Stated
Supply Voltage Between V+ and V- Terminals . . . . . . . . . . . . . 40V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY
Output Short Circuit Duration (Note 3). . . . . . . . . . . . . . . . Indefinite
Thermal Resistance (Typical, Note 2)
θJA (°C/W)
θJC (°C/W)
CERDIP Package. . . . . . . . . . . . . . . . .
90
35
PDIP Package . . . . . . . . . . . . . . . . . . .
107
N/A
Maximum Junction Temperature (Ceramic Package, Note 1) . . . . 175°C
Maximum Junction Temperature (Plastic Packages, Note 1) . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(Lead Tips Only)
Operating Conditions
Temperature Range:
HA-4741-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to 125°C
HA-4741-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 75°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation, including output load, must be designed to maintain junction temperature below 175°C for the ceramic package,
and below 150°C for the plastic packages.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
3. One amplifier may be shorted to ground indefinitely.
VSUPPLY = ±15V, Unless Otherwise Specified
Electrical Specifications
TEST
CONDITIONS
HA-4741-2
HA-4741-5
TEMP.
(°C)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
25
-
0.5
3
-
1
5
mV
Full
-
4
5
-
4
6.5
mV
Average Offset Voltage Drift
Full
-
5
-
-
5
-
µV/°C
Bias Current
25
-
60
200
-
60
300
nA
Full
-
-
325
-
-
400
nA
25
-
15
30
-
30
50
nA
Full
-
-
75
-
-
100
nA
Common Mode Range
Full
±12
-
-
±12
-
-
V
Differential Input Resistance
25
-
0.5
-
-
0.5
-
MΩ
f = 1kHz
25
-
9
-
-
9
-
nV/√Hz
VOUT = ±10V,
RL = 2kΩ
25
50
100
-
25
50
-
kV/V
Full
25
-
-
15
-
-
kV/V
25
80
95
-
80
95
-
dB
Full
74
-
-
74
-
-
dB
Channel Separation (Note 4)
25
66
69
-
66
69
-
dB
Small Signal Bandwidth
25
2.5
3.5
-
2.5
3.5
-
MHz
PARAMETER
INPUT CHARACTERISTICS
Offset Voltage
Offset Current
Input Voltage Noise
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain
Common Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
RL = 10kΩ
Full
±12
±13.7
-
±12
±13.7
-
V
Output Voltage Swing
RL = 2kΩ
Full
±10
±12.5
-
±10
±12.5
-
V
25
-
25
-
-
25
-
kHz
Full
±5
±15
-
±5
±15
-
mA
25
-
300
-
-
300
-
Ω
Full Power Bandwidth (Notes 5, 6)
VOUT = ±10V
Output Current
Output Resistance
2
HA-4741
VSUPPLY = ±15V, Unless Otherwise Specified (Continued)
Electrical Specifications
TEST
CONDITIONS
PARAMETER
HA-4741-2
HA-4741-5
TEMP.
(°C)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
25
-
75
140
-
75
140
ns
25
-
25
40
-
25
40
%
25
-
±1.6
-
-
±1.6
-
V/µs
25
-
4.5
5
-
5
7
mA
Full
80
95
-
80
95
-
dB
TRANSIENT RESPONSE RL = 2kΩ, CL = 50pF
VOUT = 0 to ±200mV
Rise / Fall Time
Overshoot
VOUT = ±5V
Slew Rate
POWER SUPPLY CHARACTERISTICS
Supply Current
∆VS = ±5V
Power Supply Rejection Ratio
NOTES:
4. Referred to input; f = 10kHz, RS = 1kΩ, VIN = 100mVPEAK.
5. VOUT = ±10V, RL = 2kΩ.
6. Full power bandwidth guaranteed based upon slew rate measurement: FPBW = S.R./2π VPEAK.
Test Circuit and Waveforms
+
VIN
VOUT
50pF
2kΩ
FIGURE 1. SMALL AND LARGE SIGNAL TEST CIRCUIT
+5V
200mV
INPUT
-5V
+5V
OUTPUT
0
-5V
Volts = 5V/Div., Time = 5µs/Div.
FIGURE 2. LARGE SIGNAL RESPONSE
3
Volts = 40mV/Div., Time = 100ns/Div.
FIGURE 3. SMALL SIGNAL RESPONSE
HA-4741
Schematic Diagram
V+
R1
3K
Q2
Q1
Q3
Q15
Q13
+VIN
R6
80
R8
VOUT
-VIN
150
R7
80
Q5
Q4
Q12
R5
30K
T1
Q14
C1
Q10
Q7
Q6
Q8
R2
12.6K
D1
Q11
Q9
R4
20K
R3
18K
V-
VSUPPLY = ±15V, TA = 25°C, Unless Otherwise Specified
RL = 2K
CL= 50pF
100
90
80
0
GAIN
70
45
60
50
PHASE
90
40
30
135
20
PHASE (DEGREES)
OPEN-LOOP VOLTAGE GAIN (dB)
110
OUTPUT VOLTAGE SWING (VP-P)
Typical Performance Curves
VS = ±15V
VO = 28V
30
10
1.0
VO = 18V
VS = ±10V
VO = 8V
VS = ±5V
VO = 2V
VS = ±2V
(VOLTAGE FOLLOWER)
RL = ∞
CL = 50pF
0.1
10
180
0
-10
1
10
100
1K
10K
100K
FREQUENCY (Hz)
1M
10M
100
NORMALIZED AC PARAMETERS
REFERRED TO VALUE AT ±15V
1.1
BANDWIDTH
1.0
SLEW RATE
BANDWIDTH
0.9
0.8
0.7
0
±5
±10
±15
SUPPLY VOLTAGE (V)
FIGURE 6. NORMALIZED AC PARAMETERS vs SUPPLY
VOLTAGE
4
10K
FREQUENCY (Hz)
100K
1M
FIGURE 5. OUTPUT VOLTAGE SWING vs FREQUENCY
±20
NORMALIZED VALUE REFERRED TO 25°C
FIGURE 4. OPEN LOOP FREQUENCY RESPONSE
1K
1.2
1.1
1.0
BANDWIDTH
SLEW RATE
.9
.8
-55
-25
0
25
50
75
TEMPERATURE (°C)
FIGURE 7. NORMALIZED AC PARAMETERS vs
TEMPERATURE
100
125
HA-4741
VSUPPLY = ±15V, TA = 25°C, Unless Otherwise Specified (Continued)
1.2
25
1.0
20
0.8
VOLTAGE NOISE
15
0.6
10
0.4
CURRENT NOISE
5
0
10
100
1K
FREQUENCY (Hz)
0.2
RL = 2K
PHASE MARGIN (DEGREES)
30
6
50
5
40
4
30
3
20
2
10
1
10
FIGURE 8. INPUT NOISE vs FREQUENCY
100
1000
10,000
LOAD CAPACITANCE (pF)
0
100,000
FIGURE 9. SMALL SIGNAL BANDWIDTH AND PHASE
MARGIN vs LOAD CAPACITANCE
100
30
25
80
20
CURRENT (nA)
OUTPUT VOLTAGE (VP-P)
60
0
0
100K
10K
7
70
1.4
INPUT NOISE CURRENT (pA/√Hz)
INPUT NOISE VOLTAGE (nV/√Hz)
35
UNITY GAIN BANDWIDTH (MHz)
Typical Performance Curves
15
10
BIAS CURRENT
60
40
OFFSET CURRENT
20
5
0
0
100
1K
10K
LOAD RESISTANCE (Ω)
-50
100K
-25
0
FIGURE 10. MAXIMUM OUTPUT VOLTAGE SWING vs LOAD
RESISTANCE
POWER CONSUMPTION (mW)
50
75
100
FIGURE 11. INPUT BIAS AND OFFSET CURRENT vs
TEMPERATURE
200
160
VS = ±15
120
VS = ±10
80
VS = ±5
40
0
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
FIGURE 12. POWER CONSUMPTION vs TEMPERATURE
5
25
TEMPERATURE (°C)
125
HA-4741
Die Characteristics
PASSIVATION:
Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.)
Silox Thickness: 12kÅ ±2kÅ
Nitride Thickness: 3.5kÅ ±1.5kÅ
DIE DIMENSIONS:
87 mils x 75 mils x 19 mils
2210µm x 1910µm x 483µm
SUBSTRATE POTENTIAL (POWERED UP):
METALLIZATION:
V-
Type: Al, 1% Cu
Thickness: 16kÅ ±2kÅ
TRANSISTOR COUNT:
72
PROCESS:
Junction Isolated Bipolar/JFET
Metallization Mask Layout
HA-4741
-IN4
+IN4
V-
+IN3
-IN3
OUT3
OUT4
OUT2
OUT1
-IN1
6
+IN1
V+
+IN2
-IN2
HA-4741
Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
F14.3 MIL-STD-1835 GDIP1-T14 (D-1, CONFIGURATION A)
14 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
LEAD FINISH
c1
-D-
-A-
BASE
METAL
E
M
-Bbbb S
C A-B S
-C-
S1
0.200
-
5.08
-
0.026
0.36
0.66
2
b1
0.014
0.023
0.36
0.58
3
b2
0.045
0.065
1.14
1.65
-
b3
0.023
0.045
0.58
1.14
4
c
0.008
0.018
0.20
0.46
2
c1
0.008
0.015
0.20
0.38
3
D
-
0.785
-
19.94
5
E
0.220
0.310
5.59
7.87
5
eA
ccc M
C A-B S
e
eA/2
c
aaa M C A - B S D S
D S
NOTES
-
b2
b
MAX
0.014
α
A A
MIN
b
A
L
MILLIMETERS
MAX
A
Q
SEATING
PLANE
MIN
M
(b)
D
BASE
PLANE
SYMBOL
b1
SECTION A-A
D S
INCHES
(c)
NOTES:
1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
e
0.100 BSC
2.54 BSC
-
eA
0.300 BSC
7.62 BSC
-
eA/2
0.150 BSC
3.81 BSC
-
L
0.125
0.200
3.18
5.08
-
Q
0.015
0.060
0.38
1.52
6
S1
0.005
-
0.13
-
7
105o
90o
105o
-
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
α
90o
aaa
-
0.015
-
0.38
-
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
bbb
-
0.030
-
0.76
-
ccc
-
0.010
-
0.25
-
M
-
0.0015
-
0.038
2, 3
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b2.
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH.
7
N
14
14
8
Rev. 0 4/94
HA-4741
Dual-In-Line Plastic Packages (PDIP)
E14.3 (JEDEC MS-001-AA ISSUE D)
N
14 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
1 2 3
INCHES
N/2
-B-
-AD
E
BASE
PLANE
-C-
A2
SEATING
PLANE
A
L
D1
e
B1
D1
A1
eC
B
0.010 (0.25) M
C A B S
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
C
L
B1
0.045
0.070
1.15
1.77
8
eA
C
0.008
0.014
C
D
0.735
0.775
18.66
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English
and Metric dimensions, the inch dimensions control.
0.204
0.355
19.68
5
D1
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
eA
0.300 BSC
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
eB
-
L
0.115
4. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS-3.
N
2.54 BSC
7.62 BSC
0.430
-
0.150
2.93
14
6
10.92
7
3.81
4
14
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
9
Rev. 0 12/93
7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 1.14mm).
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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8
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