DATASHEET

EL8202, EL8203, EL8403
SIGNS
NE W D E
R
O
F
D
T
ND E
ACEMEN
COMME
ED REPL Center at
N OT R E
D
N
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M
M
Sheet
April 26, 2006
REC O
upport
NOData
chnical S .intersil.com/tsc
e
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u
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contac ERSIL or www
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1-888-IN
500MHz Rail-to-Rail Amplifiers
Features
The EL8202, EL8203, and EL8403 represent rail-to-rail
amplifiers with a -3dB bandwidth of 500MHz and slew rate of
600V/µs. Running off a very low supply current of 5.6mA per
channel, the EL8202, EL8203, and EL8403 also feature
inputs that go to 0.15V below the VS- rail. The EL8202 and
EL8203 are dual channel amplifiers. The EL8403 is a quad
channel amplifier.
• 500MHz -3dB bandwidth
The EL8202 includes a fast-acting disable/power-down
circuit. With a 25ns disable and a 200ns enable, the EL8202
is ideal for multiplexing applications.
• Input to 0.15V below VS-
The EL8202, EL8203, and EL8403 are designed for a
number of general purpose video, communication,
instrumentation, and industrial applications. The EL8202 is
available in a 10 Ld MSOP package, the EL8203 in 8 Ld SO
and 8 Ld MSOP packages, and the EL8403 in 14 Ld SO and
16 Ld QSOP packages. All are specified for operation over
the -40°C to +85°C temperature range.
• 600V/µs slew rate
• Low supply current = 5.6mA per channel
• Supplies from 3V to 5.5V
• Rail-to-rail output
• Fast 25ns disable (EL8202 only)
• Low cost
• Pb-free plus anneal available (RoHS compliant)
Applications
• Video amplifiers
• Portable/hand-held products
• Communications devices
Ordering Information (Continued)
Ordering Information
PART
NUMBER
FN7106.2
PART
TAPE &
MARKING REEL
PACKAGE
PKG.
DWG. #
PART
NUMBER
PART
TAPE &
MARKING REEL
PACKAGE
PKG.
DWG. #
EL8202IY
m
-
10 Ld MSOP MDP0043
EL8403IS
8403IS
-
14 Ld SO
MDP0027
EL8202IY-T7
m
7”
10 Ld MSOP MDP0043
EL8403IS-T7
8403IS
7”
14 Ld SO
MDP0027
EL8202IY-T13
m
13”
10 Ld MSOP MDP0043
EL8403IS-T13
8403IS
13”
14 Ld SO
MDP0027
EL8202IYZ
(See Note)
BAPAA
-
10 Ld MSOP MDP0043
(Pb-free)
EL8403ISZ
(See Note)
8403ISZ
-
14 Ld SO
(Pb-free)
MDP0027
EL8202IYZ-T7
(See Note)
BAPAA
7”
10 Ld MSOP MDP0043
(Pb-free)
EL8403ISZ-T7
(See Note)
8403ISZ
7”
14 Ld SO
(Pb-free)
MDP0027
EL8202IYZ-T13 BAPAA
(See Note)
13”
10 Ld MSOP MDP0043
(Pb-free)
EL8403ISZ-T13 8403ISZ
(See Note)
13”
14 Ld SO
(Pb-free)
MDP0027
EL8203IS
8203IS
-
8 Ld SO
MDP0027
EL8403IU
8403IU
-
16 Ld QSOP MDP0040
EL8203IS-T7
8203IS
7”
8 Ld SO
MDP0027
EL8403IU-T7
8403IU
7”
16 Ld QSOP MDP0040
8403IU
13”
16 Ld QSOP MDP0040
13”
8 Ld SO
MDP0027
EL8403IU-T13
8203ISZ
-
8 Ld SO
(Pb-free)
MDP0027
EL8403IUZ
(See Note)
8403IUZ
-
16 Ld QSOP MDP0040
(Pb-free)
8203ISZ
7”
8 Ld SO
(Pb-free)
MDP0027
EL8403IUZ-T7
(See Note)
8403IUZ
7”
16 Ld QSOP MDP0040
(Pb-free)
EL8203ISZ-T13 8203ISZ
(See Note)
13”
8 Ld SO
(Pb-free)
MDP0027
EL8403IUZ-T13 8403IUZ
(See Note)
13”
16 Ld QSOP MDP0040
(Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
EL8203IS-T13
8203IS
EL8203ISZ
(See Note)
EL8203ISZ-T7
(See Note)
EL8203IY
BJAAA
-
8 Ld MSOP
MDP0043
EL8203IY-T7
BJAAA
7”
8 Ld MSOP
MDP0043
EL8203IY-T13
BJAAA
13”
8 Ld MSOP
MDP0043
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003, 2006. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
EL8202, EL8203, EL8403
Pinouts
EL8203
(8 LD SO, MSOP)
TOP VIEW
EL8202
(10 LD MSOP)
TOP VIEW
10 INA-
INA+ 1
+
CEA 2
VS- 3
+
-
CEB 4
9 OUTA
INA- 2
8 VS+
INA+ 3
7 OUTB
6 INB+
VS- 4
5 INB+
EL8403
(16 LD QSOP)
TOP VIEW
EL8403
(14 LD SO)
TOP VIEW
OUTA 1
14 OUTD
A
- +
D
+ -
INA+ 3
VS+ 4
- +
B
+ C
OUTB 7
OUTA 1
13 IND-
INA- 2
12 IND+
INA+ 3
11 VS-
INB+ 5
INB- 6
7 OUTB
+
6 INB-
INB+ 5
INA- 2
8 VS+
OUTA 1
INB+ 5
9 INC-
INB- 6
OUTB 7
NC 8
2
- +
+ -
15 IND14 IND+
VS+ 4
10 INC+
8 OUTC
16 OUTD
13 VS12 INC+
- +
+ -
11 INC10 OUTC
9 NC
EL8202, EL8203, EL8403
Absolute Maximum Ratings (TA = 25°C)
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C
Supply Voltage from VS+ to VS- . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . VS+ +0.3V to VS- -0.3V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 40mA
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VS+ = 5V, VS- = GND, TA = 25°C, VCM = 2.5V, RL to 2.5V, AV = 1, Unless Otherwise Specified
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
-8
-0.8
+8
mV
INPUT CHARACTERISTICS
VOS
Offset Voltage
TCVOS
Offset Voltage Temperature Coefficient
Measured from TMIN to TMAX
IB
Input Bias Current
VIN = 0V
IOS
Input Offset Current
VIN = 0V
TCIOS
Input Bias Current Temperature
Coefficient
Measured from TMIN to TMAX
CMRR
Common Mode Rejection Ratio
VCM = -0.15V to +3.5V (EL8202,EL8203)
CMIR
Common Mode Input Range
RIN
Input Resistance
CIN
Input Capacitance
AVOL
Open Loop Gain
VCM = -0.15V to +3.5V (EL8403)
3
-9
-6
0.1
µA
0.6
µA
2
nA/°C
70
95
dB
60
85
VS- 0.15
Common Mode
VOUT = +1.5V to +3.5V, RL = 1k to GND
µV/°C
75
dB
VS+ 1.5
V
3.5
M
0.5
pF
90
dB
VOUT = +1.5V to +3.5V, RL = 150 to GND
80
dB
30
m
OUTPUT CHARACTERISTICS
ROUT
Output Resistance
AV = +1
VOP
Positive Output Voltage Swing
RL = 1k
4.85
4.9
V
RL = 150
4.6
4.7
V
VON
Negative Output Voltage Swing
RL = 150
100
150
mV
RL = 1k (EL8202,EL8203)
25
50
mV
50
100
RL = 1k (EL8403)
IOUT
Linear Output Current
ISC (source)
Short Circuit Current
RL = 10
ISC (sink)
Short Circuit Current
mV
65
mA
60
80
mA
RL = 10
120
150
mA
VS+ = 4.5V to 5.5V
70
95
dB
POWER SUPPLY
PSRR
Power Supply Rejection Ratio
IS-ON
Supply Current - Enabled (per amplifier)
5.6
6.2
mA
IS-OFF
Supply Current - Disabled (per amplifier) EL8202 only
40
90
µA
ENABLE (EL8202 ONLY)
tEN
Enable Time
200
ns
tDS
Disable Time
25
ns
VIH-ENB
ENABLE Pin Voltage for Power-up
0.8
V
VIL-ENB
ENABLE Pin Voltage for Shut-down
2
V
3
EL8202, EL8203, EL8403
Electrical Specifications
PARAMETER
VS+ = 5V, VS- = GND, TA = 25°C, VCM = 2.5V, RL to 2.5V, AV = 1, Unless Otherwise Specified (Continued)
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
IIH-ENB
ENABLE Pin Input Current High
8.6
µA
IIL-ENB
ENABLE Pin Input for Current Low
0.01
µA
AV = +1, RF = 0, CL = 2.5pF
500
MHz
AV = -1, RF = 1k, CL = 2.5pF
140
MHz
AV = +2, RF = 1k, CL = 2.5pF
165
MHz
AV = +10, RF = 1k, CL = 2.5pF
18
MHz
AC PERFORMANCE
BW
-3dB Bandwidth
BW
±0.1dB Bandwidth
AV = +1, RF = 0, CL = 2.5pF
35
MHz
Peak
Peaking
AV = +1, RL = 1k, CL = 2.5pF
2
dB
GBWP
Gain Bandwidth Product
200
MHz
PM
Phase Margin
RL = 1k, CL = 2.5pF
55
°
SR
Slew Rate
AV = 2, RL = 100, VOUT = 0.5V to 4.5V
600
V/µs
tR
Rise Time
2.5VSTEP, 20% - 80%
4
ns
tF
Fall Time
2.5VSTEP, 20% - 80%
2
ns
OS
Overshoot
200mV step
10
%
tPD
Propagation Delay
200mV step
1
ns
tS
0.1% Settling Time
200mV step
15
ns
dG
Differential Gain
AV = +2, RF = 1k, RL = 150
0.01
%
dP
Differential Phase
AV = +2, RF = 1k, RL = 150
0.01
°
eN
Input Noise Voltage
f = 10kHz
12
nV/Hz
iN+
Positive Input Noise Current
f = 10kHz
1.7
pA/Hz
iN-
Negative Input Noise Current
f = 10kHz
1.3
pA/Hz
eS
Channel Separation
f = 100kHz
95
dB
500
Pin Descriptions
EL8202
(MSOP-10)
EL8203
(SO-8,
MSOP-8)
EL8403
(SO-14)
EL8403
(QSOP-16)
NAME
1, 5
3, 5
3, 5, 10, 12
3,5,12,14
IN+
Non-inverting input for each channel
CE
Enable and disable input for each channel
2, 4
FUNCTION
3
4
11
13
VS-
Negative power supply
6, 10
2, 6
2, 6, 9, 13
2,6,11,15
IN-
Inverting input for each channel
7, 9
1, 7
1, 7, 8, 14
1,7,10,16
OUT
Amplifier output for each channel
8
8
4
4
VS+
Positive power supply
4
EL8202, EL8203, EL8403
Typical Performance Curves
3
2
GAIN (dB)
5
VS=5V
AV=1
RL=1k
CL=2.5pF
NORMALIZED GAIN (dB)
5
4
VOP-P=200mV
1
0
-1
VOP-P=1V
-2
-3
VOP-P=2V
-4
-5
1M
10M
100M
3
RF=RG=1k
1
-1
-3
RF=RG=500
VS=5V
AV=2
RL=1k
CL=2.5pF
-5
100K
1G
1M
FREQUENCY (Hz)
4
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
3
AV=1
2
AV=2
1
0
-1
-2
-3
-4
AV=5
AV=10
-5
1M
10M
100M
2
VS=5V
CL=2.5pF
RL=1k
RF=1k
AV=-1
AV=-5
-2
-4
AV=-10
-6
100K
1G
1M
11
9
RL=1k
GAIN (dB)
GAIN (dB)
1
0
-1
RL=500
7
5
RL=1k,
150
-5
1M
3
RL=500
-4
10M
100M
1G
FREQUENCY (Hz)
FIGURE 5. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS NON-INVERTING GAINS
5
1G
VS=5V
AV=2
CL=2.5pF
RF=RG=1k
-2
-3
100M
FIGURE 4. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS INVERTING GAINS
5
RL=100
10M
FREQUENCY (Hz)
FIGURE 3. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS NON-INVERTING GAINS
2
1G
0
FREQUENCY (Hz)
V =5V
4 AS=1
V
3 CL=2.5pF
100M
FIGURE 2. SMALL SIGNAL FREQUENCY RESPONSE
vs RF AND RG
5
VS=5V
CL=2.5pF
RL=1k
10M
FREQUENCY (Hz)
FIGURE 1. FREQUENCY RESPONSE FOR VARIOUS OUTPUT
VOLTAGE LEVELS
4
RF=RG=2k
1
100K
1M
10M
100M
1G
FREQUENCY (Hz)
FIGURE 6. SMALL SIGNAL FREQUENCY RESPONSE vs
VARIOUS RLOAD
EL8202, EL8203, EL8403
Typical Performance Curves (Continued)
5
16
VS=5V
AV=1
RL=1k
4
3
CL=5.4pF
12
CL=2.5pF
3
1
0
CL=1.5pF
-1
-2
CL=20pF
8
6
CL=10pF
4
2
-3
0
-4
-2
-5
1M
10M
100M
CL=2.5pF
-4
100K
1G
1M
FREQUENCY (Hz)
RL=150
30
405
-10
315
-30
225
RL=150
-10
-50
135
RL=1k
-90
1K
10K
1M
10M
100M
VS=5V
AV=1
RL=1k
-50
-70
-110
1K
-45
1G
10K
FIGURE 9. OPEN LOOP GAIN AND PHASE vs FREQUENCY
600
100M
1G
RL=1k
CL=2.5pF
550
500
BANDWIDTH (MHz)
-30
PSRR (dB)
10M
FIGURE 10. DISABLED OUTPUT ISOLATION FREQUENCY
RESPONSE
-10
PSRR-
-70
1M
100K
FREQUENCY (Hz)
FREQUENCY (Hz)
-50
1G
-90
45
100K
100M
FIGURE 8. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS CL
GAIN (dB)
GAIN (dB)
RL=1k
PHASE (°)
110
10M
FREQUENCY (Hz)
FIGURE 7. SMALL SIGNAL FREQUENCY RESPONSE VS CL
70
CL=28.5pF
10
GAIN (dB)
GAIN (dB)
VS=5V
AV=2
RF=RG=1k
14
PSRR+
-90
AV=1
450
400
350
300
250
AV=2
200
150
-110
1K
100
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 11. POWER SUPPLY REJECTION RATIO vs
FREQUENCY
6
3
3.5
4.5
4
5
5.5
VS (V)
FIGURE 12. SMALL SIGNAL BANDWIDTH vs SUPPLY
VOLTAGE
EL8202, EL8203, EL8403
Typical Performance Curves (Continued)
100
3.5
RL=1k
CL=1.5pF
10
PEAKING (dB)
IMPEDANCE ()
3
1
0.1
AV=1
2.5
2
1.5
1
AV=2
0.5
0
0.01
10K
100K
1M
10M
100M
3
4
3.5
4.5
FREQUENCY (Hz)
-15
10
-35
8
-55
6
-75
4
2
-95
0
-115
100K
1M
10M
100M
0
0.5
1
1.5
2
2.5
HD2
-90
1
[email protected]
Hz
@ 1M
HD3@ 5
-75
[email protected]
DISTORTION (dBc)
-80
4
4.5
5
5.5
-70
VS=5V
RL=1k
CL=2.5pF
AV=2
-70
3.5
FIGURE 16. SUPPLY CURRENT vs SUPPLY VOLTAGE
(PER CHANNEL)
FIGURE 15. COMMON-MODE REJECTION RATIO vs
FREQUENCY
-60
3
VS (V)
FREQUENCY (Hz)
DISTORTION (dBc)
5.5
FIGURE 14. SMALL SIGNAL PEAKING vs SUPPLY VOLTAGE
IS (mA)
CMRR (dB)
FIGURE 13. OUPUT IMPEDANCE vs FREQUENCY
-100
5
VS (V)
H
[email protected]
z
MHz
2
3
4
5
VOP-P (V)
FIGURE 17. HARMONIC DISTORTION vs OUTPUT VOLTAGE
7
-80
H D 2@
AV =2
AV =1
-85
VS=5V
f=5MHz
-90
-95
[email protected]
HD2@
H D 3@
VO=1VP-P for AV=1
VO=2VP-P for AV=2
-100
100
H D 3@
AV =2
AV =1
1K
2K
RLOAD ()
FIGURE 18. HARMONIC DISTORTION vs LOAD RESISTANCE
EL8202, EL8203, EL8403
Typical Performance Curves (Continued)
-50
1K
DISTORTION (dBc)
-60
-70
AV=2
HD2@
-80
-90
-100
[email protected]=2
VOLTAGE NOISE (nV/Hz)
CURRENT NOISE (pA/Hz),
VS=5V
RL=1k
CL=2.5pF
VO=1VP-P for AV=1
VO=2VP-P for AV=2
[email protected]=1
=1
@A V
HD 3
10
1
100
eN
10
IN+
1
10
40
100
FREQUENCY (MHz)
10K
100K
1M
10M
FIGURE 20. VOLTAGE AND CURRENT NOISE vs FREQUENCY
0
CHANNEL SEPARATION (dB)
0
CHANNEL SEPARATION (dB)
1K
FREQUENCY (Hz)
FIGURE 19. HARMONIC DISTORTION vs FREQUENCY
-10
-20
-30
-40
CH1<=>CH2
-50
-60
-70
-80
-90
-100
100K
1M
10M
100M
1G
-10
-20
-30
-40
-50
FIGURE 21. CHANNEL SEPARATION vs FREQUENCY
(EL8202 AND EL8203)
VS=5V
AV=1
RL=1k to 2.5V
CL=5pF
CH1<=>CH2
-60
-70
CH1<=>CH4
CH2<=>CH3
-80
CH1<=>CH3
CH2<=>CH4
-90
-100
100K
1M
10M
100M
FIGURE 22. CHANNEL SEPARATION vs FREQUENCY
(EL8403)
VS=5V
AV=1
RL=1k to 2.5V
CL=5pF
3.5
2.5
2.5
1.5
1.5
2ns/DIV
FIGURE 23. LARGE SIGNAL TRANSIENT
RESPONSE - RISING
8
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
3.5
IN-
2ns/DIV
FIGURE 24. LARGE SIGNAL TRANSIENT
RESPONSE - FALLING
EL8202, EL8203, EL8403
Typical Performance Curves (Continued)
2.6
2.5
VS=5V, AV=1, RL=1k TO 2.5V, CL= 2.5pF
VS=5V, AV=5, RL=1k to 2.5V
VIN
5
2.4
2.5
2.6
VOUT
2.5
0
2.4
2µs/DIV
10ns/DIV
FIGURE 25. SMALL SIGNAL TRANSIENT REPONSE
VS=5V, AV=5, RL=1k TO 2.5V
FIGURE 26. OUTPUT SWING
CH1
ENABLE
INPUT
5
2.5
CH2
VOUT
0
CH1, CH2, 1V/DIV, M=100ns
2µs/DIV
FIGURE 27. OUTPUT SWING
FIGURE 28. ENABLED RESPONSES (EL8202)
CH1
CH2
POWER DISSIPATION (W)
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
ENABLE
INPUT
VOUT
1
0.9 833mW
0.8
0.3
FIGURE 29. DISABLED RESPONSE (EL8202)
9
JA
=
MSOP8/10
JA=206°C/W
0.2
SO
12
0
14
°C
/W
SO8
JA=160°C/W
QSOP16
JA=158°C/W
0.1
0
CH1, CH2, 0.5V/DIV, M=20ns

0.7 625mW
0.6
633mW
0.5
0.4 486mW
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
EL8202, EL8203, EL8403
Typical Performance Curves (Continued)
POWER DISSIPATION (W)
1.4
JEDEC JESD51-7 HIGH EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
1.2 1.136W

1 909mW
0.8
JA
893mW
870mW
MSOP8/10
JA=115°C/W
0.6
0.4
SO
=8 14
8°
C/
W
SO8
JA=110°C/W
QSOP16
JA=112°C/W
0.2
0
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 31. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Simplified Schematic Diagram
VS+
I1
I2
Q5
IN+
Q1
R8
VBIAS1
Q6
R3
R1
R7
R6
Q7
R2
Q2
DIFFERENTIAL TO
SINGLE ENDED
DRIVE
GENERATOR
IN-
VBIAS2
Q3
OUT
Q4
Q8
R4
R5
R9
VS-
Description of Operation and Application
Information
Product Description
The EL8202, EL8203 and EL8403 are wide bandwidth,
single supply, low power and rail-to-rail output voltage
feedback operational amplifiers. The amplifiers are internally
compensated for closed loop gain of +1 of greater.
Connected in voltage follower mode and driving a 1k load,
the EL8202, EL8203 and EL8403 have a -3dB bandwidth of
500MHz. Driving a 150 load, the bandwidth is about
350MHz while maintaining a 600V/us slew rate. The EL8202
is available with a power down pin to reduce power to 30µA
typically while the amplifier is disabled.
10
Input, Output and Supply Voltage Range
The EL8202, EL8203 and EL8403 have been designed to
operate with a single supply voltage from 3V to 5.0V. Split
supplies can also be used as long as their total voltage is
within 3V to 5.0V. The amplifiers have an input common
mode voltage range from 0.15V below the negative supply
(VS- pin) to within 1.5V of the positive supply (VS+ pin). If the
input signal is outside the above specified range, it will cause
the output signal to be distorted.
The output of the EL8202, EL8203 and EL8403 can swing
rail to rail. As the load resistance becomes lower, the ability
to drive close to each rail is reduced. For the load resistor
1k, the output swing is about 4.9V at a 5V supply. For the
load resistor 150, the output swing is about 4.6V.
EL8202, EL8203, EL8403
Choice of Feedback Resistor and Gain Bandwidth
Product
For applications that require a gain of +1, no feedback
resistor is required. Just short the output pin to the inverting
input pin. For gains greater than +1, the feedback resistor
forms a pole with the parasitic capacitance at the inverting
input. As this pole becomes smaller, the amplifier’s phase
margin is reduced. This causes ringing in the time domain
and peaking in the frequency domain. Therefore, RF has
some maximum value that should not be exceeded for
optimum performance. If a large value of RF must be used, a
small capacitor in the few pF range in parallel with RF can
help to reduce the ringing and peaking at the expense of
reducing the bandwidth.
As far as the output stage of the amplifier is concerned, the
output stage is also a gain stage with the load. RF and RG
appear in parallel with RL for gains other than +1. As this
combination gets smaller, the bandwidth falls off.
Consequently, RF also has a minimum value that should not
be exceeded for optimum performance. For gain of +1, RF=0
is optimum. For the gains other than +1, optimum response
is obtained with RF between 300 to 1k.
The EL8202, EL8203 and EL8403 have a gain bandwidth
product of 200MHz. For gains 5, its bandwidth can be
predicted by the following equation:
Gain  BW = 200MHz
allow extensive capacitive drive. However, other applications
may have high capacitive loads without a back-termination
resistor. Again, a small series resistor at the output can help
to reduce peaking.
Disable/Power-Down
The EL8202 can be disabled and placed its output in a high
impedance state. The turn off time is about 25ns and the turn
on time is about 200ns. When disabled, the amplifier’s
supply current is reduced to 40µA typically, thereby
effectively eliminating the power consumption. The
amplifier’s power down can be controlled by standard TTL or
CMOS signal levels at the ENABLE pin. The applied logic
signal is relative to VS- pin. Letting the ENABLE pin float or
applying a signal that is less than 0.8V above VS- will enable
the amplifier. The amplifier will be disabled when the signal
at ENABLE pin is 2V above VS-.
Output Drive Capability
The EL8202, EL8203 and EL8403 do not have internal short
circuit protection circuitry. They have a typical short circuit
current of 80mA sourcing and 150mA sinking for the output
is connected to half way between the rails with a 10
resistor. If the output is shorted indefinitely, the power
dissipation could easily increase such that the part will be
destroyed. Maximum reliability is maintained if the output
current never exceeds ±40mA. This limit is set by the design
of the internal metal interconnections.
Power Dissipation
Video Performance
For good video performance, an amplifier is required to
maintain the same output impedance and the same
frequency response as DC levels are changed at the output.
This is especially difficult when driving a standard video load
of 150, because the change in output current with DC level.
Special circuitry has been incorporated in the EL8202,
EL8203 and EL8403 to reduce the variation of the output
impedance with the current output. This results in dG and dP
specifications of 0.01% and 0.01, while driving 150 at a
gain of 2. Driving high impedance loads would give a similar
or better dG and dP performance.
Driving Capacitive Loads and Cables
The EL8202, EL8203 and EL8403 can drive 5pF loads in
parallel with 1k with less than 5dB of peaking at gain of +1.
If less peaking is desired in applications, a small series
resistor (usually between 5 to 50) can be placed in series
with the output to eliminate most peaking. However, this will
reduce the gain slightly. If the gain setting is greater than 1,
the gain resistor RG can then be chosen to make up for any
gain loss which may be created by the additional series
resistor at the output.
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, a back-termination series resistor at the
amplifier’s output will isolate the amplifier from the cable and
11
With the high output drive capability of the EL8202, EL8203
and EL8403. It is possible to exceed the 125C absolute
maximum junction temperature under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if the load conditions or package types need to be
modified for the amplifier to remain in the safe operating
area.
The maximum power dissipation allowed in a package is
determined according to:
T JMAX – T AMAX
PD MAX = -------------------------------------------- JA
Where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
JA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
EL8202, EL8203, EL8403
For sourcing:
V OUTi
PD MAX = V S  I SMAX +   V S – V OUTi   ----------------R Li
For sinking:
as well as the output signal with the negative going sync
pulse removed.
5V
VIN
PD MAX = V S  I SMAX +   V OUTi – V S-   I LOADi
VS+
+
-
75
VS-
75
VOUT
75
Where:
1K
VS = Total supply voltage
ISMAX = Maximum quiescent supply current
1K
FIGURE 32. SYNC PULSE REMOVER
VOUTi = Maximum output voltage of the application for
each channel
RLOADi = Load resistance tied to ground for each
channel
1V
ILOADi = Load current for each channel
VIN
0V
By setting the two PDMAX equations equal to each other, we
can solve the output current and RLOADi to avoid the device
overheat.
1V
VOUT
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as short as possible. The power supply
pin must be well bypassed to reduce the risk of oscillation.
For normal single supply operation, where the VS- pin is
connected to the ground plane, a single 4.7µF tantalum
capacitor in parallel with a 0.1µF ceramic capacitor from VS+
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the VS- pin becomes the negative
supply rail.
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier’s inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
Typical Applications
VIDEO SYNC PULSE REMOVER
Many CMOS analog to digital converters have a parasitic
latch up problem when subjected to negative input voltage
levels. Since the sync tip contains no useful video
information and it is a negative going pulse, we can chop it
off. Figure 32 shows a gain of 2 connections. Figure 33
shows the complete input video signal applied at the input,
12
0.5V
0.5V
0V
M = 10µs/DIV
FIGURE 33. VIDEO SIGNAL
MULTIPLEXER
Besides the normal power down usage, the ENABLE pin of
the EL8202 can be used for multiplexing applications. Figure
34 shows two EL8202 with the outputs tied together, driving
a back terminated 75 video load. A 2VP-P 2MHz sine wave
is applied to Amp A and a 1VP-P 2MHz sine wave is applied
to Amp B. Figure 33 shows the ENABLE signal and the
resulting output waveform at VOUT. Observe the breakbefore-make operation of the multiplexing. Amp A is on and
VIN1 is passed through to the output when the ENABLE
signal is low and turns off in about 25ns when the ENABLE
signal is high. About 200ns later, Amp B turns on and VIN2 is
passed through to the output. The break-before-make
operation ensures that more than one amplifier isn’t trying to
drive the bus at the same time.
EL8202, EL8203, EL8403
+2.5V
B 2MHz
1VP-P
5V
+
75
-2.5V
VIN
C1
47µF
R1
10K
R3
C3
470µF 75
+
1K
1K
75
VOUT
RT
75
VOUT
-
R2
10K
75
+2.5V
A 2MHz
2VP-P
75
+
75
RF
1k
RG
1k
-
-2.5V
1K
C2
220µF
1K
FIGURE 36. 5V SINGLE SUPPLY NON INVERTING
VIDEO LINE DRIVER
ENABLE
RF
1k
FIGURE 34. TWO TO ONE MULTIPLEXER
VIN
0V
-0.5V
ENABLE
-1.5V
C1
RG
47µF 500
5V
RT
75
5V
-
R3
C3
470µF 75
VOUT
+
R1
10K
75
-2.5V
R2
10K
1V
C2
220µF
0V
B
A
-1V
FIGURE 37. SINGLE SUPPLY INVERTING VIDEO LINE DRIVER
4
M = 50ns/DIV
SINGLE SUPPLY VIDEO LINE DRIVER
The EL8202, EL8203 and EL8403 are wideband rail-to-rail
output op amplifiers with large output current, excellent dG,
dP, and low distortion that allow them to drive video signals
in low supply applications. Figure 36 is the single supply
non-inverting video line driver configuration and Figure 37 is
the inverting video ling driver configuration. The signal is AC
coupled by C1. R1 and R2 are used to level shift the input
and output to provide the largest output swing. RF and RG
set the AC gain. C2 isolates the virtual ground potential. RT
and R3 are the termination resistors for the line. C1, C2 and
C3 are selected big enough to minimize the droop of the
luminance signal.
13
3
NORMALIZED GAIN (dB)
FIGURE 35.
2
1
0
AV = 2
-1
-2
AV = -2
-3
-4
-5
-6
100K
1M
10M
FREQUENCY (Hz)
100M 500M
FIGURE 38. VIDEO LINE DRIVER FREQUENCY RESPONSE
EL8202, EL8203, EL8403
SO Package Outline Drawing
14
EL8202, EL8203, EL8403
MSOP Package Outline Drawing
15
EL8202, EL8203, EL8403
QSOP Package Outline Drawing
NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at
http://www.intersil.com/design/packages/index.asp
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
16