DATASHEET

HA5022
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Dual, 125MHz, Video Current Feedback
Amplifier with Disable
The HA5022 is a dual version of the popular Intersil HA5020.
It features wide bandwidth and high slew rate, and is
optimized for video applications and gains between 1 and
10. It is a current feedback amplifier and thus yields less
bandwidth degradation at high closed loop gains than
voltage feedback amplifiers.
The low differential gain and phase, 0.1dB gain flatness, and
ability to drive two back terminated 75Ω cables, make this
amplifier ideal for demanding video applications.
The HA5022 also features a disable function that
significantly reduces supply current while forcing the output
to a true high impedance state. This functionality allows 2:1
video multiplexers to be implemented with a single IC.
The current feedback design allows the user to take
advantage of the amplifier’s bandwidth dependency on the
feedback resistor. By reducing RF , the bandwidth can be
increased to compensate for decreases at higher closed
loop gains or heavy output loads.
PART NUMBER
FN3392.7
Features
• Dual Version of HA-5020
• Individual Output Enable/Disable
• Input Offset Voltage . . . . . . . . . . . . . . . . . . . . . . . . .800µV
• Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . . . 125MHz
• Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475V/µs
• Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03%
• Differential Phase. . . . . . . . . . . . . . . . . . . . . 0.03 Degrees
• Supply Current (per Amplifier) . . . . . . . . . . . . . . . . 7.5mA
• ESD Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . 4000V
• Guaranteed Specifications at ±5V Supplies
Applications
• Video Multiplexers; Video Switching and Routing
• Video Gain Block
• Video Distribution Amplifier/RGB Amplifier
• Flash A/D Driver
Part Number Information
TEMP.
RANGE (oC)
May 2003
• Current to Voltage Converter
PACKAGE
PKG.
NO.
• Medical Imaging
HA5022IP
-40 to 85
16 Ld PDIP
E16.3
• Radar and Imaging Systems
HA5022IB
-40 to 85
16 Ld SOIC
M16.15
Pinout
HA5022EVAL
High Speed Op Amp DIP Evaluation Board
1
HA5022 (PDIP, SOIC)
TOP VIEW
-IN1
1
+IN1
2
DIS1
-
+
16 OUT1
15 NC
3
14 NC
V- 4
13 V+
DIS2
5
12 NC
+IN2
6
-IN2
7
NC
8
+
-
11 NC
10 OUT2
9 NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HA5022
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . 36V
DC Input Voltage (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . ±VSUPPLY
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10V
Output Current (Note 4) . . . . . . . . . . . . . . . . . Short Circuit Protected
ESD Rating (Note 3)
Human Body Model (Per MIL-STD-883 Method 3015.7) . . 2000V
Thermal Resistance (Typical, Note 2)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
115
Maximum Junction Temperature (Note 1) . . . . . . . . . . . . . . . . .175oC
Maximum Junction Temperature (Plastic Package, Note 1) . .150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Supply Voltage Range (Typical) . . . . . . . . . . . . . . . . ±4.5V to ±15V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation, including output load, must be designed to maintain junction temperature below 175oC for die, and below 150oC
for plastic packages. See Application Information section for safe operating area information.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
3. The non-inverting input of unused amplifiers must be connected to GND.
4. Output is protected for short circuits to ground. Brief short circuits to ground will not degrade reliability, however, continuous (100% duty cycle)
output current should not exceed 15mA for maximum reliability.
VSUPPLY = ±5V, RF = 1kΩ, AV = +1, RL = 400Ω, CL ≤ 10pF, Unless Otherwise Specified
Electrical Specifications
(NOTE 11)
TEST
LEVEL
TEMP.
(oC)
MIN
TYP
MAX
UNITS
A
25
-
0.8
3
mV
A
Full
-
-
5
mV
Delta VIO Between Channels
A
Full
-
1.2
3.5
mV
Average Input Offset Voltage Drift
B
Full
-
5
-
µV/oC
A
25
53
-
-
dB
A
Full
50
-
-
dB
A
25
60
-
-
dB
A
Full
55
-
-
dB
A
Full
±2.5
-
-
V
A
25
-
3
8
µA
A
Full
-
-
20
µA
A
25
-
-
0.15
µA/V
A
Full
-
-
0.5
µA/V
A
25
-
-
0.1
µA/V
A
Full
-
-
0.3
µA/V
A
25, 85
-
4
12
µA
A
-40
-
10
30
µA
A
25, 85
-
6
15
µA
A
-40
-
10
30
µA
A
25
-
-
0.4
µA/V
A
Full
-
-
1.0
µA/V
TEST
CONDITIONS
PARAMETER
INPUT CHARACTERISTICS
Input Offset Voltage (VIO)
VIO Common Mode Rejection Ratio
VIO Power Supply Rejection Ratio
Input Common Mode Range
Note 5
±3.5V ≤ VS ≤ ±6.5V
Note 5
Non-Inverting Input (+IN) Current
+IN Common Mode Rejection
(+IBCMR = 1 )
+RIN
Note 5
+IN Power Supply Rejection
±3.5V ≤ VS ≤ ±6.5V
Inverting Input (-IN) Current
Delta -IN BIAS Current Between
Channels
-IN Common Mode Rejection
Note 5
2
HA5022
VSUPPLY = ±5V, RF = 1kΩ, AV = +1, RL = 400Ω, CL ≤ 10pF, Unless Otherwise Specified (Continued)
Electrical Specifications
TEST
CONDITIONS
PARAMETER
±3.5V ≤ VS ≤ ±6.5V
-IN Power Supply Rejection
(NOTE 11)
TEST
LEVEL
TEMP.
(oC)
MIN
TYP
MAX
UNITS
A
25
-
-
0.2
µA/V
A
Full
-
-
0.5
µA/V
Input Noise Voltage
f = 1kHz
B
25
-
4.5
-
nV/√Hz
+Input Noise Current
f = 1kHz
B
25
-
2.5
-
pA/√Hz
-Input Noise Current
f = 1kHz
B
25
-
25.0
-
pA/√Hz
Note 16
A
25
1.0
-
-
MΩ
A
Full
0.85
-
-
MΩ
A
25
70
-
-
dB
A
Full
65
-
-
dB
A
25
50
-
-
dB
A
Full
45
-
-
dB
A
25
±2.5
±3.0
-
V
A
Full
±2.5
±3.0
-
V
TRANSFER CHARACTERISTICS
Transimpedance
RL = 400Ω, VOUT = ±2.5V
Open Loop DC Voltage Gain
RL = 100Ω, VOUT = ±2.5V
Open Loop DC Voltage Gain
OUTPUT CHARACTERISTICS
Output Voltage Swing
RL = 150Ω
Output Current
RL = 150Ω
B
Full
±16.6
±20.0
-
mA
Output Current, Short Circuit
VIN = ±2.5V, VOUT = 0V
A
Full
±40
±60
-
mA
Output Current, Disabled
VOUT = ±2.5V, VIN = 0V,
DISABLE = 0V
A
Full
-
-
2
µA
Output Disable Time
Note 12
B
25
-
40
-
µs
Output Enable Time
Note 13
B
25
-
40
-
ns
Output Capacitance, Disabled
Note 14
B
25
-
15
-
pF
Supply Voltage Range
A
25
5
-
15
V
Quiescent Supply Current
A
Full
-
7.5
10
mA/Op Amp
POWER SUPPLY CHARACTERISTICS
Supply Current, Disabled
DISABLE = 0V
A
Full
-
5
7.5
mA/Op Amp
Disable Pin Input Current
DISABLE = 0V
A
Full
-
1.0
1.5
mA
Minimum Pin 8 Current to Disable
Note 6
A
Full
350
-
-
µA
Maximum Pin 8 Current to Enable
Note 7
A
Full
-
-
20
µA
Slew Rate
Note 8
B
25
275
400
-
V/µs
Full Power Bandwidth
Note 9
B
25
22
28
-
MHz
Rise Time
Note 10
B
25
-
6
-
ns
Fall Time
Note 10
B
25
-
6
-
ns
Propagation Delay
Note 10
B
25
-
6
-
ns
B
25
-
4.5
-
%
AC CHARACTERISTICS (AV = +1)
Overshoot
-3dB Bandwidth
VOUT = 100mV
B
25
-
125
-
MHz
Settling Time to 1%
2V Output Step
B
25
-
50
-
ns
Settling Time to 0.25%
2V Output Step
B
25
-
75
-
ns
3
HA5022
VSUPPLY = ±5V, RF = 1kΩ, AV = +1, RL = 400Ω, CL ≤ 10pF, Unless Otherwise Specified (Continued)
Electrical Specifications
TEST
CONDITIONS
PARAMETER
(NOTE 11)
TEST
LEVEL
TEMP.
(oC)
MIN
TYP
MAX
UNITS
AC CHARACTERISTICS (AV = +2, RF = 681Ω)
Slew Rate
Note 8
B
25
-
475
-
V/µs
Full Power Bandwidth
Note 9
B
25
-
26
-
MHz
Rise Time
Note 10
B
25
-
6
-
ns
Fall Time
Note 10
B
25
-
6
-
ns
Propagation Delay
Note 10
B
25
-
6
-
ns
B
25
-
12
-
%
Overshoot
-3dB Bandwidth
VOUT = 100mV
B
25
-
95
-
MHz
Settling Time to 1%
2V Output Step
B
25
-
50
-
ns
Settling Time to 0.25%
2V Output Step
B
25
-
100
-
ns
Gain Flatness
5MHz
B
25
-
0.02
-
dB
20MHz
B
25
-
0.07
-
dB
AC CHARACTERISTICS (AV = +10, RF = 383Ω)
Slew Rate
Note 8
B
25
350
475
-
V/µs
Full Power Bandwidth
Note 9
B
25
28
38
-
MHz
Rise Time
Note 10
B
25
-
8
-
ns
Fall Time
Note 10
B
25
-
9
-
ns
Propagation Delay
Note 10
B
25
-
9
-
ns
B
25
-
1.8
-
%
Overshoot
-3dB Bandwidth
VOUT = 100mV
B
25
-
65
-
MHz
Settling Time to 1%
2V Output Step
B
25
-
75
-
ns
Settling Time to 0.1%
2V Output Step
B
25
-
130
-
ns
Differential Gain (Note 15)
RL = 150Ω
B
25
-
0.03
-
%
Differential Phase (Note 15)
RL = 150Ω
B
25
-
0.03
-
Degrees
VIDEO CHARACTERISTICS
NOTES:
5. VCM = ±2.5V. At -40oC Product is tested at VCM = ±2.25V because short test duration does not allow self heating.
6. RL = 100Ω, VIN = 2.5V. This is the minimum current which must be pulled out of the Disable pin in order to disable the output. The output is
considered disabled when -10mV ≤ VOUT ≤ +10mV.
7. VIN = 0V. This is the maximum current that can be pulled out of the Disable pin with the HA5022 remaining enabled. The HA5022 is
considered disabled when the supply current has decreased by at least 0.5mA.
8. VOUT switches from -2V to +2V, or from +2V to -2V. Specification is from the 25% to 75% points.
Slew Rate9. FPBW = ---------------------------;V
= 2V.
2πV PEAK PEAK
10. RL = 100Ω, VOUT = 1V. Measured from 10% to 90% points for rise/fall times; from 50% points of input and output for propagation delay.
11. A. Production Tested; B. Typical or Guaranteed Limit based on characterization; C. Design Typical for information only.
12. VIN = +2V, DISABLE = +5V to 0V. Measured from the 50% point of DISABLE to VOUT = 0V.
13. VIN = +2V, DISABLE = 0V to +5V. Measured from the 50% point of DISABLE to VOUT = 2V.
14. VIN = 0V, Force VOUT from 0V to ±2.5V, tR = tF = 50ns, DISABLE = 0V.
15. Measured with a VM700A video tester using an NTC-7 composite VITS.
16. VOUT = ±2.5V. At -40oC Product is tested at VOUT = ±2.25V because short test duration does not allow self heating.
4
HA5022
Test Circuits and Waveforms
+
DUT
50Ω
HP4195
NETWORK
ANALYZER
50Ω
FIGURE 1. TEST CIRCUIT FOR TRANSIMPEDANCE MEASUREMENTS
(NOTE 17)
100Ω
(NOTE 17)
100Ω
VIN
+
VIN
DUT
VOUT
-
50Ω
RL
100Ω
+
DUT
VOUT
-
50Ω
RI
681Ω
RF , 681Ω
RL
400Ω
RF , 1kΩ
FIGURE 2. SMALL SIGNAL PULSE RESPONSE CIRCUIT
FIGURE 3. LARGE SIGNAL PULSE RESPONSE CIRCUIT
NOTE:
17. A series input resistor of ≥100Ω is recommended to limit input currents in case input signals are present before the HA5022 is powered up.
Vertical Scale: VIN = 100mV/Div., VOUT = 100mV/Div.
Horizontal Scale: 20ns/Div.
FIGURE 4. SMALL SIGNAL RESPONSE
5
Vertical Scale: VIN = 1V/Div., VOUT = 1V/Div.
Horizontal Scale: 50ns/Div.
FIGURE 5. LARGE SIGNAL RESPONSE
Schematic Diagram
(One Amplifier of Two)
V+
R5
2.5K
R2
800
R6
15K
R10
820
D2
QP8
R15
400
QP9
R19
400
QP1
QP5
R11
1K
R17
280
QN5
R24
140
6
QN12
R7
15K
QN1
QP6
QN6
-IN
R12
280
QP4
QP17
QN13
+IN
QN17
R25
20
C2
1.4pF
QN15
QN2
R21
140
QN10
QP7
QN4
R14
280
R22
280
QN14
R16
400
QN21
R25
140
QN16
R13
1K
QN7
HA5022
QP13
R3
6K
QN3
QP20
R28
20
DIS
D1
QP16
QP12
QP3
R31
5
QP15
C1
1.4pF
QN8
R1
60K
QP19
R20
140
1.25K
QP2
QP18
R18
280
QP10
R8
200
QP14
QP11
R29
9.5
R33
2K
R27
QN18
R23
400
R26
200
R32
5
QN19
QN20
R26
200
R30
7
OUT
R4
800
V-
R33
800
R9
820
QN9
QN11
HA5022
Application Information
as short as possible to minimize the capacitance from this
node to ground.
Optimum Feedback Resistor
The plots of inverting and non-inverting frequency response,
see Figure 11 and Figure 12 in the Typical Performance
Curves section, illustrate the performance of the HA5022 in
various closed loop gain configurations. Although the
bandwidth dependency on closed loop gain isn’t as severe
as that of a voltage feedback amplifier, there can be an
appreciable decrease in bandwidth at higher gains. This
decrease may be minimized by taking advantage of the
current feedback amplifier’s unique relationship between
bandwidth and RF . All current feedback amplifiers require a
feedback resistor, even for unity gain applications, and RF ,
in conjunction with the internal compensation capacitor, sets
the dominant pole of the frequency response. Thus, the
amplifier’s bandwidth is inversely proportional to RF . The
HA5022 design is optimized for a 1000Ω RF at a gain of +1.
Decreasing RF in a unity gain application decreases stability,
resulting in excessive peaking and overshoot. At higher
gains the amplifier is more stable, so RF can be decreased
in a trade-off of stability for bandwidth.
The table below lists recommended RF values for various
gains, and the expected bandwidth.
GAIN
(ACL)
BANDWIDTH
(MHz)
RF (Ω)
-1
750
100
+1
1000
125
+2
681
95
+5
1000
52
+10
383
65
-10
750
22
Driving Capacitive Loads
Capacitive loads will degrade the amplifier’s phase margin
resulting in frequency response peaking and possible
oscillations. In most cases the oscillation can be avoided by
placing an isolation resistor (R) in series with the output as
shown in Figure 6.
100Ω
VIN
R
+
VOUT
-
RT
CL
RF
RI
FIGURE 6. PLACEMENT OF THE OUTPUT ISOLATION
RESISTOR, R
The selection criteria for the isolation resistor is highly
dependent on the load, but 27Ω has been determined to be
a good starting value.
Power Dissipation Considerations
Due to the high supply current inherent in dual amplifiers,
care must be taken to insure that the maximum junction
temperature (TJ, see Absolute Maximum Ratings) is not
exceeded. Figure 7 shows the maximum ambient
temperature versus supply voltage for the available package
styles (PDIP, SOIC). At VS = ±5V quiescent operation both
package styles may be operated over the full industrial
range of -40oC to 85oC. It is recommended that thermal
calculations, which take into account output power, be
performed by the designer.
PC Board Layout
Attention must be given to decoupling the power supplies. A
large value (10µF) tantalum or electrolytic capacitor in
parallel with a small value (0.1µF) chip capacitor works well
in most cases.
A ground plane is strongly recommended to control noise.
Care must also be taken to minimize the capacitance to
ground seen by the amplifier’s inverting input (-IN). The
larger this capacitance, the worse the gain peaking, resulting
in pulse overshoot and possible instability. It is
recommended that the ground plane be removed under
traces connected to -IN, and that connections to -IN be kept
7
140
MAX. AMBIENT TEMPERATURE
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip resistors
and chip capacitors is strongly recommended. If leaded
components are used the leads must be kept short
especially for the power supply decoupling components and
those components connected to the inverting input.
130
PDIP
120
110
100
90
SOIC
80
5
7
9
11
13
15
SUPPLY VOLTAGE (±V)
FIGURE 7. MAXIMUM OPERATING AMBIENT
TEMPERATURE vs SUPPLY VOLTAGE
Enable/Disable Function
When enabled the amplifier functions as a normal current
feedback amplifier with all of the data in the electrical
specifications table being valid and applicable. When
HA5022
disabled the amplifier output assumes a true high
impedance state and the supply current is reduced
significantly.
The circuit shown in Figure 8 is a simplified schematic of the
enable/disable function. The large value resistors in series
with the DISABLE pin makes it appear as a current source to
the driver. When the driver pulls this pin low current flows out
of the pin and into the driver. This current, which may be as
large as 350µA when external circuit and process variables
are at their extremes, is required to insure that point “A”
achieves the proper potential to disable the output. The
driver must have the compliance and capability of sinking all
of this current.
V+
R6
15K
R10
R33
QP18
D1
R8
R7
15K
A
QP3
ENABLE/DISABLE INPUT
FIGURE 8. SIMPLIFIED SCHEMATIC OF ENABLE/DISABLE
FUNCTION
When VCC is +5V the DISABLE pin may be driven with a
dedicated TTL gate. The maximum low level output voltage
of the TTL gate, 0.4V, has enough compliance to insure that
the amplifier will always be disabled even though D1 will not
turn on, and the TTL gate will sink enough current to keep
point “A” at its proper voltage. When VCC is greater than +5V
the DISABLE pin should be driven with an open collector
device that has a breakdown rating greater than VCC .
Referring to Figure 8, it can be seen that R6 will act as a pullup resistor to +VCC if the DISABLE pin is left open. In those
cases where the enable/disable function is not required on
all circuits some circuits can be permanently enabled by
letting the DISABLE pin float. If a driver is used to set the
enable/disable level, be sure that the driver does not sink
more than 20µA when the DISABLE pin is at a high level.
TTL gates, especially CMOS versions, do not violate this
criteria so it is permissible to control the enable/disable
function with TTL.
Typical Applications
Two Channel Video Multiplexer
Referring to the amplifier U1A in Figure 9, R1 terminates the
cable in its characteristic impedance of 75Ω, and R4 back
terminates the cable in its characteristic impedance. The
amplifier is set up in a gain configuration of +2 to yield an
overall network gain of +1 when driving a double terminated
cable. The value of R3 can be changed if a different network
gain is desired. R5 holds the disable pin at ground thus
inhibiting the amplifier until the switch, S1, is thrown to
8
position 1. At position 1 the switch pulls the disable pin up to
the plus supply rail thereby enabling the amplifier. Since all
of the actual signal switching takes place within the amplifier,
it’s differential gain and phase parameters, which are 0.03%
and 0.03 degrees respectively, determine the circuit’s
performance. The other circuit, U1B, operates in a similar
manner.
When the plus supply rail is 5V the disable pin can be driven
by a dedicated TTL gate as discussed earlier. If a multiplexer
IC or its equivalent is used to select channels its logic must
be break before make. When these conditions are satisfied
the HA5022 is often used as a remote video multiplexer, and
the multiplexer may be extended by adding more amplifier
ICs.
Low Impedance Multiplexer
Two common problems surface when you try to multiplex
multiple high speed signals into a low impedance source
such as an A/D converter. The first problem is the low
source impedance which tends to make amplifiers oscillate
and causes gain errors. The second problem is the
multiplexer which supplies no gain, introduces all kinds of
distortion and limits the frequency response. Using op amps
which have an enable/disable function, such as the HA5022,
eliminates the multiplexer problems because the external
mux chip is not needed, and the HA5022 can drive low
impedance (large capacitance) loads if a series isolation
resistor is used.
Referring to Figure 10, both inputs are terminated in their
characteristic impedance; 75Ω is typical for video
applications. Since the drivers usually are terminated in their
characteristic impedance the input gain is 0.5, thus the
amplifiers, U2, are configured in a gain of +2 to set the circuit
gain equal to one. Resistors R2 and R3 determine the
amplifier gain, and if a different gain is desired R2 should be
changed according to the equation G = (1 + R3/R2). R3 sets
the frequency response of the amplifier so you should refer
to the manufacturers data sheet before changing its value.
R5, C1 and D1 are an asymmetrical charge/discharge time
circuit which configures U1 as a break before make switch to
prevent both amplifiers from being active simultaneously. If
this design is extended to more channels the drive logic
must be designed to be break before make. R4 is enclosed
in the feedback loop of the amplifier so that the large open
loop amplifier gain of U2 will present the load with a small
closed loop output impedance while keeping the amplifier
stable for all values of load capacitance.
The circuit shown in Figure 10 was tested for the full range of
capacitor values with no oscillations being observed; thus,
problem one has been solved.The frequency and gain
characteristics of the circuit are now those of the amplifier
independent of any multiplexing action; thus, problem two
has been solved. The multiplexer transition time is
approximately 15µs with the component values shown.
HA5022
(NOTE 17)
U
100Ω
1 1A
+ 16
VIDEO INPUT #1
R1
75
2
R6
75
VIDEO OUTPUT
TO 75Ω LOAD
-
3
R5
2000
R2
681
R3
681
VIDEO INPUT #2
R4
75
1
2
(NOTE 17)
U
100Ω
7 1B
10
6 +-
R9
75
3
+5V IN
R10
2000
R7
681
+5V
+5V
S1
ALL
OFF
5
R8
681
R11
100
-5V IN
-5V
+
10µF
0.1µF
10µF
0.1µF
+
NOTES:
18. U1 is HA5022.
19. All resistors in Ω.
20. S1 is break before make.
21. Use ground plane.
FIGURE 9. TWO CHANNEL HIGH IMPEDANCE MULTIPLEXER
R3A
681
INPUT B
R1A
681
R1A
75
R4A
U2A
27
16
1 +
4
-5V
100Ω 2 3
(NOTE 17)
0.01µF
INPUT A
D1A
1N4148
R1B
75
U1C
R5A
2000
R3B
681
R2B
681
C1A
0.047µF
CHANNEL
SWITCH
100Ω
(NOTE 17)
7 U2B
- 10
6 + 13
5
INHIBIT
R6
100K
U1B
U1D
D1B
1N4148
C1B
0.047µF
NOTES:
22. U2: HA5022.
23. U1: CD4011.
FIGURE 10. LOW IMPEDANCE MULTIPLEXER
9
OUTPUT
+5V
0.01µF
R5B
2000
U1A
R4B
27
HA5022
Typical Performance Curves
VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified
5
5
VOUT = 0.2VP-P
CL = 10pF
AV = +1, RF = 1kΩ
3
AV = 2, RF = 681Ω
2
AV = 5, RF = 1kΩ
3
1
0
-1
-2
-3
AV = -1
2
1
AV = -2
0
-1
-2
AV = -10
-3
AV = 10, RF = 383Ω
AV = -5
-4
-4
-5
-5
10
FREQUENCY (MHz)
100
2
200
90
AV = -1, RF = 750Ω
45
AV = +10, RF = 383Ω
-100
0
-225
-45
-270
-90
AV = -10, RF = 750Ω
-315
-135
VOUT = 0.2VP-P
CL = 10pF
2
-180
10
100
140
VOUT = 0.2VP-P
CL = 10pF
AV = +1
130
120
5
GAIN PEAKING
200
500
700
FREQUENCY (MHz)
100
0
1500
130
95
-3dB BANDWIDTH
90
10
5
GAIN PEAKING
500
650
800
950
0
1100
FEEDBACK RESISTOR (Ω)
FIGURE 15. BANDWIDTH AND GAIN PEAKING vs FEEDBACK
RESISTANCE
10
-3dB BANDWIDTH (MHz)
VOUT = 0.2VP-P
CL = 10pF
AV = +2
GAIN PEAKING (dB)
-3dB BANDWIDTH (MHz)
900
1100
1300
FEEDBACK RESISTOR (Ω)
FIGURE 14. BANDWIDTH AND GAIN PEAKING vs FEEDBACK
RESISTANCE
FIGURE 13. PHASE RESPONSE AS A FUNCTION OF
FREQUENCY
350
10
-3dB BANDWIDTH
120
-3dB BANDWIDTH
110
6
100
4
90
GAIN PEAKING
VOUT = 0.2VP-P
CL = 10pF
AV = +1
80
0
200
400
600
800
2
0
1000
LOAD RESISTOR (Ω)
FIGURE 16. BANDWIDTH AND GAIN PEAKING vs LOAD
RESISTANCE
GAIN PEAKING (dB)
-360
-3dB BANDWIDTH (MHz)
180
135
-45
-135
200
FIGURE 12. INVERTING FREQUENCY RESPONSE
INVERTING PHASE (DEGREES)
AV = +1, RF = 1kΩ
-90
100
FREQUENCY (MHz)
FIGURE 11. NON-INVERTING FREQUENCY RESPONSE
0
10
GAIN PEAKING (dB)
2
NONINVERTING PHASE (DEGREES)
VOUT = 0.2VP-P
CL = 10pF
RF = 750Ω
4
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
4
HA5022
Typical Performance Curves
VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified (Continued)
16
80
VOUT = 0.1VP-P
CL = 10pF
VSUPPLY = ±5V, AV = +2
60
12
OVERSHOOT (%)
-3dB BANDWIDTH (MHz)
VOUT = 0.2VP-P
CL = 10pF
AV = +10
40
VSUPPLY = ±15V, AV = +2
6
20
VSUPPLY = ±5V, AV = +1
VSUPPLY = ±15V, AV = +1
0
0
200
350
500
650
800
950
0
200
400
FEEDBACK RESISTOR (Ω)
800
1000
FIGURE 18. SMALL SIGNAL OVERSHOOT vs LOAD
RESISTANCE
FIGURE 17. BANDWIDTH vs FEEDBACK RESISTANCE
0.08
0.10
FREQUENCY = 3.58MHz
0.08
DIFFERENTIAL PHASE (DEGREES)
FREQUENCY = 3.58MHz
DIFFERENTIAL GAIN (%)
600
LOAD RESISTANCE (Ω)
RL = 75Ω
0.06
RL = 150Ω
0.04
0.02
RL = 1kΩ
0.06
0.04
RL = 150Ω
RL = 75Ω
0.02
RL = 1kΩ
0.00
0.00
3
5
7
9
11
SUPPLY VOLTAGE (±V)
13
3
15
5
7
9
11
SUPPLY VOLTAGE (±V)
13
15
FIGURE 20. DIFFERENTIAL PHASE vs SUPPLY VOLTAGE
FIGURE 19. DIFFERENTIAL GAIN vs SUPPLY VOLTAGE
-40
VOUT = 2.0VP-P
CL = 30pF
0
-10
REJECTION RATIO (dB)
DISTORTION (dBc)
-50
HD2
-60
3RD ORDER IMD
-70
AV = +1
HD2
HD3
-80
-20
-30
-40
CMRR
-50
-60
NEGATIVE PSRR
-70
-80
POSITIVE PSRR
HD3
-90
0.3
1
FREQUENCY (MHz)
FIGURE 21. DISTORTION vs FREQUENCY
11
10
0.001
0.01
0.1
FREQUENCY (MHz)
1
10
FIGURE 22. REJECTION RATIOS vs FREQUENCY
30
HA5022
Typical Performance Curves
VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified (Continued)
12
RL = 100Ω
VOUT = 1.0VP-P
AV = +1
RLOAD = 100Ω
VOUT = 1.0VP-P
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
8.0
7.5
7.0
6.5
10
AV = +10, RF = 383Ω
8
AV = +2, RF = 681Ω
6
AV = +1, RF =1kΩ
4
6.0
-50
-25
0
25
50
75
TEMPERATURE (oC)
100
125
FIGURE 23. PROPAGATION DELAY vs TEMPERATURE
3
5
7
9
11
SUPPLY VOLTAGE (±V)
13
15
FIGURE 24. PROPAGATION DELAY vs SUPPLY VOLTAGE
0.8
500
VOUT = 2VP-P
VOUT = 0.2VP-P
CL = 10pF
0.6
450
SLEW RATE (V/µs)
NORMALIZED GAIN (dB)
0.4
+ SLEW RATE
400
350
- SLEW RATE
300
250
200
0.2
AV= +2, RF = 681Ω
0
-0.2
-0.4
AV= +5, RF = 1kΩ
-0.6
AV = +1, RF = 1kΩ
-0.8
150
-1.0
100
-1.2
-50
-25
0
25
50
75
TEMPERATURE (oC)
100
FIGURE 25. SLEW RATE vs TEMPERATURE
12
125
AV = +10, RF = 383Ω
5
10
15
20
FREQUENCY (MHz)
25
FIGURE 26. NON-INVERTING GAIN FLATNESS vs
FREQUENCY
30
HA5022
Typical Performance Curves
VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified (Continued)
0.8
100
VOUT = 0.2VP-P
CL = 10pF
RF = 750Ω
0.2
AV = -1
0
-0.2
-0.4
-0.6
AV = -5
-0.8
-1.0
600
60
+INPUT NOISE CURRENT
400
40
INPUT NOISE VOLTAGE
200
20
AV = -10
10
15
20
25
0
0.01
30
0.1
FREQUENCY (MHz)
1
FIGURE 28. INPUT NOISE CHARACTERISTICS
1.5
BIAS CURRENT (µA)
2
VIO (mV)
1.0
0.5
-40
-20
0
20
40
60
80
100
120
0
-2
-4
-60
140
-40
-20
0
40
60
80
100
120
140
FIGURE 30. +INPUT BIAS CURRENT vs TEMPERATURE
FIGURE 29. INPUT OFFSET VOLTAGE vs TEMPERATURE
4000
TRANSIMPEDANCE (kΩ)
22
BIAS CURRENT (µA)
20
TEMPERATURE (oC)
TEMPERATURE (oC)
20
18
16
-60
0
100
10
FREQUENCY (kHz)
FIGURE 27. INVERTING GAIN FLATNESS vs FREQUENCY
0.0
-60
800
AV = -2
-1.2
5
-INPUT NOISE CURRENT
80
CURRENT NOISE (pA/√Hz)
NORMALIZED GAIN (dB)
0.4
1000
AV = +10, RF = 383Ω
VOLTAGE NOISE (nV/√Hz)
0.6
-40
-20
0
20
40
60
80
100
120
140
TEMPERATURE (oC)
FIGURE 31. -INPUT BIAS CURRENT vs TEMPERATURE
13
3000
2000
1000
-60
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (oC)
FIGURE 32. TRANSIMPEDANCE vs TEMPERATURE
140
HA5022
Typical Performance Curves
VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified (Continued)
74
25
REJECTION RATIO (dB)
ICC (mA)
20
55oC
15
10
3
4
5
6
70
68
-PSRR
66
64
62
CMRR
60
25oC
5
+PSRR
72
125oC
7
8
9
10
11
12
13
14
58
-100
15
-50
0
100
200
150
250
FIGURE 34. REJECTION RATIO vs TEMPERATURE
FIGURE 33. SUPPLY CURRENT vs SUPPLY VOLTAGE
40
4.0
30
+10V
+5V
+15V
OUTPUT SWING (V)
SUPPLY CURRENT (mA)
50
TEMPERATURE (oC)
SUPPLY VOLTAGE (±V)
20
10
3.8
3.6
0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
-60
-40
-20
0
20
40
60
80
100
120
140
TEMPERATURE (oC)
DISABLE INPUT VOLTAGE (V)
FIGURE 35. SUPPLY CURRENT vs DISABLE INPUT VOLTAGE
FIGURE 36. OUTPUT SWING vs TEMPERATURE
30
1.2
VS = ±15V
1.1
VIO (mV)
VOUT (VP-P)
20
VS = ±10V
1.0
10
0.9
VS = ±4.5V
0
0.01
0.8
0.10
1.00
LOAD RESISTANCE (kΩ)
FIGURE 37. OUTPUT SWING vs LOAD RESISTANCE
14
10.00
-60
-40
-20
0
20
40
60
80
100
120
140
TEMPERATURE (oC)
FIGURE 38. INPUT OFFSET VOLTAGE CHANGE BETWEEN
CHANNELS vs TEMPERATURE
HA5022
Typical Performance Curves
VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified (Continued)
30
1.5
-55oC
1.0
ICC (mA)
∆BIAS CURRENT (µA)
25
20
25oC
15
0.5
10
125oC
5
0.0
-40
-20
0
20
40
60
80
100
120
3
140
4
5
6
7
TEMPERATURE (oC)
FIGURE 39. INPUT BIAS CURRENT CHANGE BETWEEN
CHANNELS vs TEMPERATURE
9
10
12
13
32
AV = +1
VOUT = 2VP-P
ENABLE TIME (ns)
-50
-60
16
26
14
ENABLE
24
12
22
10
20
8
18
6
DISABLE
16
-70
4
14
10
FIGURE 41. CHANNEL SEPARATION vs FREQUENCY
15
15
18
ENABLE
28
1
FREQUENCY (MHz)
14
20
30
-40
-80
0.1
11
FIGURE 40. DISABLE SUPPLY CURRENT vs SUPPLY
VOLTAGE
-30
SEPARATION (dB)
8
SUPPLY VOLTAGE (±V)
30
DISABLE TIME (µs)
-60
2
DISABLE
12
-2.5 -2.0 -1.5 -1.0
-0.5
0
0.5
1.0
1.5
2.0
0
2.5
OUTPUT VOLTAGE (V)
FIGURE 42. ENABLE/DISABLE TIME vs OUTPUT VOLTAGE
HA5022
-20
-30
-40
-50
10
RL = 100Ω
1
0.1
0.01
180
0.001
135
90
45
-60
0
-70
-45
-80
-90
0.1
1
FREQUENCY (MHz)
10
20
TRANSIMPEDANCE (MΩ)
FIGURE 43. DISABLE FEEDTHROUGH vs FREQUENCY
0.001
0.01
0.1
1
FREQUENCY (MHz)
10
-135
100
FIGURE 44. TRANSIMPEDANCE vs FREQUENCY
10
RL = 400Ω
1
0.1
0.01
180
0.001
135
90
45
0
-45
-90
-135
0.001
0.01
0.1
1
FREQUENCY (MHz)
10
PHASE ANGLE (DEGREES)
FEEDTHROUGH (dB)
-10
DISABLE = 0V
VIN = 5VP-P
RF = 750Ω
PHASE ANGLE (DEGREES)
0
VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified (Continued)
TRANSIMPEDANCE (MΩ)
Typical Performance Curves
100
FIGURE 45. TRANSIMPEDENCE vs FREQUENCY
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
16
HA5022
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
1650µm x 2540µm x 483µm
Type: Nitride
Thickness: 4kÅ ±0.4kÅ
METALLIZATION:
TRANSISTOR COUNT:
Type: Metal 1: AlCu (1%)
Thickness: Metal 1: 8kÅ ±0.4kÅ
Type: Metal 2: AlCu (1%)
Thickness: Metal 2: 16kÅ ±0.8kÅ
124
PROCESS:
High Frequency Bipolar Dielectric Isolation
SUBSTRATE POTENTIAL (POWERED UP):
V-
Metallization Mask Layout
HA5022
-IN1
OUT1
V+
+IN1
DIS1
VNC
DIS2
+IN2
-IN2
17
OUT2
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