DATASHEET

HA5025
®
D UC T
E PRO PRODUCT
T
E
L
O
OBS
ITUTE 5
SUBST FAData
140 Sheet
E
L
IB
POSS HA-5104, H
May 2003
Quad, 125MHz Video
Current Feedback Amplifier
FN3591.6
Features
• Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . . . 125MHz
The HA5025 is a wide bandwidth high slew rate quad
amplifier optimized for video applications and gains between
1 and 10. It is a current feedback amplifier and thus yields
less bandwidth degradation at high closed loop gains than
voltage feedback amplifiers.
The low differential gain and phase, 0.1dB gain flatness, and
ability to drive two back terminated 75Ω cables, make this
amplifier ideal for demanding video applications.
• Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475V/µs
• Input Offset Voltage . . . . . . . . . . . . . . . . . . . . . . . . 800µV
• Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03%
• Differential Phase. . . . . . . . . . . . . . . . . . . . . 0.03 Degrees
• Supply Current (per Amplifier) . . . . . . . . . . . . . . . . 7.5mA
• ESD Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . 4000V
The current feedback design allows the user to take
advantage of the amplifier’s bandwidth dependency on the
feedback resistor.
• Guaranteed Specifications at ±5V Supplies
The performance of the HA5025 is very similar to the
popular Intersil HA-5020.
• Video Gain Block
Pinout
• Flash A/D Driver
HA5025 (PDIP, SOIC)
TOP VIEW
OUT1 1
-IN1 2
+IN1 3
+
+
+IN2 5
+
-
+
-
-IN2 6
• Video Distribution Amplifier/RGB Amplifier
• Current to Voltage Converter
• Medical Imaging
14 OUT4
• Radar and Imaging Systems
13 -IN4
• Video Switching and Routing
12 +IN4
11 V-
V+ 4
Applications
10 +IN3
9 -IN3
Part Number Information
PART NUMBER
TEMP.
RANGE (oC)
PACKAGE
PKG.
DWG.#
HA5025IP
-40 to 85
14 Ld PDIP
E14.3
HA5025IB
-40 to 85
14 Ld SOIC
M14.15
8 OUT3
OUT2 7
HA5025EVAL
1
High Speed Op Amp DIP Evaluation Board
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HA5025
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . 36V
DC Input Voltage (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . ±VSUPPLY
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10V
Output Current (Note 4) . . . . . . . . . . . . . . . . . Short Circuit Protected
ESD Rating (Note 3)
Human Body Model (Per MIL-STD-883 Method 3015.7) . . 2000V
Thermal Resistance (Typical, Note 2)
Operating Conditions
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
120
Maximum Junction Temperature (Note 1) . . . . . . . . . . . . . . . . 175οC
Maximum Junction Temperature (Plastic Package, Note 1) . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Supply Voltage Range (Typical) . . . . . . . . . . . . . . . . ±4.5V to ±15V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation, including output load, must be designed to maintain junction temperature below 175oC for die, and below 150oC
for plastic packages. See Application Information section for safe operating area information.
2. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
3. The non-inverting input of unused amplifiers must be connected to GND.
4. Output is protected for short circuits to ground. Brief short circuits to ground will not degrade reliability, however, continuous (100% duty cycle)
output current should not exceed 15mA for maximum reliability.
VSUPPLY = ±5V, RF = 1kΩ, AV = +1, RL = 400Ω, CL ≤ 10pF,
Unless Otherwise Specified
Electrical Specifications
PARAMETER
TEST CONDITIONS
(NOTE 9)
TEST
LEVEL
TEMP.
(oC)
MIN
TYP
MAX
UNITS
A
25
-
0.8
3
mV
A
Full
-
-
5
mV
INPUT CHARACTERISTICS
Input Offset Voltage (VIO)
Delta VIO Between Channels
A
Full
-
1.2
3.5
mV
Average Input Offset Voltage Drift
B
Full
-
5
-
µV/oC
A
25
53
-
-
dB
A
Full
50
-
-
dB
A
25
60
-
-
dB
A
Full
55
-
-
dB
A
Full
±2.5
-
-
V
A
25
-
3
8
µA
A
Full
-
-
20
µA
A
25
-
-
0.15
µA/V
A
Full
-
-
0.5
µA/V
A
25
-
-
0.1
µA/V
VIO Common Mode Rejection Ratio
Note 5
VIO Power Supply Rejection Ratio
±3.5V ≤ VS ≤ ±6.5V
Input Common Mode Range
Note 5
Non-Inverting Input (+IN) Current
+IN Common Mode Rejection
(+IBCMR = 1 )
+RIN
Note 5
+IN Power Supply Rejection
±3.5V ≤ VS ≤ ±6.5V
Inverting Input (-IN) Current
Delta - IN BIAS Current Between Channels
-IN Common Mode Rejection
Note 5
±3.5V ≤ VS ≤ ±6.5V
-IN Power Supply Rejection
2
A
Full
-
-
0.3
µA/V
A
25, 85
-
4
12
µA
A
-40
-
10
30
µA
A
25, 85
-
6
15
µA
A
-40
-
10
30
µA
A
25
-
-
0.4
µA/V
A
Full
-
-
1.0
µA/V
A
25
-
-
0.2
µA/V
A
Full
-
-
0.5
µA/V
HA5025
VSUPPLY = ±5V, RF = 1kΩ, AV = +1, RL = 400Ω, CL ≤ 10pF,
Unless Otherwise Specified (Continued)
Electrical Specifications
(NOTE 9)
TEST
LEVEL
TEMP.
(oC)
MIN
TYP
MAX
UNITS
Input Noise Voltage
f = 1kHz
B
25
-
4.5
-
nV/√Hz
+Input Noise Current
f = 1kHz
B
25
-
2.5
-
pA/√Hz
-Input Noise Current
f = 1kHz
B
25
-
25.0
-
pA/√Hz
Note 11
A
25
1.0
-
-
MΩ
A
Full
0.85
-
-
MΩ
70
-
-
dB
PARAMETER
TEST CONDITIONS
TRANSFER CHARACTERISTICS
Transimpedance
Open Loop DC Voltage Gain
RL = 400Ω, VOUT = ±2.5V
A
25
A
Full
65
-
-
dB
Open Loop DC Voltage Gain
RL = 100Ω, VOUT = ±2.5V
A
25
50
-
-
dB
A
Full
45
-
-
dB
25
±2.5
±3.0
-
V
OUTPUT CHARACTERISTICS
Output Voltage Swing
RL = 150Ω
A
A
Full
±2.5
±3.0
-
V
Output Current
RL = 150Ω
B
Full
±16.6
±20.0
-
mA
Output Current, Short Circuit
VIN = ±2.5V, VOUT = 0V
A
Full
±40
±60
-
mA
Supply Voltage Range
A
25
5
-
15
V
Quiescent Supply Current
A
Full
-
7.5
10
mA/Op Amp
Note 6
B
25
275
350
-
V/µs
Full Power Bandwidth
Note 7
B
25
22
28
-
MHz
Rise Time
Note 8
B
25
-
6
-
ns
Fall Time
Note 8
B
25
-
6
-
ns
Propagation Delay
Note 8
POWER SUPPLY CHARACTERISTICS
AC CHARACTERISTICS (AV = +1)
Slew Rate
Overshoot
B
25
-
6
-
ns
B
25
-
4.5
-
%
-3dB Bandwidth
VOUT = 100mV
B
25
-
125
-
MHz
Settling Time to 1%
2V Output Step
B
25
-
50
-
ns
Settling Time to 0.25%
2V Output Step
B
25
-
75
-
ns
Slew Rate
Note 6
B
25
-
475
-
V/µs
Full Power Bandwidth
Note 7
B
25
-
26
-
MHz
Rise Time
Note 8
B
25
-
6
-
ns
Fall Time
Note 8
B
25
-
6
-
ns
Propagation Delay
Note 8
AC CHARACTERISTICS (AV = +2, RF = 681Ω)
Overshoot
-3dB Bandwidth
VOUT = 100mV
B
25
-
6
-
ns
B
25
-
12
-
%
B
25
-
95
-
MHz
Settling Time to 1%
2V Output Step
B
25
-
50
-
ns
Settling Time to 0.25%
2V Output Step
B
25
-
100
-
ns
Gain Flatness
5MHz
B
25
-
0.02
-
dB
20MHz
B
25
-
0.07
-
dB
3
HA5025
VSUPPLY = ±5V, RF = 1kΩ, AV = +1, RL = 400Ω, CL ≤ 10pF,
Unless Otherwise Specified (Continued)
Electrical Specifications
PARAMETER
(NOTE 9)
TEST
LEVEL
TEST CONDITIONS
TEMP.
(oC)
MIN
TYP
MAX
UNITS
AC CHARACTERISTICS (AV = +10, RF = 383Ω)
Slew Rate
Note 6
B
25
350
475
-
V/µs
Full Power Bandwidth
Note 7
B
25
28
38
-
MHz
Rise Time
Note 8
B
25
-
8
-
ns
Fall Time
Note 8
B
25
-
9
-
ns
Propagation Delay
Note 8
B
25
-
9
-
ns
B
25
-
1.8
-
%
Overshoot
-3dB Bandwidth
VOUT = 100mV
B
25
-
65
-
MHz
Settling Time to 1%
2V Output Step
B
25
-
75
-
ns
Settling Time to 0.1%
2V Output Step
B
25
-
130
-
ns
Differential Gain (Note 10)
RL = 150Ω
B
25
-
0.03
-
%
Differential Phase (Note 10)
RL = 150Ω
B
25
-
0.03
-
Degrees
VIDEO CHARACTERISTICS
NOTES:
5. VCM = ±2.5V. At -40oC Product is tested at VCM = ±2.25V because Short Test Duration does not allow self heating.
6. VOUT switches from -2V to +2V, or from +2V to -2V. Specification is from the 25% to 75% points.
Slew Rate
7. FPBW = ----------------------------- ; V
= 2V .
2πV PEAK PEAK
8. RL = 100Ω, VOUT = 1V. Measured from 10% to 90% points for rise/fall times; from 50% points of input and output for propagation delay.
9. A. Production Tested; B. Typical or Guaranteed Limit based on characterization; C. Design Typical for information only.
10. Measured with a VM700A video tester using an NTC-7 composite VITS.
11. VOUT = ±2.5V. At -40oC Product is tested at VOUT = ±2.25V because Short Test Duration does not allow self heating.
Test Circuits and Waveforms
+
DUT
50Ω
HP4195
NETWORK
ANALYZER
50Ω
FIGURE 1. TEST CIRCUIT FOR TRANSIMPEDANCE MEASUREMENTS
(NOTE 12)
100Ω
(NOTE 12)
100Ω
VIN
+
VIN
DUT
VOUT
-
50Ω
RL
100Ω
+
DUT
VOUT
-
50Ω
RI
681Ω
RF , 681Ω
RL
400Ω
RF , 1kΩ
FIGURE 2. SMALL SIGNAL PULSE RESPONSE CIRCUIT
4
FIGURE 3. LARGE SIGNAL PULSE RESPONSE CIRCUIT
HA5025
Test Circuits and Waveforms
(Continued)
NOTE:
12. A series input resistor of ≥100Ω is recommended to limit input currents in case input signals are present before the HA5025 is powered up.
Vertical Scale: VIN = 100mV/Div., VOUT =
100mV/Div.
Vertical Scale: VIN = 1V/Div., VOUT = 1V/Div.
Horizontal Scale: 50ns/Div.
FIGURE 4. SMALL SIGNAL RESPONSE
Schematic Diagram
FIGURE 5. LARGE SIGNAL RESPONSE
(One Amplifier of Four)
V+
R2
800
R10
820
R5
2.5K
QP8
R19
400
R15
400
QP9
QP14
QP11
QP1
QP5
R11
1K
R17
280
QN5
QP19
R31
5
R18
280
QP10
R29
9.5
R27
200
R24
140
QP16
R20
140
QP20
QN12
QN8
R1
60K
QP2
QP6
QN6
QN1
R28
20
-IN
QP17
R12
280
QP4
R3
6K
QP15
C1
1.4pF
QP12
QN13
+IN
QN17
R25
20
C2
1.4pF
QP13
R21
140
QN2
QN15
QN10
D1
QP7
QN4
QN3
R13
1K
QN7
R4
800
R33
800
R9
820 QN9
V-
5
QN21
R14
280
R22
280
QN18
QN14
QN16
R16
400
QN11
R25
140
R23
400
R26
200
R32
5
QN19
R30
7
OUT
HA5025
Application Information
-IN, and that connections to -IN be kept as short as possible to
minimize the capacitance from this node to ground.
Optimum Feedback Resistor
The plots of inverting and non-inverting frequency response,
see Figure 8 and Figure 9 in the typical performance section,
illustrate the performance of the HA5025 in various closed
loop gain configurations. Although the bandwidth dependency
on closed loop gain isn’t as severe as that of a voltage
feedback amplifier, there can be an appreciable decrease in
bandwidth at higher gains. This decrease may be minimized
by taking advantage of the current feedback amplifier’s unique
relationship between bandwidth and RF . All current feedback
amplifiers require a feedback resistor, even for unity gain
applications, and RF , in conjunction with the internal
compensation capacitor, sets the dominant pole of the
frequency response. Thus, the amplifier’s bandwidth is
inversely proportional to RF . The HA5025 design is optimized
for a 1000Ω RF at a gain of +1. Decreasing RF in a unity gain
application decreases stability, resulting in excessive peaking
and overshoot. At higher gains the amplifier is more stable, so
RF can be decreased in a trade-off of stability for bandwidth.
The following table lists recommended RF values for various
gains, and the expected bandwidth.
GAIN
(ACL)
RF (Ω)
BANDWIDTH
(MHz)
-1
750
100
+1
1000
125
+2
681
95
+5
1000
52
+10
383
65
-10
750
22
Driving Capacitive Loads
Capacitive loads will degrade the amplifier’s phase margin
resulting in frequency response peaking and possible
oscillations. In most cases the oscillation can be avoided by
placing an isolation resistor (R) in series with the output as
shown in Figure 6.
100Ω
VIN
R
+
VOUT
CL
RT
RF
RI
FIGURE 6. PLACEMENT OF THE OUTPUT ISOLATION
RESISTOR, R
The selection criteria for the isolation resistor is highly
dependent on the load, but 27Ω has been determined to be
a good starting value.
Power Dissipation Considerations
Due to the high supply current inherent in quad amplifiers,
care must be taken to insure that the maximum junction
temperature (TJ , see Absolute Maximum Ratings) is not
exceeded. Figure 7 shows the maximum ambient
temperature versus supply voltage for the available package
styles (PDIP, SOIC). At VS = ±5V quiescent operation both
package styles may be operated over the full industrial range
of -40oC to 85oC. It is recommended that thermal
calculations, which take into account output power, be
performed by the designer.
PC Board Layout
Attention must be given to decoupling the power supplies. A
large value (10µF) tantalum or electrolytic capacitor in
parallel with a small value (0.1µF) chip capacitor works well
in most cases.
A ground plane is strongly recommended to control noise.
Care must also be taken to minimize the capacitance to
ground seen by the amplifier’s inverting input (-IN). The larger
this capacitance, the worse the gain peaking, resulting in
pulse overshoot and possible instability. It is recommended
that the ground plane be removed under traces connected to
6
MAX AMBIENT TEMPERATURE (oC)
130
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip resistors
and chip capacitors is strongly recommended. If leaded
components are used the leads must be kept short
especially for the power supply decoupling components and
those components connected to the inverting input.
120
110
100
PDIP
90
80
70
SOIC
60
50
40
30
20
10
5
7
9
11
13
15
SUPPLY VOLTAGE (±V)
FIGURE 7. MAXIMUM OPERATING AMBIENT TEMPERATURE
vs SUPPLY VOLTAGE
HA5025
Typical Performance Curves
VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified
5
5
VOUT = 0.2VP-P
CL = 10pF
3
AV = 2, RF = 681Ω
2
AV = 5, RF = 1kΩ
1
0
-1
-2
3
AV = -1
2
1
AV = -2
0
-1
-2
AV = -10
-3
AV = 10, RF = 383Ω
-3
VOUT = 0.2VP-P
CL = 10pF
RF = 750Ω
4
NORMALIZED GAIN (dB)
AV = -5
-4
-4
-5
-5
10
100
200
2
10
135
-45
90
AV = -1, RF = 750Ω
-135
45
AV = +10, RF = 383Ω
-100
0
-225
-45
-270
-90
AV = -10, RF = 750Ω
-135
-315
VOUT = 0.2VP-P
CL = 10pF
-360
2
-3dB BANDWIDTH (MHz)
180
AV = +1, RF = 1kΩ
-90
140
VOUT = 0.2VP-P
CL = 10pF
AV = +1
130
120
100
5
GAIN PEAKING
500
200
700
FREQUENCY (MHz)
0
1500
130
VOUT = 0.2VP-P
CL = 10pF
AV = +2
95
-3dB BANDWIDTH
90
10
5
GAIN PEAKING
500
650
800
950
FEEDBACK RESISTOR (Ω)
0
1100
FIGURE 12. BANDWIDTH AND GAIN PEAKING vs FEEDBACK
RESISTANCE
7
-3dB BANDWIDTH (MHz)
100
GAIN PEAKING (dB)
-3dB BANDWIDTH (MHz)
900
1100
1300
FEEDBACK RESISTOR (Ω)
FIGURE 11. BANDWIDTH AND GAIN PEAKING vs FEEDBACK
RESISTANCE
FIGURE 10. PHASE RESPONSE AS A FUNCTION OF
FREQUENCY
350
10
-3dB BANDWIDTH
-180
10
200
FIGURE 9. INVERTING FREQUENCY RESPONSE
INVERTING PHASE (DEGREES)
NONINVERTING PHASE (DEGREES)
FIGURE 8. NON-INVERTING FREQUENCY RESPONSE
0
100
FREQUENCY (MHz)
FREQUENCY (MHz)
GAIN PEAKING (dB)
2
120
-3dB BANDWIDTH
110
6
100
4
90
GAIN PEAKING
80
0
200
400
600
VOUT = 0.2VP-P 2
CL = 10pF
AV = +1
0
800
1000
LOAD RESISTOR (Ω)
FIGURE 13. BANDWIDTH AND GAIN PEAKING vs LOAD
RESISTANCE
GAIN PEAKING (dB)
NORMALIZED GAIN (dB)
4
AV = +1, RF = 1kΩ
HA5025
Typical Performance Curves
VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified (Continued)
16
80
VOUT = 0.1VP-P
CL = 10pF
VSUPPLY = ±5V, AV = +2
60
12
OVERSHOOT (%)
-3dB BANDWIDTH (MHz)
VOUT = 0.2VP-P
CL = 10pF
AV = +10
40
VSUPPLY = ±15V, AV = +2
6
20
VSUPPLY = ±5V, AV = +1
VSUPPLY = ±15V, AV = +1
0
0
200
350
500
650
FEEDBACK RESISTOR (Ω)
800
0
950
FIGURE 14. BANDWIDTH vs FEEDBACK RESISTANCE
200
1000
0.08
FREQUENCY = 3.58MHz
0.08
DIFFERENTIAL PHASE (DEGREES)
FREQUENCY = 3.58MHz
RL = 75Ω
0.06
RL = 150Ω
0.04
0.02
RL = 1kΩ
0.06
0.04
RL = 150Ω
RL = 75Ω
0.02
RL = 1kΩ
0.00
0.00
3
5
7
9
11
13
15
3
5
-40
VOUT = 2.0VP-P
CL = 30pF
REJECTION RATIO (dB)
HD2
-60
3RD ORDER IMD
HD2
HD3
13
15
-10
-20
-30
-40
CMRR
-50
-60
NEGATIVE PSRR
-70
-80
-80
POSITIVE PSRR
HD3
1
10
FREQUENCY (MHz)
FIGURE 18. DISTORTION vs FREQUENCY
8
11
AV = +1
0
-50
-90
0.3
9
FIGURE 17. DIFFERENTIAL PHASE vs SUPPLY VOLTAGE
FIGURE 16. DIFFERENTIAL GAIN vs SUPPLY VOLTAGE
-70
7
SUPPLY VOLTAGE (±V)
SUPPLY VOLTAGE (±V)
DISTORTION (dBc)
800
FIGURE 15. SMALL SIGNAL OVERSHOOT vs LOAD RESISTANCE
0.10
DIFFERENTIAL GAIN (%)
400
600
LOAD RESISTANCE (Ω)
0.001
0.01
0.1
1
10
FREQUENCY (MHz)
FIGURE 19. REJECTION RATIOS vs FREQUENCY
30
HA5025
Typical Performance Curves
VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified (Continued)
12
RL = 100Ω
VOUT = 1.0VP-P
AV = +1
RLOAD = 100Ω
VOUT = 1.0VP-P
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
8.0
7.5
7.0
6.5
AV = +10, RF = 383Ω
8
AV = +2, RF = 681Ω
6
AV = +1, RF = 1kΩ
4
6.0
-50
-25
0
25
50
75
TEMPERATURE (oC)
100
3
125
FIGURE 20. PROPAGATION DELAY vs TEMPERATURE
7
9
11
SUPPLY VOLTAGE (±V)
13
15
0.8
VOUT = 2VP-P
VOUT = 0.2VP-P
CL = 10pF
0.6
450
0.4
NORMALIZED GAIN (dB)
+ SLEW RATE
400
5
FIGURE 21. PROPAGATION DELAY vs SUPPLY VOLTAGE
500
SLEW RATE (V/µs)
10
350
- SLEW RATE
300
250
200
0.2
AV= +2, RF = 681Ω
0
-0.2
-0.4
AV= +5, RF = 1kΩ
-0.6
AV = +1, RF = 1kΩ
-0.8
150
-1.0
100
-25
0
25
50
75
100
5
TEMPERATURE (oC)
FIGURE 22. SLEW RATE vs TEMPERATURE
10
15
20
FREQUENCY (MHz)
25
30
FIGURE 23. NON-INVERTING GAIN FLATNESS vs
FREQUENCY
0.8
100
VOUT = 0.2VP-P
CL = 10pF
RF = 750Ω
0.4
0.2
AV = -1
0
-0.2
-0.4
-0.6
AV = -5
-0.8
-1.0
-1.2
10
-INPUT NOISE CURRENT
80
800
600
60
+INPUT NOISE CURRENT
400
40
INPUT NOISE VOLTAGE
200
20
AV = -2
AV = -10
5
1000
AV = +10, RF = 383Ω
VOLTAGE NOISE (nV/√Hz)
0.6
NORMALIZED GAIN (dB)
AV = +10, RF = 383Ω
-1.2
125
15
20
25
30
FREQUENCY (MHz)
FIGURE 24. INVERTING GAIN FLATNESS vs FREQUENCY
9
0
0.01
0.1
1
FREQUENCY (kHz)
10
0
100
FIGURE 25. INPUT NOISE CHARACTERISTICS
CURRENT NOISE (pA/√Hz)
-50
HA5025
Typical Performance Curves
VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified (Continued)
1.5
BIAS CURRENT (µA)
2
VIO (mV)
1.0
0.5
0.0
-60
-40
-20
0
20
40
60
80
100
120
0
-2
-4
-60
140
-40
-20
0
TRANSIMPEDANCE (kΩ)
BIAS CURRENT (µA)
60
80
100
120
140
4000
22
20
18
16
-60
-40
-20
0
20
40
60
80
100
120
3000
2000
1000
140
-60
-40
-20
0
TEMPERATURE (oC)
20
40
60
80
100
120 140
TEMPERATURE (oC)
FIGURE 28. -INPUT BIAS CURRENT vs TEMPERATURE
FIGURE 29. TRANSIMPEDANCE vs TEMPERATURE
74
25
125oC
REJECTION RATIO (dB)
15
10
25oC
3
4
5
6
7
+PSRR
72
55oC
20
ICC (mA)
40
FIGURE 27. +INPUT BIAS CURRENT vs TEMPERATURE
FIGURE 26. INPUT OFFSET VOLTAGE vs TEMPERATURE
5
20
TEMPERATURE (oC)
TEMPERATURE (oC)
70
68
-PSRR
66
64
62
60
8
9
10
11
12
13
14
SUPPLY VOLTAGE (±V)
FIGURE 30. SUPPLY CURRENT vs SUPPLY VOLTAGE
10
15
58
-100
CMRR
-50
0
50
100
150
200
TEMPERATURE (oC)
FIGURE 31. REJECTION RATIO vs TEMPERATURE
250
HA5025
Typical Performance Curves
VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified (Continued)
4.0
30
+10V
+5V
+15V
OUTPUT SWING (V)
SUPPLY CURRENT (mA)
40
20
3.8
10
0
0
1
2
3
4
5
6
7
8
9
3.6
-60
10 11 12 13 14 15
-40
-20
0
20
40
60
80
100
120
140
TEMPERATURE (oC)
DISABLE INPUT VOLTAGE (V)
FIGURE 32. SUPPLY CURRENT vs DISABLE INPUT VOLTAGE
FIGURE 33. OUTPUT SWING vs TEMPERATURE
1.2
30
VS = ±15V
VIO (mV)
VOUT (VP-P)
1.1
20
VS = ±10V
1.0
10
0.9
VS = ±4.5V
0.8
0
0.01
0.10
1.00
-60
10.00
-40
-20
0
20
40
60
80
100
120
140
TEMPERATURE (oC)
LOAD RESISTANCE (kΩ)
FIGURE 35. INPUT OFFSET VOLTAGE CHANGE BETWEEN
CHANNELS vs TEMPERATURE
FIGURE 34. OUTPUT SWING vs LOAD RESISTANCE
-30
1.5
-40
1.0
SEPARATION (dB)
∆BIAS CURRENT (µA)
AV = +1
VOUT = 2VP-P
0.5
-50
-60
-70
0.0
-60
-40
-20
0
20
40
60
80
TEMPERATURE (oC)
100
120
FIGURE 36. INPUT BIAS CURRENT CHANGE BETWEEN
CHANNELS vs TEMPERATURE
11
140
-80
0.1
1
FREQUENCY (MHz)
10
FIGURE 37. CHANNEL SEPARATION vs FREQUENCY
30
HA5025
-20
-30
-40
-50
10
RL = 100Ω
1
0.1
0.01
180
0.001
135
90
45
-60
0
-70
-45
-80
-90
1
FREQUENCY (MHz)
10
FIGURE 38. DISABLE FEEDTHROUGH vs FREQUENCY
20
0.001
0.01
0.1
1
FREQUENCY (MHz)
10
RL = 400Ω
1
0.1
0.01
180
0.001
135
90
45
0
-45
-90
-135
0.001
0.01
0.1
1
10
FREQUENCY (MHz)
100
FIGURE 40. TRANSIMPEDANCE vs FREQUENCY
12
10
-135
100
FIGURE 39. TRANSIMPEDANCE vs FREQUENCY
PHASE ANGLE (DEGREES)
0.1
TRANSIMPEDANCE (MΩ)
FEEDTHROUGH (dB)
-10
DISABLE = 0V
VIN = 5VP-P
RF = 750Ω
PHASE ANGLE (DEGREES)
0
VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified (Continued)
TRANSIMPEDANCE (MΩ)
Typical Performance Curves
HA5025
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
2010µm x 3130µm x 483µm
Type: Nitride
Thickness: 4kÅ ±0.4kÅ
METALLIZATION:
TRANSISTOR COUNT:
Type: Metal 1: AlCu (1%)
Thickness: Metal 1: 8kÅ ±0.4kÅ
248
Metal 2: AlCu (1%)
Metal 2: 16kÅ ±0.8kÅ
PROCESS:
High Frequency Bipolar Dielectric Isolation
SUBSTRATE POTENTIAL (Powered Up):
V-
Metallization Mask Layout
-IN4
OUT4
OUT1
-IN1
HA5025
+IN1
+IN4
V+
V-
+IN2
13
-IN3
OUT3
OUT2
-IN2
+IN3
HA5025
Dual-In-Line Plastic Packages (PDIP)
E14.3 (JEDEC MS-001-AA ISSUE D)
N
14 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
1 2 3
INCHES
N/2
-B-
-AD
E
BASE
PLANE
-C-
A2
SEATING
PLANE
A
L
D1
e
B1
D1
A1
eC
B
0.010 (0.25) M
C A B S
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
C
L
B1
0.045
0.070
1.15
1.77
8
eA
C
0.008
0.014
C
D
0.735
0.775
18.66
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English
and Metric dimensions, the inch dimensions control.
0.005
-
0.13
-
5
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
eA
0.300 BSC
eB
-
L
0.115
4. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS-3.
N
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 1.14mm).
14
5
E
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater.
0.355
19.68
D1
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
0.204
14
2.54 BSC
7.62 BSC
0.430
-
0.150
2.93
14
6
10.92
7
3.81
4
9
Rev. 0 12/93
HA5025
Small Outline Plastic Packages (SOIC)
M14.15 (JEDEC MS-012-AB ISSUE C)
N
INDEX
AREA
0.25(0.010) M
H
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
B M
E
INCHES
-B-
1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
µα
e
A1
B
0.25(0.010) M
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.3367
0.3444
8.55
8.75
3
E
0.1497
0.1574
3.80
4.00
4
e
C
0.10(0.004)
B S
0.050 BSC
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
N
NOTES:
MILLIMETERS
α
14
0o
14
8o
0o
7
8o
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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15
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