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Dual, 420MHz, Low Power, Video, Current
Feedback Operational Amplifier with
Disable
The HFA1245 is a dual, high speed, low power current
feedback amplifier built with Intersil’s proprietary
complementary bipolar UHF-1 process.
The HFA1245 features individual TTL/CMOS compatible
disable controls. When pulled low they disable the
corresponding amplifier, which reduces the supply current
and forces the output into a high impedance state. This
feature allows easy implementation of simple, low power
video switching and routing systems. Component and
composite video systems also benefit from this op amp’s
excellent gain flatness, and good differential gain and phase
specifications.
Multiplexed A/D applications will also find the HFA1245
useful as the A/D driver/multiplexer.
HFA1245
July 2004
Features
• Low Supply Current . . . . . . . . . . . . . . . . . 5.8mA/Op Amp
• High Input Impedance . . . . . . . . . . . . . . . . . . . . . . . 2MΩ
• Low Crosstalk (5MHz) . . . . . . . . . . . . . . . . . . . . . . . -83dB
• High Off Isolation (5MHz). . . . . . . . . . . . . . . . . . . . . 65dB
• Wide -3dB Bandwidth (AV = +2) . . . . . . . . . . . . . 420MHz
• Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . . 1200V/μs
• Gain Flatness (to 50MHz) . . . . . . . . . . . . . . . . . . ±0.11dB
• Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.02%
• Differential Phase. . . . . . . . . . . . . . . . . . . . . 0.03 Degrees
• Individual Output Enable/Disable
• Output Enable/Disable Time . . . . . . . . . . . . . 150ns/30ns
• Pin Compatible Upgrade to HA5022
The HFA1245 is a low power, high performance upgrade for
the popular Intersil HA5022. For a dual amplifier without
disable, in a standard 8 lead pinout, please see the HFA1205
data sheet.
Applications
Part # Information
• Video Multiplexers
PART NUMBER
HFA1245IP
HA5022EVAL
TEMP.
RANGE (oC)
-40 to 85
PACKAGE
14 Ld PDIP
PKG.
NO.
E14.3
High Speed Op Amp DIP Evaluation Board
FN3682.5
• Flash A/D Drivers
• High Resolution Monitors
• Video Switching and Routing
• Professional Video Processing
• Video Digitizing Boards/Systems
• Multimedia Systems
• RGB Preamps
Pinout
• Medical Imaging
HFA1245
(PDIP)
TOP VIEW
• Hand Held and Miniaturized RF Equipment
• Battery Powered Communications
• High Speed Oscilloscopes and Analyzers
-IN1 1
+IN1 2
14 OUT1
+
13 NC
DISABLE 1 3
12 GND
V- 4
11 V+
DISABLE 2 5
10 NC
+IN2 6
-IN2 7
9 NC
+
-
8 OUT2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright © Intersil Corporation 1999, 2004
HFA1245
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V
Output Current (Note 2) . . . . . . . . . . . . . . . . Short Circuit Protected
30mA Continuous
60mA ≤ 50% Duty Cycle
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . . 600V
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100
Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
2. Output is short circuit protected to ground. Brief short circuits to ground will not degrade reliability, however continuous (100% duty cycle) output
current must not exceed 30mA for maximum reliability.
Electrical Specifications
VSUPPLY = ±5V, AV = +1, RF = 560Ω, RS = 650Ω, RL = 100Ω, Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
(NOTE 3)
TEST
LEVEL
TEMP.
(oC)
MIN
TYP
MAX
UNITS
INPUT CHARACTERISTICS
Input Offset Voltage
Average Input Offset Voltage Drift
ΔVCM = ±1.8V
Input Offset Voltage
Common-Mode Rejection Ratio
Input Offset Voltage
Power Supply Rejection Ratio
A
25
-
2
5
mV
A
Full
-
3
8
mV
B
Full
-
1
10
μV/ oC
A
25
45
48
-
dB
ΔVCM = ±1.8V
A
85
43
46
-
dB
ΔVCM = ±1.2V
A
-40
43
46
-
dB
ΔVPS = ±1.8V
A
25
48
52
-
dB
ΔVPS = ±1.8V
A
85
46
50
-
dB
ΔVPS = ±1.2V
A
-40
46
50
-
dB
Non-Inverting Input Bias Current
A
25
-
6
15
μA
A
Full
-
10
25
μA
Non-Inverting Input Bias Current Drift
B
Full
-
5
60
nA/ oC
Non-Inverting Input Bias Current
Power Supply Sensitivity
ΔVPS = ±1.8V
A
25
-
0.5
1
μA/V
ΔVPS = ±1.8V
A
85
-
0.8
3
μA/V
ΔVPS = ±1.2V
A
-40
-
0.8
3
μA/V
Non-Inverting Input Resistance
ΔVCM = ±1.8V
A
25
0.8
2
-
MΩ
ΔVCM = ±1.8V
A
85
0.5
1.3
-
MΩ
ΔVCM = ±1.2V
A
-40
0.5
1.3
-
MΩ
A
25
-
2
7.5
μA
A
Full
-
5
15
μA
B
Full
-
60
200
nA/ oC
A
25
-
3
6
μA/V
Inverting Input Bias Current
Inverting Input Bias Current Drift
ΔVCM = ±1.8V
Inverting Input Bias Current
Common-Mode Sensitivity
Inverting Input Bias Current
Power Supply Sensitivity
2
ΔVCM = ±1.8V
A
85
-
4
8
μA/V
ΔVCM = ±1.2V
A
-40
-
4
8
μA/V
ΔVPS = ±1.8V
A
25
-
2
5
μA/V
ΔVPS = ±1.8V
A
85
-
4
8
μA/V
ΔVPS = ±1.2V
A
-40
-
4
8
μA/V
HFA1245
Electrical Specifications
VSUPPLY = ±5V, AV = +1, RF = 560Ω, RS = 650Ω, RL = 100Ω, Unless Otherwise Specified (Continued)
(NOTE 3)
TEST
LEVEL
TEMP.
(oC)
MIN
Inverting Input Resistance
B
25
Input Capacitance
B
25
Input Voltage Common Mode Range
(Implied by VIO CMRR, +RIN, and -IBIAS CMS
Tests)
A
A
PARAMETER
TEST CONDITIONS
TYP
MAX
UNITS
-
56
-
Ω
-
2.0
-
pF
25, 85
±1.8
±2.4
-
V
-40
±1.2
±1.7
-
V
Input Noise Voltage Density (Note 6)
f = 100kHz
B
25
-
3.5
-
nV/√Hz
Non-Inverting Input Noise Current Density
(Note 6)
f = 100kHz
B
25
-
2.5
-
pA/√Hz
Inverting Input Noise Current Density
(Note 6)
f = 100kHz
B
25
-
30
-
pA/√Hz
B
25
-
500
-
kΩ
B
25
-
260
-
MHz
TRANSFER CHARACTERISTICS
Open Loop Transimpedance Gain (Note 6)
AC CHARACTERISTICS
-3dB Bandwidth (VOUT = 0.2VP-P, Note 6)
Full Power Bandwidth
(VOUT = 5VP-P at AV = +2/-1,
4VP-P at AV = +1, Note 6)
Gain Flatness (AV = +2, RF = 750Ω,
VOUT = 0.2VP-P , Note 6)
AV = +1, +RS = 650Ω
AV = +2, RF = 750Ω
B
25
-
420
-
MHz
AV = -1, RF = 475Ω
B
25
-
280
-
MHz
AV = +1, +RS = 650Ω
B
25
-
150
-
MHz
AV = +2, RF = 750Ω
B
25
-
115
-
MHz
AV = -1, RF = 475Ω
B
25
-
160
-
MHz
To 25MHz
B
25
-
±0.04
-
dB
To 50MHz
Minimum Stable Gain
Crosstalk (AV = +2, RF = 750Ω,
VOUT = 1VP-P, Notes 4, 6)
B
25
-
±0.11
-
dB
A
Full
-
1
-
V/V
5MHz
B
25
-
-83
-
dB
10MHz
B
25
-
-77
-
dB
25
±3
±3.4
-
V
OUTPUT CHARACTERISTICS AV = +2, RF = 750Ω, Unless Otherwise Specified
Output Voltage Swing (Note 6)
AV = -1, RL = 100Ω
A
A
Full
±2.8
±3
-
V
Output Current (Note 6)
AV = -1, RL = 50Ω
A
25, 85
50
60
-
mA
Output Short Circuit Current
A
-40
28
42
-
mA
B
25
-
90
-
mA
Closed Loop Output Resistance (Note 6)
DC
B
25
-
0.07
-
Ω
Second Harmonic Distortion
(VOUT = 2VP-P)
10MHz
B
25
-
-50
-
dBc
20MHz
B
25
-
-45
-
dBc
Third Harmonic Distortion
(VOUT = 2VP-P)
10MHz
B
25
-
-57
-
dBc
20MHz
B
25
-
-50
-
dBc
3rd Order Intercept (Note 6)
20MHz
B
25
-
23
-
dBm
Reverse Isolation (S12 , Note 6)
65MHz
B
25
-
60
-
dB
TRANSIENT CHARACTERISTICS AV = +2, RF = 750Ω, Unless Otherwise Specified
Rise and Fall Times (VOUT = 0.5VP-P)
Overshoot
(VOUT = 0.5VP-P, VIN tRISE = 1ns, Note 5)
Slew Rate (VOUT = 4VP-P, AV = +1,
RF = 560Ω, +RS = 650Ω)
3
Rise Time
B
25
-
0.9
-
ns
Fall Time
B
25
-
1.5
-
ns
+OS
B
25
-
5
-
%
-OS
B
25
-
10
-
%
+SR
B
25
-
1150
-
V/μs
-SR (Note 7)
B
25
-
800
-
V/μs
HFA1245
Electrical Specifications
VSUPPLY = ±5V, AV = +1, RF = 560Ω, RS = 650Ω, RL = 100Ω, Unless Otherwise Specified (Continued)
PARAMETER
(NOTE 3)
TEST
LEVEL
TEMP.
(oC)
MIN
TYP
+SR
B
25
-
1400
-
V/μs
-SR (Note 7)
B
25
-
800
-
V/μs
+SR
B
25
-
2200
-
V/μs
-SR (Note 7)
B
25
-
1200
-
V/μs
TEST CONDITIONS
Slew Rate (VOUT = 5VP-P, AV = +2)
Slew Rate
(VOUT = 5VP-P, AV = -1, RF = 475Ω)
Settling Time (VOUT = +2V to 0V step,
Note 6)
Overdrive Recovery Time
MAX
UNITS
To 0.1%
B
25
-
15
-
ns
To 0.05%
B
25
-
20
-
ns
To 0.02%
B
25
-
40
-
ns
VIN = ±2V
B
25
-
8.5
-
ns
RL = 150Ω
B
25
-
0.02
-
%
RL = 75Ω
B
25
-
0.03
-
%
RL = 150Ω
B
25
-
0.03
-
Degrees
RL = 75Ω
B
25
-
0.05
-
Degrees
VIDEO CHARACTERISTICS AV = +2, RF = 750Ω, Unless Otherwise Specified
Differential Gain (f = 3.58MHz)
Differential Phase (f = 3.58MHz)
DISABLE CHARACTERISTICS
Disabled Supply Current
VDISABLE = 0V
A
Full
-
3
4
mA/Op Amp
DISABLE Input Logic Voltage
Low
A
Full
-
-
0.8
V
High
A
25, 85
2.0
-
-
V
A
-40
2.4
-
-
V
DISABLE Input Logic Low Current
VDISABLE = 0V
A
Full
-
100
200
μA
DISABLE Input Logic High Current
VDISABLE = 5V
A
Full
-
1
15
μA
Output Disable Time (Note 6)
VOUT = ±1V,
VDISABLE = 2.4V to 0.4V
B
25
-
30
-
ns
Output Enable Time (Note 6)
VOUT = ±1V,
VDISABLE = 0.4V to 2.4V
B
25
-
150
-
ns
Disabled Output Capacitance
VDISABLE = 0V
B
25
-
4.5
-
pF
Disabled Output Leakage (Note 6)
VDISABLE = 0V,
VIN = +2V, VOUT = ±3V
A
Full
-
2
10
μA
All Hostile Off Isolation (VDISABLE = 0V,
VIN = 1VP-P, AV = +2, Note 6)
At 5MHz
B
25
-
65
-
dB
At 10MHz
B
25
-
60
-
dB
Power Supply Range
C
25
±4.5
-
±5.5
V
Power Supply Current (Note 6)
A
25
5.6
5.8
6.1
mA/Op Amp
A
Full
5.4
5.9
6.3
mA/Op Amp
POWER SUPPLY CHARACTERISTICS
NOTES:
3. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only.
4. The typical use for these amplifiers is in multiplexed configurations, where one amplifier (hostile channel) is enabled, and the passive channel
is disabled. The crosstalk data specified is tested in this manner, with the input signal applied to the hostile channel, while monitoring the output
of the passive channel. Crosstalk performance with both the hostile and passive channels enabled is typically -63dB at 5MHz, and -58dB at
10MHz.
5. Undershoot dominates for output signal swings below GND (e.g., 0.5VP-P), yielding a higher overshoot limit compared to the
VOUT = 0V to 0.5V condition. See the “Application Information“ section for details.
6. See Typical Performance Curves for more information.
7. Slew rates are asymmetrical if the output swings below GND (e.g., a bipolar signal). Positive unipolar output signals have symmetric positive
and negative slew rates comparable to the +SR specification. See the “Application Information” section, and the pulse response graphs for
details.
4
HFA1245
Application Information
AV = +2
Relevant Application Notes
The following Application Notes pertain to the HFA1245:
• AN9420-Current Feedback Amplifier Theory and
Applications
• AN9663-Converting from Voltage Feedback to Current
Feedback Amplifiers
These publications may be obtained from Intersil’s web site
(http://www.intersil.com).
2
NORMALIZED GAIN (dB)
• AN9787-An Intuitive Approach to Understanding
Current Feedback Amplifiers
1
RF = 806Ω , CH2
0
-1
-2
RF = 650Ω , CH1
-3
-4
1
Optimum Feedback Resistor
Although a current feedback amplifier’s bandwidth
dependency on closed loop gain isn’t as severe as that of a
voltage feedback amplifier, there can be an appreciable
decrease in bandwidth at higher gains. This decrease may
be minimized by taking advantage of the current feedback
amplifier’s unique relationship between bandwidth and RF .
All current feedback amplifiers require a feedback resistor,
even for unity gain applications, and RF , in conjunction with
the internal compensation capacitor, sets the dominant pole
of the frequency response. Thus, the amplifier’s bandwidth is
inversely proportional to RF . The HFA1245 design is
optimized for a 750Ω RF at a gain of +2. Decreasing RF
decreases stability, resulting in excessive peaking and
overshoot (Note: Capacitive feedback will cause the same
problems due to the feedback impedance decrease at higher
frequencies). At higher gains the amplifier is more stable, so
RF can be decreased in a trade-off of stability for bandwidth.
10
100
1000
FREQUENCY (MHz)
FIGURE 1. CHANNEL 1 AND CHANNEL 2 MATCHED
FREQUENCY RESPONSE
Non-inverting Input Source Impedance
For best operation, the DC source impedance seen by the
non-inverting input should be ≥50Ω. This is especially
important in inverting gain configurations where the
non-inverting input would normally be connected directly to
GND.
Pulse Undershoot and Asymmetrical Slew Rates
GAIN
(AV)
RF (Ω)
BANDWIDTH
(MHz)
-1
475
280
The HFA1245 utilizes a quasi-complementary output stage
to achieve high output current while minimizing quiescent
supply current. In this approach, a composite device
replaces the traditional PNP pulldown transistor. The
composite device switches modes after crossing 0V,
resulting in added distortion for signals swinging below
ground, and an increased undershoot on the negative
portion of the output waveform (see Figures 7, 11, 15, and
19). This undershoot isn’t present for small bipolar signals,
or large positive signals. Another artifact of the composite
device is asymmetrical slew rates for output signals with a
negative voltage component. The slew rate degrades as the
output signal crosses through 0V (see Figures 7, 11, 15, and
19), resulting in a slower overall negative slew rate. Positive
only signals have symmetrical slew rates as illustrated in the
large signal positive pulse response graphs (see Figures 5,
9, 13, and 17).
+1
560 (+RS = 650Ω)
260
DISABLE Input TTL Compatibility
+2
750
420
+5
200
270
+10
180
140
The HFA1245 derives an internal GND reference for the
digital circuitry as long as the power supplies are symmetrical
about GND. With symmetrical supplies the digital switching
threshold (VTH = (VIH + VIL)/2 = (2.0 + 0.8)/2) is 1.4V, which
ensures the TTL compatibility of the DISABLE input. If
asymmetrical supplies (e.g., +10V, 0V) are utilized, the
switching threshold becomes:
The table below lists recommended RF values for various
gains, and the expected bandwidth. For good channel-tochannel gain matching, it is recommended that all resistors
(termination as well as gain setting) be ±1% tolerance or
better. Note that a series input resistor, on +IN, is required for
a gain of +1, to reduce gain peaking and increase stability.
TABLE 1. OPTIMUM FEEDBACK RESISTOR
Channel-To-Channel Frequency Response Matching
The frequency response of channel 1 and channel 2 aren’t
perfectly matched. For the best channel-to-channel
frequency response match in a gain of 2 (see Figure 1), use
RF = 650Ω for channel 1 and RF = 806Ω for channel 2.
5
V+ + VV TH = ------------------- + 1.4V,
2
and the VIH and VIL levels will be VTH ±0.6V, respectively.
HFA1245
Pin 12 is an optional GND reference used to ensure the TTL
compatibility of the DISABLE inputs. With symmetrical
supplies the GND pin may be unconnected, or connected
directly to GND. If asymmetrical supplies (e.g., +10V, 0V)
are utilized, and TTL compatibility is desired, the GND pin
must be connected to GND. With an external GND, the
DISABLE input is TTL compatible regardless of supply voltage
utilized.
PC Board Layout
The HFA1245’s frequency response depends greatly on the
care taken in designing the PC board. The use of low
inductance components such as chip resistors and chip
capacitors is strongly recommended, while a solid
ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10μF) tantalum in parallel with a small value
(0.1μF) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
Care must also be taken to minimize the capacitance to
ground at the amplifier’s inverting input (-IN), as this
capacitance causes gain peaking, pulse overshoot, and if
large enough, instability. To reduce this capacitance, the
designer should remove the ground plane under traces
connected to -IN, and keep connections to -IN as short as
possible.
An example of a good high frequency layout is the HA5022
evaluation board discussed below.
bandwidth still decreases as the load capacitance
increases. For example, at AV = +1, RS = 45Ω , CL = 40pF,
the overall bandwidth is 185MHz, but the bandwidth drops
to 85MHz at AV = +1, RS = 9Ω , CL = 330pF.
50
SERIES OUTPUT RESISTANCE (Ω)
Optional GND Pin for TTL Compatibility
Figure 2 details starting points for the selection of this
resistor. The points on the curve indicate the RS and CL
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
RS and CL form a low pass network at the output, thus
limiting system bandwidth well below the amplifier
bandwidth of 260MHz (for AV = +1). By decreasing RS as
CLincreases (as illustrated in the curves), the maximum
bandwidth is obtained without sacrificing stability. Even so,
6
30
20
AV = +1
AV = +2
10
0
0
50
100
150
200
250
300
350
400
LOAD CAPACITANCE (pF)
FIGURE 2. RECOMMENDED SERIES OUTPUT RESISTOR vs
LOAD CAPACITANCE
Evaluation Board
Evaluate the HFA1245’s performance using the HA5022
evaluation board (part number HA5022EVAL). Please
contact your local sales office for ordering information. The
feedback and gain setting resistors must be replaced with
the appropriate value (see “Optimum Feedback Resistor”
table) for the gain being evaluated. Also, replace the two 0Ω
series output resistors (RS) with 50Ω resistors.
The modified schematic of the board is shown in Figure 3.
750Ω
750Ω
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line degrade the amplifier’s phase
margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (RS) in series with the output
prior to the capacitance.
40
50Ω
50Ω
1
IN1
-5V
2
DIS1
3
-
+
CH1
4
10μF
0.1μF
IN2
DIS2
5
6
50Ω
7
14
OUT1
RS
13 NC
12 GND
0.1μF
10μF
+5V
11
CH2
+
-
10 NC
9 NC
8
GND
50Ω
OUT2
RS
750Ω
750Ω
FIGURE 3. EVALUATION BOARD SCHEMATIC MODIFIED
FOR AV = +2
HFA1245
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω,
Unless Otherwise Specified
300
3.0
AV = +2
250
2.5
200
2.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
AV = +2
150
100
50
0
-50
1.5
1.0
0.5
0
-0.5
-100
-1.0
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 4. SMALL SIGNAL POSITIVE PULSE RESPONSE
2.0
AV = +2
150
1.5
100
1.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
200
FIGURE 5. LARGE SIGNAL POSITIVE PULSE RESPONSE
50
0
-50
-100
-150
AV = +2
0.5
0
-0.5
-1.0
-1.5
-200
-2.0
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 6. SMALL SIGNAL BIPOLAR PULSE RESPONSE
FIGURE 7. LARGE SIGNAL BIPOLAR PULSE RESPONSE
300
3.0
AV = +1
250
2.5
200
2.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
AV = +1
150
100
50
0
1.5
1.0
0.5
0
-50
-0.5
-1.0
-100
TIME (5ns/DIV.)
FIGURE 8. SMALL SIGNAL POSITIVE PULSE RESPONSE
7
TIME (5ns/DIV.)
FIGURE 9. LARGE SIGNAL POSITIVE PULSE RESPONSE
HFA1245
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω,
Unless Otherwise Specified (Continued)
200
AV = +1
1.5
100
1.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
150
2.0
AV = +1
50
0
-50
-100
-150
TIME (5ns/DIV.)
3.0
AV = -1
AV = -1
2.5
200
2.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
-1.0
FIGURE 11. LARGE SIGNAL BIPOLAR PULSE RESPONSE
300
150
100
50
0
1.5
1.0
0.5
0
-50
-0.5
-1.0
-100
TIME (5ns/DIV.)
FIGURE 12. SMALL SIGNAL POSITIVE PULSE RESPONSE
TIME (5ns/DIV.)
FIGURE 13. LARGE SIGNAL POSITIVE PULSE RESPONSE
200
2.0
AV = -1
AV = -1
1.5
1.0
100
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
-0.5
-2.0
TIME (5ns/DIV.)
FIGURE 10. SMALL SIGNAL BIPOLAR PULSE RESPONSE
150
0
-1.5
-200
250
0.5
50
0
-50
-100
-150
0.5
0
-0.5
-1.0
-1.5
-200
TIME (5ns/DIV.)
FIGURE 14. SMALL SIGNAL BIPOLAR PULSE RESPONSE
8
-2.0
TIME (5ns/DIV.)
FIGURE 15. LARGE SIGNAL BIPOLAR PULSE RESPONSE
HFA1245
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω,
Unless Otherwise Specified (Continued)
3.0
300
AV = +5
2.0
150
100
AV = +10
50
0
-50
1.5
AV = +10
1.0
0.5
0
-0.5
-100
-1.0
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 16. SMALL SIGNAL POSITIVE PULSE RESPONSE
FIGURE 17. LARGE SIGNAL POSITIVE PULSE RESPONSE
200
150
2.0
1.5
AV = +5
AV = +5
1.0
50
0
AV = +10
-50
-100
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
100
AV = +10
0.5
0
-0.5
-1.0
-1.5
-150
-200
-2.0
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 18. SMALL SIGNAL BIPOLAR PULSE RESPONSE
FIGURE 19. LARGE SIGNAL BIPOLAR PULSE RESPONSE
3.0 A = +2
V
630
2.0
200
63
1.0
20
0
DISABLE INPUT
GAIN (kΩ)
VOLTAGE (V)
GAIN
6.3
2
0.63
1.0
0
180
PHASE
135
0.2
90
0.063
45
OUTPUT
0
-1.0
0.001
TIME (100ns/DIV.)
FIGURE 20. OUTPUT DISABLE / ENABLE RESPONSE
9
0.01
0.1
1
3 6 10
100
FREQUENCY (MHz)
FIGURE 21. OPEN LOOP TRANSIMPEDANCE
500
PHASE (DEGREES)
200
2.5
AV = +5
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
250
HFA1245
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω,
GAIN
AV = +1, CH1
-3
-6
AV = -1
PHASE
0
90
180
270
AV = +1
AV = -1
BOTH CHANNELS SHOWN
1
10
100
FREQUENCY (MHz)
360
GAIN
0
AV = +2, CH1
-3
-6
0
AV = +5
10
100
FREQUENCY (MHz)
GAIN (dB)
AV = +1
3
VOUT = 4VP-P
0
90
VOUT = 2.5VP-P
VOUT = 1VP-P
180
270
360
VOUT = 4VP-P
PHASE
0
1
1000
VOUT = 2.5VP-P
0
VOUT = 4VP-P
90
VOUT = 2.5VP-P
180
VOUT = 1VP-P
270
360
BOTH CHANNELS SHOWN
1
10
100
FREQUENCY (MHz)
1000
FIGURE 26. FREQUENCY RESPONSE FOR VARIOUS
OUTPUT VOLTAGES
10
NORMALIZED GAIN (dB)
VOUT = 4VP-P
PHASE
360
10
100
FREQUENCY (MHz)
1000
BOTH CHANNELS SHOWN
VOUT = 1VP-P
GAIN
-6
270
FIGURE 25. FREQUENCY RESPONSE FOR VARIOUS
OUTPUT VOLTAGES
NORMALIZED PHASE (DEGREES)
GAIN (dB)
FIGURE 24. FREQUENCY RESPONSE FOR VARIOUS
OUTPUT VOLTAGES
-3
180
BOTH CHANNELS SHOWN
10
100
FREQUENCY (MHz)
AV = -1
90
VOUT = 4VP-P
VOUT = 2.5VP-P
VOUT = 1VP-P
BOTH CHANNELS SHOWN
3
VOUT = 1VP-P
VOUT = 2.5VP-P
-3
-6
VOUT = 4VP-P
1
1000
GAIN
0
PHASE (DEGREES)
NORMALIZED GAIN (dB)
PHASE
360
FIGURE 23. FREQUENCY RESPONSE
VOUT = 2.5VP-P
-6
270
BOTH CHANNELS SHOWN
1
VOUT = 1VP-P , CH1
-3
180
AV = +2
1000
GAIN
0
2
2 90
AV = +10
VOUT = 1VP-P , CH2
AV = +2
AV = +5
AV = +10
PHASE
FIGURE 22. FREQUENCY RESPONSE
3
AV = +2, CH2
PHASE (DEGREES)
0
VOUT = 200mVP-P
3
PHASE (DEGREES)
AV = +1, CH2
NORMALIZED GAIN (dB)
VOUT = 200mVP-P
3
NORMALIZED PHASE (DEGREES)
GAIN (dB)
Unless Otherwise Specified (Continued)
3
0
-3
AV = +2, VOUT = 5VP-P
-6
AV = +1, VOUT = 4VP-P
-9
AV = -1, VOUT = 5VP-P
1
10
100
FREQUENCY (MHz)
FIGURE 27. FULL POWER BANDWIDTH
1000
HFA1245
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω,
Unless Otherwise Specified (Continued)
VOUT = 200mVP-P
0.4
-30
AV = +1, CH1
0.2
0.1
AV = +2, CH2
0
-0.1
AV = -1
-0.2
-0.3
-40
-50
-60
-70
-80
-90
AV = +2, CH1
-0.4
CROSSTALK (dB)
NORMALIZED GAIN (dB)
0.3
AV = +2, VIN = 1VP-P
-20
AV = +1, CH2
-100
BOTH CHANNELS SHOWN
1
10
FREQUENCY (MHz)
100
FIGURE 28. GAIN FLATNESS
0.3
1000
DIS1 = DIS2 = 0V
30
OFF ISOLATION (dB)
CROSSTALK (dB)
100
AV = +2, VIN = 1VP-P
20
-30
-40
-50
-60
-70
-80
40
50
60
70
80
-90
90
-100
100
0.3
1
10
FREQUENCY (MHz)
100
0.3
1000
1
10
FREQUENCY (MHz)
100
1000
FIGURE 31. ALL HOSTILE OFF ISOLATION
FIGURE 30. CROSSTALK (PASSIVE CHANNEL DISABLED)
10
OUTPUT RESISTANCE (Ω)
AV = +2
20
AV = +2
30
AV = -1
40
GAIN (dB)
10
FREQUENCY (MHz)
FIGURE 29. CROSSTALK (PASSIVE CHANNEL ENABLED)
AV = +2, VIN = 1VP-P
-20
1
50
AV = +1
60
70
80
1K
100
10
1
0.1
0.01
90
100
1
10
100
FREQUENCY (MHz)
FIGURE 32. REVERSE ISOLATION
11
1000
0.3
1
10
100
FREQUENCY (MHz)
FIGURE 33. ENABLED OUTPUT RESISTANCE
1000
HFA1245
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω,
Unless Otherwise Specified (Continued)
35
AV = +2
30
SETTLING ERROR (%)
0.1
TOI (dBm)
25
20
15
10
5
VOUT = 2V
AV = +2
RF = 750Ω
0.05
0.025
0
-0.025
-0.05
-0.1
0
50
100
FREQUENCY (MHz)
3
150
23
33
43
53
63
73
83
93
103
TIME (ns)
FIGURE 34. 3rd ORDER INTERCEPT vs FREQUENCY
FIGURE 35. SETTLING TIME RESPONSE
3.6
100
100
AV = -1
INI+
10
10
ENI
|-VOUT| (RL = 100Ω)
+VOUT (RL = 100Ω)
3.4
OUTPUT VOLTAGE (V)
INI-
NOISE CURRENT (pA/√Hz)
3.5
NOISE VOLTAGE (nV/√Hz)
13
3.3
3.2
|-VOUT| (RL = 50Ω)
3.1
+VOUT (RL = 50Ω)
3.0
2.9
2.8
2.7
1
1
0.1
1
10
FREQUENCY (kHz)
2.6
-50
100
1
OUTPUT LEAKAGE CURRENT (μA)
TOTAL SUPPLY CURRENT (mA)
-55oC
25
20
25oC
15
125oC
125oC
25oC
0
-55oC
3
25
0.9
5
6
SUPPLY VOLTAGE (±V)
7
FIGURE 38. SUPPLY CURRENT vs SUPPLY VOLTAGE
12
75
100
125
VDIS = 0V
VOUT = -3.5V, VIN = 2.5V
0.8
0.7
0.6
0.5
VOUT = -3V, VIN = 2V
0.4
0.3
VOUT = 3.5V, VIN = -2.5V
0.2
0.1
4
50
FIGURE 37. OUTPUT VOLTAGE vs TEMPERATURE
30
5
0
TEMPERATURE (oC)
FIGURE 36. INPUT NOISE CHARACTERISTICS
10
-25
8
0
-75
VOUT = 3V, VIN = -2V
-50
-25
0
25
50
75
100
125
TEMPERATURE (oC)
FIGURE 39. DISABLED OUTPUT LEAKAGE vs TEMPERATURE
HFA1245
Die Characteristics
DIE DIMENSIONS:
SUBSTRATE POTENTIAL (POWERED UP):
69 mils x 92 mils x 19 mils
1750μm x 2330μm x 483μm
Floating (Recommend Connection to V-)
PASSIVATION:
METALLIZATION:
Type: Nitride
Thickness: 4kÅ ±0.5kÅ
Type: Metal 1: AICu(2%)/TiW
Thickness: Metal 1: 8kÅ ±0.4kÅ
Type: Metal 2: AICu(2%)
Thickness: Metal 2: 16kÅ ±0.8kÅ
TRANSISTOR COUNT:
180
Metallization Mask Layout
HFA1245
-IN1
OUT1
GND (NOTE 8)
V+
+IN1
NC
DISABLE1
VDISABLE2
NC
+IN2
OUT2
-IN2
V-
NOTE:
8. This is an optional GND pad. Users may set a GND reference, via this pad, to ensure the TTL compatibility of the DISABLE inputs when using
asymmetrical supplies (e.g., V+ = 10V, V- = 0V). See the “Application Information” section for details.
13
HFA1245
Dual-In-Line Plastic Packages (PDIP)
N
E14.3 (JEDEC MS-001-AA ISSUE D)
E1
INDEX
AREA
1 2 3
14 LEAD DUAL-IN-LINE PLASTIC PACKAGE
N/2
INCHES
-B-
SYMBOL
-AD
E
BASE
PLANE
-C-
SEATING
PLANE
A2
A
L
D1
e
B1
D1
eA
A1
eC
B
0.010 (0.25) M
C
L
C A B S
C
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English
and Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
MILLIMETERS
MIN
MAX
MIN
MAX
NOTES
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
B1
0.045
0.070
1.15
1.77
8
C
0.008
0.014
0.204
0.355
-
D
0.735
0.775
18.66
D1
0.005
-
0.13
-
5
19.68
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
2.54 BSC
-
eA
0.300 BSC
7.62 BSC
6
eB
-
0.430
-
10.92
7
L
0.115
0.150
2.93
3.81
4
N
14
14
9
Rev. 0 12/93
7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 1.14mm).
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
14
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