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Data
Sheet
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NO
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1-888-
HA-5135
®
January 2004
FN2907.5
2.5MHz, Precision Operational Amplifier
Features
The Intersil HA-5135 is a precision operational amplifier
manufactured using a combination of key technological
advancements to provide outstanding input characteristics.
• Low Offset Voltage. . . . . . . . . . . . . . . . . . . . . 75µV (Max)
A Super Beta input stage is combined with laser trimming,
dielectric isolation and matching techniques to produce
75µV (Maximum) input offset voltage and 0.4µV/oC input
offset voltage average drift. Other features enhanced by this
process include 9nV/√Hz (Typ) Input Noise Voltage, 1nA
Input Bias Current and 140dB Open Loop Gain.
These features coupled with 120dB CMRR and PSRR make
the HA-5135 an ideal device for precision DC instrumentation
amplifiers. Excellent input characteristics in conjunction with
2.5MHz bandwidth and 0.8V/µs slew rate, make this
amplifier extremely useful for precision integrator and
biomedical amplifier designs. This amplifier is also well
suited for precision data acquisition and for accurate
threshold detector applications.
HA-5135 offers added features over the industry standard
OP-07 in regards to bandwidth and slew rate specifications.
For the military grade product, refer to the HA-5135/883 data
sheet.
• Low Offset Voltage Drift . . . . . . . . . . . . . . . . . . . 0.4µV/oC
• Low Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9nV/√Hz
• Open Loop Gain. . . . . . . . . . . . . . . . . . . . . . . . . . . 140dB
• Unity Gain Bandwidth. . . . . . . . . . . . . . . . . . . . . . 2.5MHz
• All Bipolar Construction
Applications
• High Gain Instrumentation
• Precision Data Acquisition
• Precision Integrators
• Biomedical Amplifiers
• Precision Threshold Detectors
Part Number Information
PART NUMBER
HA7-5135-5
TEMP.
RANGE (oC)
0 to 75
PACKAGE
8 Ld CERDIP
PKG.
NO.
F8.3A
Pinout
HA-5135 (CERDIP)
TOP VIEW
BAL
1
-IN
2
+IN
3
V-
4
8 BAL 1
7 V+
+
6 OUT
5 BAL 1
NOTE: Both BAL 1 pins are connected together internally.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HA-5135
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . 40V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Output Short Circuit Duration. . . . . . . . . . . . . . . . . . . . . . . Indefinite
Thermal Resistance (Typical, Note 2)
Operating Conditions
θJA (oC/W)
θJC (oC/W)
CERDIP Package. . . . . . . . . . . . . . . . .
115
28
Maximum Junction Temperature (Note 1) . . . . . . . . . . . . . . . . 175oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Temperature Ranges
HA-5135-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation, including output load, must be designed to maintain the maximum junction temperature below 175oC.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
VSUPPLY = ±15V
Electrical Specifications
HA-5135-5
TEMP.
(oC)
MIN
TYP
MAX
UNITS
25
-
10
75
µV
Full
-
50
130
µV
Average Offset Voltage Drift
Full
-
0.4
1.3
µV/oC
Bias Current
25
-
±1
±4
nA
Full
-
-
±6
nA
Bias Current Average Drift
Full
-
0.02
0.04
nA/oC
Offset Current
25
-
-
4
nA
Full
-
-
5.5
nA
Offset Current Average Drift
Full
-
0.02
0.04
nA/oC
Common Mode Range
Full
±12
-
-
V
Differential Input Resistance
25
20
30
-
MΩ
PARAMETER
TEST CONDITIONS
INPUT CHARACTERISTICS
Offset Voltage
Input Noise Voltage (Note 3)
0.1Hz to 10Hz
25
-
-
0.6
µVP-P
Input Noise Voltage Density
(Note 3)
f = 10Hz
25
-
13.0
18.0
nV/√Hz
f = 100Hz
-
10.0
13.0
nV/√Hz
f = 1000Hz
-
9.0
11.0
nV/√Hz
Input Noise Current (Note 3)
0.1Hz to 10Hz
25
-
15
30
pAP-P
Input Noise Current Density
(Note 3)
f = 10Hz
25
-
0.4
0.8
pA/√Hz
f = 100Hz
-
0.17
0.23
pA/√Hz
f = 1000Hz
-
0.14
0.17
pA/√Hz
25
120
140
-
dB
Full
120
-
-
dB
TRANSFER CHARACTERISTICS
VOUT = ±10V, RL = 2kΩ
Large Signal Voltage Gain
Common Mode Rejection Ratio
VCM = ±10V
Full
106
120
-
dB
Closed Loop Bandwidth
AVCL = +1
25
0.6
2.5
-
MHz
RL = 600Ω
25
±10
±12
-
V
Full
±10
-
-
V
OUTPUT CHARACTERISTICS
Output Voltage Swing
2
HA-5135
VSUPPLY = ±15V (Continued)
Electrical Specifications
PARAMETER
TEST CONDITIONS
HA-5135-5
TEMP.
(oC)
MIN
TYP
MAX
UNITS
Full Power Bandwidth (Note 4)
RL = 2kΩ
25
8
10
-
kHz
Output Current
VOUT = 10V
25
±15
±20
-
mA
Output Resistance
Note 5
25
-
45
-
Ω
Rise Time
25
-
340
-
ns
Slew Rate
25
0.5
0.8
-
V/µs
Settling Time (Note 7)
25
-
11
-
µs
Full
-
1.0
1.7
mA
Full
94
130
-
dB
TRANSIENT RESPONSE (Note 6)
POWER SUPPLY CHARACTERISTICS
Supply Current
VS = ±5V to ±20V
Power Supply Rejection Ratio
NOTES:
3. Not tested. 90% of units meet or exceed these specifications.
Slew Rate
4. Full power bandwidth guaranteed based on slew rate measurement using: FPBW = ------------------------------- .
2π V PEAK
5. Output resistance measured under open loop conditions (f = 100Hz).
6. Refer to test circuits section of the data sheet.
7. Settling time is measured to 0.1% of final value for a 10V output step and AV = -1.
Test Circuits and Waveforms
IN
+
OUT
2kΩ
100pF
FIGURE 1. SLEW RATE AND TRANSIENT RESPONSE TEST CIRCUIT
INPUT
0V
OUTPUT
0V
Vertical Scale: Input = 50mV/Div. Output = 100mV/Div.
Horizontal Scale: 1µs/Div.
SMALL SIGNAL RESPONSE
3
INPUT
0V
OUTPUT
0V
Vertical Scale: 5V/Div.
Horizontal Scale: 5µs/Div.
LARGE SIGNAL RESPONSE
HA-5135
Test Circuits and Waveforms
(Continued)
+15V
2N4416
5kΩ
TO
OSCILLOSCOPE
5kΩ
2kΩ
+15V
NOTES:
+
-
VIN
8. AV = -1.
9. Feedback and summing resistors
should be 0.1% matched.
VOUT
A.U.T.
100pF
2kΩ
-15V
10. Clipping diodes are optional.
HP5082-2810 recommended.
2kΩ
FIGURE 2. SETTLING TIME CIRCUIT
Schematic Diagram
BALANCE
V+
R9
R10
R5
R8
R12
R11
Q36
C2
Q44
Q55
Q56
R7
Q35
R6
Q37
Q57
Q21
Q43
Q20
Q38
Q19
Q54
C3
Q58
Q33
Q28
Q40
Q8
Q17
Q32
Q47
R16
Q18
Q39
Q22
RP18
R15
Q27
Q15
Q10
Q16
Q12
Q13
Q11
Q6
Q2 Q4
Q3
R19
Q50
(-) INVERTING
INPUT
C4
Q14
Q5
Q1
R3
Q46
Q9
OUT
Q30
Q24
C1
Q34
R4
Q31
Q45
(+) NONINVERTING
INPUT
Q7
Q52
Q26
Q48
Q42
Z1
Q51
Q49
R20
Q25
Q53
Q41
R14
R13
R2
R17
V-
4
HA-5135
Application Information
Power Supply Decoupling
Saturation Recovery
Although not absolutely necessary, it is recommended that
all power supply lines be decoupled with 0.01µF ceramic
capacitors to ground. Decoupling capacitors should be
located as near to the amplifier terminals as possible.
Input and output saturation recovery time is negligible in
most applications. However, care should be exercised to
avoid exceeding the absolute maximum ratings of the
device.
Considerations For Prototyping:
Differential Input Voltages
The following list of recommendations are suggested for
prototyping.
Inputs are shunted with back-to-back diodes for overvoltage
protection. In applications where differential input voltages in
excess of 1V are applied between the inputs, the use of
limiting resistors at the inputs is recommended.
1. Resolving low level signals requires minimizing leakage
currents caused by external circuitry. Use of quality
insulating materials, thorough cleaning of insulating
surfaces and implementation of moisture barriers when
required is suggested.
2. Error voltages generated by thermocouples formed
between dissimilar metals in the presence of temperature
gradients should be minimized. Isolation of low level
circuity from heat generating components is
recommended.
Typical Applications
The excellent input and gain characteristics of HA-5135 are
well suited for precision integrator applications. Accurate
integration over seven decades of frequency using HA-5135,
virtually nullifies the need for more expensive chopper-type
amplifiers.
C
3. Shielded cable input leads, guard rings and shield drivers
are recommended for the most critical applications.
Large Capacitive Loads
When driving large capacitive loads (>500pF), a small value
resistor (≈50Ω) should be connected in series with the output
and inside the feedback loop.
Offset Voltage Adjustment (See Figure 3)
A 20kΩ balance potentiometer is recommended if offset
nulling is required. However, other potentiometer values
such as 10kΩ, 50kΩ and 100kΩ may be used. The
minimum adjustment range for given values is ±2mV. VOS
TC of the amplifier is optimized at minimal VOS. Tested
Offset Adjustment is |VOS + 1mV| minimum referred
to output.
V+
20kΩ
8
7
-
2
OPTIONAL
CONNECTION
6
+
5
3
4
FIGURE 3. OFFSET NULLING CONNECTIONS
5
7
R
-
2
6
+
OUT
5
3
4
RB
FIGURE 4. PRECISION INTEGRATOR
Low VOS coupled with high open loop Gain, high CMRR
and high PSRR make HA-5135 ideally suited for precision
detector applications, such as the zero crossing detector
shown in Figure 5.
RP (NOTE)
1
8
1
HA-5135
8
OUTPUT
±13V
200µs/DIV.
1
INPUT
7
-
2
6
+
OUT
RIN
5
3
INPUT
±5mV
200µs/DIV.
4
RF
OPTIONAL FOR OUTPUT
SWING LIMITING
FIGURE 5. ZERO CROSSING DETECTOR
HA-5135
2kΩ
+
-
+15V
4.5kΩ
+ HA-5135
2kΩ
-
500Ω
+15V
4.5kΩ
-15V
2kΩ
2kΩ
+
-
HA-5135
NOTE: AV = 100
-15V
FIGURE 6. PRECISION INSTRUMENTATION AMPLIFIER
3
INPUT BIAS CURRENT
70
2
60
1
50
0
40
4
INPUT OFFSET CURRENT
2
30
20
TYPICAL
|VOS|
10
0
-80
-40
0
80
40
120
0
-2
-4
160
TEMPERATURE (oC)
FIGURE 7. INPUT OFFSET VOLTAGE, INPUT BIAS AND
OFFSET CURRENT vs TEMPERATURE
6
INPUT OFFSET
CURRENT (nA)
INPUT OFFSET VOLTAGE (µV)
80
6
BIAS CURRENT (nA)
4
INPUT BIAS
CURRENT (nA)
Typical Performance Curves
4
2
0
-2
-4
-6
-10
-8
-4
-2
-6
0
2
4
6
DIFFERENTIAL INPUT VOLTAGE (V)
8
10
FIGURE 8. INPUT BIAS CURRENT vs DIFFERENTIAL INPUT
VOLTAGE
HA-5135
VSUPPLY = ±15V
TC = ±1oC, AV = 1000
10
MEASUREMENT AND ENVIRONMENTAL
SYSTEMS ALLOWED 12 HOUR
STABILIZATION PERIOD
5
0
-5
-10
14
1.4
12
1.2
10
1.0
NOISE VOLTAGE
8
0.8
6
0.6
4
0.4
NOISE CURRENT
2
0.2
0
2 4 6 8 10
20
30
TIME (DAYS)
0
10
40
100
1K
10K
100K
FREQUENCY (Hz)
FIGURE 9. HA-5135 OFFSET VOLTAGE STABILITY vs TIME
FIGURE 10. INPUT NOISE vs FREQUENCY
0
160
80
140
100
PHASE ANGLE
80
90
60
GAIN
40
135
20
0
70
CLOSED LOOP GAIN (dB)
45
120
PHASE (DEGREES)
OPEN LOOP VOLTAGE GAIN (dB)
INPUT NOISE CURRENT (pA/√Hz)
(Continued)
INPUT NOISE VOLTAGE (nV/√Hz)
TOTAL DRIFT WITH TIME (µV)
Typical Performance Curves
60
50
40
30
20
10
180
0
-20
-10
1
10
100
1K
10K
100K
1M
10M
1
10
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 11. OPEN LOOP FREQUENCY RESPONSE
FIGURE 12. CLOSED LOOP FREQUENCY RESPONSE
2.6
50
PHASE MARGIN
40
2.5
30
20
BANDWIDTH
2.4
10
0
10
2.35
100
1000
10,000
LOAD CAPACITANCE (pF)
FIGURE 13. SMALL SIGNAL BANDWIDTH AND PHASE
MARGIN vs LOAD CAPACITANCE
7
UNITY GAIN BANDWIDTH (MHz)
PHASE MARGIN (DEGREES)
60
OUTPUT VOLTAGE SWING (VP-P)
35
RL = 2kΩ
VSUPPLY = ±20V
30
VSUPPLY = ±15V
25
20
VSUPPLY = ±10V
15
10
VSUPPLY = ±5V
5
100
1K
10K
100K
1M
FREQUENCY (Hz)
FIGURE 14. OUTPUT VOLTAGE SWING vs FREQUENCY
HA-5135
Typical Performance Curves
(Continued)
1.1
VSUPPLY = ±15V
NORMALIZED AC PARAMETERS
REFERRED TO VALUE AT ±15V
OUTPUT VOLTAGE SWING (VP-P)
30
25
20
VSUPPLY = ±10V
15
10
VSUPPLY = ±5V
5
BANDWIDTH
1.0
0.9
SLEW RATE
0.8
0.7
0.6
0
1
100
10
0
10K
1K
2
4
FIGURE 15. MAXIMUM OUTPUT VOLTAGE SWING vs LOAD
RESISTANCE
120
120
100
100
PSRR (dB)
140
CMRR (dB)
8
10
12
14
16
18
20
FIGURE 16. NORMALIZED AC PARAMETERS vs SUPPLY
VOLTAGE
140
80
60
80
60
40
40
20
20
0
0
1
10
100
1K
10K
1
100K
10
100
1K
10K
100K
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 17. CMRR vs FREQUENCY
FIGURE 18. PSRR vs FREQUENCY
10
±1.4
±1.2
5
SUPPLY CURRENT (mA)
TO 10mV
OUTPUT VOLTAGE STEP
- VOLTS FROM 0 VOLTS
6
SUPPLY VOLTAGE (±V)
LOAD RESISTANCE (Ω)
TO 1mV
0
-5
TO 1mV
-10
2
4
6
8
10
12
14
16
SETTLING TIME (µs)
FIGURE 19. SETTLING TIME FOR VARIOUS OUTPUT STEP
VOLTAGES
8
VS = ±20V
±0.8
VS = ±15V
VS = ±10V
±0.6
VS = ±5V
±0.4
±0.2
TO 10mV
0
±1.0
0
-80
-40
0
40
80
120
160
TEMPERATURE (oC)
FIGURE 20. POWER SUPPLY CURRENT vs TEMPERATURE
HA-5135
Die Characteristics
PASSIVATION:
Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.)
Silox Thickness: 12kÅ ±2kÅ
Nitride Thickness: 3.5kÅ ±1.5kÅ
DIE DIMENSIONS:
72 mils x 103 mils x 19 mils
(1840µm x 2620µm x 483µm)
TRANSISTOR COUNT:
METALLIZATION:
71
Type: Al, 1% Cu
Thickness: 16kÅ ±2kÅ
PROCESS:
Bipolar Dielectric Isolation
SUBSTRATE POTENTIAL (POWERED UP):
V-
Metallization Mask Layout
HA-5135O
BAL1
V+
OUT
BAL1
BAL2
-IN
9
+IN
V-
HA-5135
Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A)
LEAD FINISH
c1
8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
-D-
-A-
BASE
METAL
E
M
-Bbbb S
C A-B S
-C-
S1
0.200
-
5.08
-
0.026
0.36
0.66
2
b1
0.014
0.023
0.36
0.58
3
b2
0.045
0.065
1.14
1.65
-
b3
0.023
0.045
0.58
1.14
4
c
0.008
0.018
0.20
0.46
2
c1
0.008
0.015
0.20
0.38
3
D
-
0.405
-
10.29
5
E
0.220
0.310
5.59
7.87
5
eA
e
ccc M
C A-B S
eA/2
c
aaa M C A - B S D S
D S
NOTES
-
b2
b
MAX
0.014
α
A A
MIN
b
A
L
MILLIMETERS
MAX
A
Q
SEATING
PLANE
MIN
M
(b)
D
BASE
PLANE
SYMBOL
b1
SECTION A-A
D S
INCHES
(c)
NOTES:
1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
e
0.100 BSC
2.54 BSC
-
eA
0.300 BSC
7.62 BSC
-
eA/2
0.150 BSC
3.81 BSC
-
L
0.125
0.200
3.18
5.08
-
Q
0.015
0.060
0.38
1.52
6
S1
0.005
-
0.13
-
7
105o
90o
105o
-
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
α
90o
aaa
-
0.015
-
0.38
-
bbb
-
0.030
-
0.76
-
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
ccc
-
0.010
-
0.25
-
M
-
0.0015
-
0.038
2, 3
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b2.
N
8
8
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
8
Rev. 0 4/94
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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10
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