DATASHEET

DATASHEET
120MHz, Ultra-Low Noise Precision Operational
Amplifiers
HA-5147
Features
The HA-5147 operational amplifier features an unparalleled
combination of precision DC and wideband high speed
characteristics. Utilizing the Intersil D. I. technology and
advanced processing techniques, this unique design unites low
noise (3.2nV/Hz) precision instrumentation performance with
high speed (35V/µs) wideband capability.
• Slew rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V/µs
This amplifier’s impressive list of features include low VOS
(30mV), wide gain bandwidth (120MHz), high open loop gain
(1500V/mV) and high CMRR (120dB). Additionally, this flexible
device operates over a wide supply range (±5V to ±20V) while
consuming only 140mW of power.
Using the HA-5147 allows designers to minimize errors while
maximizing speed and bandwidth in applications requiring
gains greater than ten.
This device is ideally suited for low level transducer signal
amplifier circuits. Other applications which can utilize the
HA-5147’s qualities include instrumentation amplifiers, pulse
or RF amplifiers, audio preamplifiers and signal conditioning
circuits.
This device can easily be used as a design enhancement by
directly replacing the 725, OP25, OP06, OP07, OP27 and
OP37 where gains are greater than ten.
• Wide gain bandwidth (AV ≥ 10) . . . . . . . . . . . . . . . . . 120MHz
• Low noise . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2nV/Hz at 1kHz
• Low VOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30µV
• High CMRR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120dB
• High gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1500V/mV
Applications
• High speed signal conditioners
• Wide bandwidth instrumentation amplifiers
• Low level transducer amplifiers
• Fast, low level voltage comparators
• Highest quality audio preamplifiers
• Pulse/RF amplifiers
• For further design ideas see application note AN553
Pin Configuration
HA-5147 (CERDIP)
TOP VIEW
BAL
1
-IN
2
+IN
3
V-
4
+
8
BAL
7
V+
6
OUT
5
NC
Ordering Information
PART NUMBER
HA7-5147-2
PART MARKING
HA7- 5147-2
HA7-5147R5254 (Note 1) HA7- 5147R5254
TEMP. RANGE
(°C)
PACKAGE
PKG. DWG.
#
-55 to +125
8 Ld CerDIP
F8.3A
-55 to +125
8 Ld CerDIP with Pb-free Hot Solder DIP Lead Finish (SnAgCu)
F8.3A
NOTE:
1. Intersil Pb-free hermetic packaged products employ SnAgCu or Au termination finish, which are RoHS compliant termination finishes and compatible
with both SnPb and Pb-free soldering operations. Ceramic dual in-line packaged products (CerDIPs) do contain lead (Pb) in the seal glass and die
attach glass materials. However, lead in the glass materials of electronic components are currently exempted per the RoHS directive. Therefore,
ceramic dual inline packages with Pb-free termination finish are considered to be RoHS compliant.
November 6, 2015
FN2910.10
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2003, 2006, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
HA-5147
Absolute Maximum Ratings
TA = +25°C
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V
Differential Input Voltage (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.7V
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . Full Short-circuit Protection
Operating Conditions
Thermal Information
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
CERDIP Package (Note 3) . . . . . . . . . . . . . .
135
50
Maximum Junction Temperature (Hermetic Package). . . . . . . . . . . .+175°C
Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . +300°C
Temperature Range
HA-5147-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
2. For differential input voltages greater than 0.7V, the input current must be limited to 25mA to protect the back-to-back input diodes.
3. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
VSUPPLY = ±15V, CL ≤ 50pF, RS ≤ 100Ω.
TEMP.
(°C)
MIN
TYP
MAX
UNITS
25
-
30
100
µV
Full
-
70
300
µV
Average Offset Voltage Drift
Full
-
0.4
1.8
µV/°C
Bias Current
25
-
15
80
nA
Full
-
35
150
nA
25
-
12
75
nA
Full
-
30
135
nA
Common Mode Range
Full
±10.3
±11.5
-
V
Differential Input Resistance (Note 4)
25
0.8
4
-
MΩ
PARAMETER
TEST CONDITIONS
INPUT CHARACTERISTICS
Offset Voltage
Offset Current
Input Noise Voltage (Note 5)
0.1Hz to 10Hz
25
-
0.09
0.25
µVP-P
Input Noise Voltage Density (Note 6)
f = 10Hz
25
-
3.8
8.0
nV/Hz
f = 100Hz
-
3.3
4.5
nV/Hz
f = 1000Hz
-
3.2
3.8
nV/Hz
-
1.7
-
pA/Hz
f = 100Hz
-
1.0
-
pA/Hz
f = 1000Hz
-
0.4
0.6
pA/Hz
25
10
-
-
V/V
25
700
1500
-
V/mV
Full
300
800
-
V/mV
Input Noise Current Density (Note 6)
f = 10Hz
25
TRANSFER CHARACTERISTICS
Minimum Stable Gain
Large Signal Voltage Gain
VOUT = ±10V, RL = 2kΩ
Common Mode Rejection Ratio
VCM = ±10V
Full
100
120
-
dB
Gain-bandwidth Product
f = 10kHz
25
120
140
-
MHz
-
120
-
MHz
f = 1MHz
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HA-5147
Electrical Specifications
VSUPPLY = ±15V, CL ≤ 50pF, RS ≤ 100Ω. (Continued)
TEMP.
(°C)
MIN
TYP
MAX
UNITS
RL = 600Ω
25
±10.0
±11.5
-
V
RL = 2kΩ
Full
±11.4
±13.5
-
V
25
445
500
-
kHz
25
-
70
-
Ω
25
16.5
25
-
mA
25
-
22
50
ns
PARAMETER
TEST CONDITIONS
OUTPUT CHARACTERISTICS
Output Voltage Swing
Full Power Bandwidth (Note 7)
Output Resistance
Open Loop
Output Current
TRANSIENT RESPONSE (Note 8)
Rise Time
Slew Rate
VOUT = ±3V
25
28
35
-
V/µs
Settling Time
Note 9
25
-
400
-
ns
25
-
20
40
%
25
-
3.5
-
mA
Full
-
-
4.0
mA
Full
-
16
51
µV/V
Overshoot
POWER SUPPLY CHARACTERISTICS
Supply Current
Power Supply Rejection Ratio
VS = ±4V to ±18V
NOTES:
4. This parameter value is based upon design calculations.
5. Refer to Typical Performance section starting on page 6.
6. The limits for this parameter are established based on lab characterization, and reflect lot-to-lot variation.
Slew Rate .
7. Full power bandwidth established based on slew rate measurement using: FPBW = -------------------------2V PEAK
8. Refer to Test Circuits section on page 4.
9. Settling time is specified to 0.1% of final value for a 10V output step and AV = -10.
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HA-5147
Test Circuits and Waveforms
IN
+
OUT
1.8kΩ
50pF
200Ω
FIGURE 1. LARGE AND SMALL SIGNAL RESPONSE TEST CIRCUIT
IN
IN
OUT
OUT
Vertical Scale: Input = 0.5V/DIV
Output = 5V/DIV
Horizontal Scale: 500ns/DIV
Vertical Scale: Input = 10mV/DIV
Output = 100mV/DIV
Horizontal Scale: 100ns/DIV
FIGURE 2. LARGE SIGNAL RESPONSE
FIGURE 3. SMALL SIGNAL RESPONSE
+15V
2N4416
500Ω
TO
OSCILLOSCOPE
5kΩ
2kΩ
+15V
+
VOUT
AUT
-
VIN
200Ω
50pF
-15V
2kΩ
NOTES:
10. AV = -10.
11. Feedback and summing resistors should be 0.1%
matched.
12. Clipping diodes are optional. HP5082-2810
recommended.
FIGURE 4. SETTLING TIME TEST CIRCUIT
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Schematic Diagram
7
1
R25
R1
R16
R15
C7
8
BALANCE
R2
QP32
QP37
R20
QP43
QP35
D1
QN45
R21
R17
QP38
QP44
QP55
5
C5
QN19
D8
QN46
C4
QN13
QP56
QN47
R1A
R7
QP26
R3
QP26
6
OUTPUT
QP36A
D41
QP40
QN2A
QN1A
QN18
QN1
QN42
QN6
QN42A
R5
R6
R8
R10
QN10
FN2910.10
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QN11
4
3
S
S
QN50
QN49
QN39
2
C3
QN5
QN48
QN25
D60
QP30
R19
R4
QN24
QN57
R13
D34
QN7
D23
D59
R12
R18
D22
Z58
QN20
D33
C2
R22
R23
R11
QP21
HA-5147
QP
27
QN29
QP16
QN4
D54
QP36
QN2
QN12
D9
D53
R9
R24
C1
QN52
C6
QN3
QN15
QP17
QN51
R14
QN14
R2A
HA-5147
Application Information
V+
RP
10k
8
1
7
-
2
NOTE: Tested offset adjustment range is
|VOS +1mV| minimum referred to
output. Typical range is ±4mV with
RP = 10kΩ.
6
+
5
3
4
FIGURE 5. SUGGESTED OFFSET VOLTAGE ADJUSTMENT
CS
R1
+
-
R2
R1
-
R3
R2
+
R3
CS
NOTE: Low resistances are preferred for low noise applications as a 1kΩ resistor has 4nV/Hz of thermal noise. Total resistances of greater than 10kΩ
on either input can reduce stability. In most high resistance applications, a few picofarads of capacitance across the feedback resistor will improve
stability.
FIGURE 6. SUGGESTED STABILITY CIRCUITS
Typical Performance Curves
TA = +25°C, VSUPPLY = ±15V, unless otherwise specified.
12
30
10
0
-10
-20
-30
-40
10
5
8
4
6
3
NOISE VOLTAGE
4
2
-50
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 7. TYPICAL OFFSET VOLTAGE vs TEMPERATURE
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6
0
2
1
NOISE CURRENT
1
10
100
1k
10k
FREQUENCY (Hz)
CURRENT NOISE (pA/Hz)
VOLTAGE NOISE (nV/Hz)
OFFSET VOLTAGE (µV)
20
-60
-60
6
VS = ±15V, TA = +25°C
100k
0
1M
FIGURE 8. NOISE CHARACTERISTICS
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HA-5147
Typical Performance Curves
TA = +25°C, VSUPPLY = ±15V, unless otherwise specified. (Continued)
0.14
VS = ±15V
TA = +25°C
160
0.12
0.1
120
0.08
CMRR (dB)
0.06
0.04
80
40
0.02
0
4
6
8
10
12
14
16
18
0
10
20
100
1k
10k
SUPPLY VOLTAGE (±V)
FIGURE 9. NOISE vs SUPPLY VOLTAGE
1M
10M
FIGURE 10. CMRR vs FREQUENCY
120
0
TA = +25°C
100
GAIN (dB)
20
40
PSRR (dB)
100k
FREQUENCY (Hz)
60
80
GAIN
60
40
0
20
80
PHASE
0
90
100
120
180
10
100
1k
10k
100k
1M
100
1k
10k
FREQUENCY (Hz)
SLEW RATE NORMALIZED TO 1 AT 30oC
AVOL (100kV/V) AND VOUT (V)
1.05
AVOL
15
14
13
VOUT
12
11
10
9
8
7
6
5
4
0
4
2
6
8
LOAD RESISTANCE (kΩ)
FIGURE 13. AVOL AND VOUT vs LOAD RESISTANCE
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7
10M
100M
FIGURE 12. OPEN LOOP GAIN AND PHASE vs FREQUENCY
TA = +25°C
16
1M
FREQUENCY (Hz)
FIGURE 11. PSRR vs FREQUENCY
17
100k
PHASE (DEGREES)
INPUT NOISE VOLTAGE (µVP-P)
TA = +25°C
10
1.04
RL = 2k, CL = 50pF, TA = +25°C
1.03
1.02
1.01
1.0
0.99
0.98
0.97
0.96
0.95
-60
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 14. NORMALIZED SLEW RATE vs TEMPERATURE
FN2910.10
November 6, 2015
HA-5147
Typical Performance Curves
TA = +25°C, VSUPPLY = ±15V, unless otherwise specified. (Continued)
28
RL = 2k, CL = 50pF, TA = +25°C
VO = 0V, VS = ±15V
2.82
24
OUTPUT VOLTAGE (VP-P)
SUPPLY CURRENT (mA)
2.80
2.78
2.76
2.74
2.72
2.70
16
12
8
4
2.68
-55
25
125
TEMPERATURE (°C)
0
0.4M
0.8M
1.2M
1.6M
2M
FREQUENCY (Hz)
FIGURE 15. SUPPLY CURRENT vs TEMPERATURE
FIGURE 16. VOUT MAX (UNDISTORTED SINEWAVE OUTPUT) vs
FREQUENCY
RL = 2k, CL = 50pF, TA = +25°C
40
30
GAIN
20
10
0
0
PHASE
90
180
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FIGURE 17. CLOSED LOOP GAIN AND PHASE vs FREQUENCY
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PHASE (DEGREES)
GAIN (dB)
20
ACL = 25,000V/V; EN = 0.08µVP-P RTI
Horizontal Scale = 1s/DIV; Vertical Scale = 0.02µV/DIV
FIGURE 18. PEAK-TO-PEAK NOISE VOLTAGE (0.1Hz TO 10Hz)
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HA-5147
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
104 mils x 65 mils x 19 mils
2650µm x 1650µm x 483µm
Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.)
Silox Thickness: 12kÅ ±2kÅ
Nitride Thickness: 3.5kÅ ±1.5kÅ
METALLIZATION:
TRANSISTOR COUNT:
Type: Al, 1% Cu
Thickness: 16kÅ ±2kÅ
63
SUBSTRATE POTENTIAL (POWERED UP):
PROCESS:
V-
Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5147
BAL
BAL
-IN
V+
+IN
OUT
V-
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FN2910.10
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HA-5147
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE
REVISION
November 6, 2015
FN2910.10
CHANGE
Updated to newest standards and layout.
Figure 18 page 8. Changed Vertical Scale = 0.002µV/Div to: Vertical Scale = 0.02µV/DIV
Added Revision History and About Intersil sections to page 10
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
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HA-5147
Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A)
LEAD FINISH
c1
8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
-D-
-A-
BASE
METAL
(c)
E
M
-Bbbb S
C A-B S
Q
-C-
SEATING
PLANE
S1
b2
b
ccc M
C A-B S
eA/2
-
0.200
-
5.08
-
0.026
0.36
0.66
2
b1
0.014
0.023
0.36
0.58
3
b2
0.045
0.065
1.14
1.65
-
b3
0.023
0.045
0.58
1.14
4
c
0.008
0.018
0.20
0.46
2
c1
0.008
0.015
0.20
0.38
3
D
-
0.405
-
10.29
5
E
0.220
0.310
5.59
7.87
5
c
aaa M C A - B S D S
D S
NOTES
0.014
eA
e
MAX
b

A A
MIN
A
A
L
MILLIMETERS
MAX
M
(b)
D
BASE
PLANE
MIN
b1
SECTION A-A
D S
INCHES
SYMBOL
NOTES:
1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
e
0.100 BSC
2.54 BSC
-
eA
0.300 BSC
7.62 BSC
-
eA/2
0.150 BSC
3.81 BSC
-
L
0.125
0.200
3.18
5.08
-
Q
0.015
0.060
0.38
1.52
6
S1
0.005
-
0.13
-
7
105o
90o
105o
-
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.

90o
aaa
-
0.015
-
0.38
-
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
bbb
-
0.030
-
0.76
-
ccc
-
0.010
-
0.25
-
M
-
0.0015
-
0.038
2, 3
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b2.
N
8
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
8
8
Rev. 0 4/94
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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FN2910.10
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