DATASHEET

Single, Dual, and Quad Micropower, Low Drift, RRIO
Operational Amplifiers
ISL28130, ISL28230, ISL28430
Features
The ISL28130, ISL28230 and ISL28430 are single, dual and
quad micropower, low offset drift operational amplifiers that
are optimized for single and dual supply operation from 1.8V
to 5.5V and ±0.9V to ±2.75V. Their low supply current of 20µA
and rail-to-rail input/output enable the ISL28130, ISL28230,
and ISL28430 to be an excellent general-purpose op amp for a
range of applications. The ISL28130, ISL28230 and ISL28430
are ideal for handheld devices that operate off 2AA or single
Li-ion batteries.
• Low input offset voltage . . . . . . . . . . . . . . . . . . . . . 40µV, Max.
The ISL28130 is available in industry standard pinouts for 5 Ld
SOT-23, 5 Ld SC70 and 8 Ld SOIC packages. The ISL28230 is
available in industry standard pinouts for 8 Ld MSOP, 8 Ld
SOIC and 8 Ld DFN packages. The ISL28430 is available in
14 Ld TSSOP and 14 Ld SOIC packages. Commercial devices
operate over the temperature range of 0°C to 70°C. Full
temperature range devices operate over the temperature
range of -40°C to 125°C.
• Rail-to-rail inputs and output
• Low offset drift . . . . . . . . . . . . . . . . . . . . . . . . .150nV/°C, Max.
• Input bias current. . . . . . . . . . . . . . . . . . . . . . . . . . 250pA, Max.
• Quiescent current (per amplifier) . . . . . . . . . . . . . . .20µA, Typ.
• Single supply range . . . . . . . . . . . . . . . . . . . . . .+1.8V to +5.5V
• Dual supply range . . . . . . . . . . . . . . . . . . . . . .±0.9V to ±2.75V
• Low noise (0.01Hz to 10Hz) . . . . . . . . . . . . . . . . 1.1µVP-P, Typ.
Applications
• Bi-directional current sense
• Temperature measurement
• Medical equipment
• Electronic weigh scales
• Precision/strain gauge sensor
• Precision regulation
• Low Ohmic current sense
• High gain analog front ends
400
VREF
499k
4.99k
+ V+
0.1
-
VSENSE
OUT
V499k
4.99k
GND
I-SENSE-
BI-DIRECTIONAL CURRENT SENSE AMPLIFIER
FIGURE 1. TYPICAL APPLICATION DIAGRAM
February 13, 2014
FN7623.7
1
INPUT BIAS CURRENT (pA)
V+
+1.8V TO +5.5V
I-SENSE+
300
200
VS = ±2.5V
VS = ±0.9V
100
0
-100
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
FIGURE 2. IB vs TEMPERATURE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2010-2013, 2014. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL28130, ISL28230, ISL28430
Ordering Information
PART NUMBER
(Notes 3, 4)
PART
MARKING
TEMP RANGE
(°C)
TEMPERATURE
GRADE
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL28130CHZ-T7 (Note 2)
BDPA (Note 5)
0 to +70
Commercial
5 Ld SOT-23
P5.064A
ISL28130CHZ-T7A (Note 2)
BDPA (Note 5)
0 to +70
Commercial
5 Ld SOT-23
P5.064A
ISL28130FHZ-T7 (Note 2)
BEFA (Note 5)
-40 to +125
Full
5 Ld SOT-23
P5.064A
ISL28130FHZ-T7A (Note 2)
BEFA (Note 5)
-40 to +125
Full
5 Ld SOT-23
P5.064A
ISL28130CEZ-T7 (Note 2)
BLA (Note 5)
0 to +70
Commercial
5 Ld SC-70
P5.049
ISL28130CEZ-T7A (Note 2)
BLA (Note 5)
0 to +70
Commercial
5 Ld SC-70
P5.049
ISL28130FEZ-T7 (Note 2)
BNA (Note 5)
-40 to +125
Full
5 Ld SC-70
P5.049
ISL28130FEZ-T7A (Note 2)
BNA (Note 5)
-40 to +125
Full
5 Ld SC-70
P5.049
ISL28230CUZ (Note 1)
8230Z
0 to +70
Commercial
8 Ld MSOP
M8.118A
ISL28230FUZ (Note 1)
8230F
-40 to +125
Full
8 Ld MSOP
M8.118A
ISL28230CBZ (Note 1)
28230 CBZ
0 to +70
Commercial
8 Ld SOIC
M8.15E
ISL28230FBZ (Note 1)
28230 FBZ
-40 to +125
Full
8 Ld SOIC
M8.15E
ISL28230CRZ (Note 1)
230Z
0 to +70
Commercial
8 Ld 3mmx3mm DFN
L8.3x3J
ISL28230FRZ (Note 1)
230F
-40 to +125
Full
8 Ld 3mmx3mm DFN
L8.3x3J
ISL28430CBZ (Note 1)
28430 CBZ
0 to +70
Commercial
14 Ld SOIC
MDP0027
ISL28430FBZ (Note 1)
28430 FBZ
-40 to +125
Full
14 Ld SOIC
MDP0027
ISL28430CVZ (Note 1)
28430 CVZ
0 to +70
Commercial
14 Ld TSSOP
MDP0044
ISL28430FVZ (Note 1)
28430 FVZ
-40 to +125
Full
14 Ld TSSOP
MDP0044
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. Please refer to TB347 for details on reel specifications.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
4. For Moisture Sensitivity Level (MSL), please see device information page for ISL28130, ISL28230, ISL28430. For more information on MSL please
see Tech Brief TB363.
5. The part marking is located on the bottom of the part.
2
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Pin Configurations
ISL28130
(8 LD SOIC)
TOP VIEW
ISL28130
(5 LD SOT-23)
TOP VIEW
1
V-
2
IN+
3
5
V+
+ 4
IN-
NC 1
8 NC
IN- 2
7 V+
- +
OUT
IN+ 3
6 OUT
V- 4
ISL28230
(8 LD MSOP, SOIC)
TOP VIEW
ISL28130
(5 LD SC-70)
TOP VIEW
IN+
1
V-
2
IN-
3
5 NC
5
V+
+
-
OUT_A 1
IN-_A 2
4
OUT
8 V+
7 OUT_B
- +
IN+_A 3
+ -
V- 4
2
3
V-
4
7 OUT_B
IN-_A 2
6 IN-_B
IN+_A 3
5 IN+_B
V+ 4
- +
+ -
11 V-
IN+_B 5
IN-_B 6
OUT_B 7
3
13 IN-_D
12 IN+_D
10 IN+_C
+ -
IN+_A
PAD
14 OUT_D
OUT_A 1
- +
IN-_A
8 V+
1
5 IN+_B
ISL28430
(14 LD TSSOP, SOIC)
TOP VIEW
ISL28230
(8 LD DFN)
TOP VIEW
OUT_A
6 IN-_B
9
IN-_C
8
OUT_C
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Pin Descriptions
ISL28130
(5 Ld SOT-23)
ISL28130
(8 Ld SOIC)
ISL28130
(5 LD SC-70)
3
3
1
ISL28430
ISL28230
(14 Ld
PIN
(8 Ld MSOP,
SOIC, DFN) TSSOP, SOIC) NAME
3
5
-
3
5
10
12
FUNCTION
Non-inverting input
IN+
IN+_A
IN+_B
IN+_C
IN+_D
EQUIVALENT CIRCUIT
V+
+
IN-
IN+
VCircuit 1
2
4
2
4
2
3
1
6
4
11
V-
Negative supply
2
6
9
13
ININ-_A
IN-_B
IN-_C
IN-_D
Inverting input
2
6
1
7
-
1
7
8
14
OUT Output
OUT_A
OUT_B
OUT_C
OUT_D
4
(See “Circuit 1”)
V+
OUT
VCircuit 2
5
7
5
8
4
V+
Positive supply
-
1, 5, 8
-
-
-
NC
Not Connected – This pin is not electrically connected internally.
-
-
-
PAD
-
Paddle
4
Thermal Pad.
Connect to most
negative supply.
DFN packages only.
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Absolute Maximum Ratings
Thermal Information
Max Supply Voltage V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6.5V
Max Voltage VIN to GND . . . . . . . . . . . . . . . . . . . . (V- - 0.3V) to (V+ + 0.3V)V
Max Input Differential Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5V
Max Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Max Voltage VOUT to GND (10s) . . . . . . . . . . . . . . (V- - 0.5V) to (V+ + 0.5V)V
ESD Tolerance (ISL28130)
Human Body Model (Tested at JESD22-A114F) . . . . . . . . . . . . . . . 3000V
Machine Model (Tested at JESD22-A115B) . . . . . . . . . . . . . . . . . . . 200V
Charged Device Model (Tested at JESD22-C110D) . . . . . . . . . . . . 1500V
ESD Tolerance (ISL28230, ISL28430)
Human Body Model (Tested at JESD22-A114F) . . . . . . . . . . . . . . . 4000V
Machine Model (Tested at JESD22-A115B) . . . . . . . . . . . . . . . . . . . 400V
Charged Device Model (Tested at JESD22-C110D) . . . . . . . . . . . . 2000V
Latch-Up (Passed Per JESD78B). . . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
5 Ld SOT-23 (Notes 6, 8) . . . . . . . . . . . . . . .
225
110
5 Ld SC70 (Notes 6, 8). . . . . . . . . . . . . . . . .
206
146
8 Ld SOIC (ISL28130) (Notes 6, 8) . . . . . . .
135
95
8 Ld MSOP (Notes 6, 8) . . . . . . . . . . . . . . . .
180
65
8 Ld SOIC (ISL28230) (Notes 6, 8). . . . . . .
125
90
8 Ld DFN (Notes 7, 9). . . . . . . . . . . . . . . . . .
53
12
14 Ld TSSOP (Notes 6, 8) . . . . . . . . . . . . . .
110
40
14 Ld SOIC (Notes 6, 8) . . . . . . . . . . . . . . . .
75
47
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range
Full Grade Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Commercial Grade Devices. . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
6. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
7. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
8. For JC, the “case temp” location is taken at the package top center.
9. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
entire operating temperature range.
V+ = 5V, V- = 0V, VCM = 2.5V, TA = +25°C, RL = 10kΩ, unless otherwise specified. Boldface limits apply over the
(Note 10)
TYP
MAX
(Note 10)
UNIT
Vs = 1.8V to 5.5V
-40
±5
40
µV
Vs = 1.8 to 5.5V;
T = 0°C to +70°C
-46.8
46.8
µV
-55
55
µV
150
nV/°C
MIN
PARAMETER
DESCRIPTION
CONDITIONS
DC SPECIFICATIONS
VOS
Input Offset Voltage
Vs = 1.8V to 5.5V;
T = -40°C to +125°C
TCVOS
Input Offset Voltage Temperature Coefficient
IOS
Input Offset Current
-60
pA
TCIOS
Input Offset Current Temperature Coefficient
0.11
pA/°C
IB
Input Bias Current
Common Mode Input
Voltage Range
CMRR
Common Mode Rejection Ratio
-150
20
T = 0°C to +70°C
-250
250
pA
T = -40°C to +125°C
-700
700
pA
Guaranteed by CMRR
-0.1
5.1
V
VCM = -0.1V to 5.1V
110
125
dB
105
PSRR
Power Supply Rejection Ratio
Vs = 2.0V to 5.5V
105
dB
138
dB
105
VOH
Output Voltage Swing, High
VOL
Output Voltage Swing, Low
5
4.950
dB
4.981
18
V
50
mV
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Electrical Specifications
V+ = 5V, V- = 0V, VCM = 2.5V, TA = +25°C, RL = 10kΩ, unless otherwise specified. Boldface limits apply over the
entire operating temperature range. (Continued)
MIN
PARAMETER
DESCRIPTION
CONDITIONS
AOL
Open Loop Gain
RL = 1MΩ
V+
Supply Voltage
Guaranteed by VOS
IS
Supply Current, Per Amplifier
RL = OPEN
(Note 10)
TYP
MAX
(Note 10)
150
1.8
20
UNIT
dB
5.5
V
25
µA
35
µA
ISC+
Output Source Short Circuit Current
RL = Short V-
15
mA
ISC-
Output Sink Short Circuit Current
RL = Short V+
-15
mA
GBWP
Gain Bandwidth Product
AV = 100, RF = 100kΩRG = 1kΩ,
RL = 10kΩto VCM
400
kHz
eN VP-P
Peak-to-Peak Input Noise Voltage
f = 0.01Hz to 10Hz
1.1
µVP-P
eN
Input Noise Voltage Density
f = 1kHz
65
nV/(Hz)
iN
Input Noise Current Density
f = 1kHz
72
fA/(Hz)
f = 10Hz
80
fA/(Hz)
f = 1MHz
1.6
pF
1.12
pF
0.2
V/µs
0.1
V/µs
1.1
µs
1.1
µs
20
µs
30
µs
35
µs
10.5
µs
AC SPECIFICATIONS
Cin
Differential Input Capacitance
Common Mode Input Capacitance
TRANSIENT RESPONSE
SR
Positive Slew Rate
VOUT = 1V to 4V, RL = 10kΩ
Negative Slew Rate
tr, tf, Small Signal
Rise Time, tr 10% to 90%
Fall Time, tf 10% to 90%
tr, tf Large Signal
Rise Time, tr 10% to 90%
Fall Time, tf 10% to 90%
AV = +1, VOUT = 0.1VP-P RF = 0Ω,
RL = 10kΩ,CL = 1.2pF
AV = +1, VOUT = 2VP-P RF = 0Ω,
RL = 10kΩ, CL = 1.2pF
ts
Settling Time to 0.1%, 2VP-P Step
AV = +1, RF = 0Ω,RL = 10kΩ,
CL = 1.2pF
trecover
Output Overload Recovery Time, Recovery to
90% of Output Saturation
AV = +2, RF = 10kΩ, RL = Open
CL = 3.7pF
NOTE:
10. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
6
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Typical Performance Curves
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, T = +25°C, unless otherwise specified.
400
400
300
300
200
INPUT BIAS CURRENT (pA)
INPUT BIAS CURRENT (pA)
n
VS = ±2.5V
100
VS = ±0.9V
0
-100
-50
-25
0
25
50
75
100
200
VS = ±2.5V
VS = ±0.9V
100
0
-100
-50
125
-25
0
TEMPERATURE (°C)
40
75
100
125
100
125
40
PER AMPLIFIER
PER AMPLIFIER
35
SUPPLY CURRENT (µA)
SUPPLY CURRENT (µA)
50
FIGURE 4. IB- vs TEMPERATURE
FIGURE 3. IB+ vs TEMPERATURE
30
25
20
15
10
-50
-25
0
25
50
75
100
35
30
25
20
15
10
-50
125
-25
0
TEMPERATURE (°C)
25
50
75
TEMPERATURE (°C)
FIGURE 6. SUPPLY CURRENT vs TEMPERATURE, Vs = ±2.5V
FIGURE 5. SUPPLY CURRENT vs TEMPERATURE, Vs = ±0.9V
21
200
OPEN LOOP GAIN (dB)/PHASE (°)
SUPPLY CURRENT (µA)
25
TEMPERATURE (°C)
20
19
18
17
16
1.5
VIN = 0V
RL = OPEN
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
FIGURE 7. SUPPLY CURRENT vs SUPPLY VOLTAGE
7
6.0
150
PHASE
100
50
GAIN
0
-50
RL = 10M
CL = 100pF
SIMULATION
-100
0.1m 1m 10m 100m
1
10
100
1k
10k 100k 1M 10M
FREQUENCY (Hz)
FIGURE 8. FREQUENCY RESPONSE vs OPEN LOOP GAIN,
RL = 10MΩ
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Typical Performance Curves
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, T = +25°C, unless otherwise specified.
1
1
-1
RL = 1k
-2
-3
RL = 10k
-4
RL = 49.9k
RL = OPEN
-5
VS = ±0.9V
CL = 3.7pF
AV = +1
VOUT = 10mVP-P
-6
-7
-8
-9
100
RL = 1k
-1
-2
RL = 10k
-4
RL = 49.9k
-5
VS = ±2.5V
CL = 3.7pF
AV = +1
VOUT = 10mVP-P
-6
-7
-8
1k
10k
100k
FREQUENCY (Hz)
1M
-9
100
10M
-1
NORMALIZED GAIN (dB)
0
8
RF = RG = 1k
7
6
RF = RG = 10k
5
4
3
2
1
0
100
RF = RG = 100k
VS = ±2.5V
RL = 100k
CL = 3.7pF
AV = +2
VOUT = 10mVP-P
1k
10k
100k
FREQUENCY (Hz)
1M
10M
-3
VOUT = 500mV
-4
-5
VOUT = 250mV
-6
VS = ±2.5V
-7 R = OPEN
L
-8 CL = 3.7pF
AV = 1
-9
100
1k
RG = 100, RF = 100k
VOUT = 10mV
10k
100k
FREQUENCY (Hz)
1M
10M
0
RG = 1k, RF = 100k
AV = 100
V+ = 5V
CL = 3.7pF
RL = 100k
VOUT = 10mVP-P
30
AV = 10
RG = 10k, RF = 100k
10
AV = 1
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FIGURE 13. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
8
-1
-2
VS = ±0.9V
-3
-4
VS= ±1.5V
-5
VS = ±2.75V
-6
-7
-8
RG = OPEN, RF = 0
100
NORMALIZED GAIN (dB)
GAIN (dB)
VOUT = 100mV
1
AV = 1000
50
-10
10
10M
FIGURE 12. GAIN vs FREQUENCY vs VOUT
70
0
1M
VOUT = 1V
-2
FIGURE 11. GAIN vs FREQUENCY vs FEEDBACK RESISTOR VALUES
RF/RG
20
10k
100k
FREQUENCY (Hz)
1
9
40
1k
FIGURE 10. GAIN vs FREQUENCY vs RL, VS = ±2.5V
10
60
RL = OPEN
-3
FIGURE 9. GAIN vs FREQUENCY vs RL, VS = ±0.9V
GAIN (dB)
RL = 100k
0
RL = 100k
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
0
RL = 100k
CL = 3.7pF
AV = +1
VOUT = 10mVP-P
-9
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
FIGURE 14. GAIN vs FREQUENCY vs SUPPLY VOLTAGE
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Typical Performance Curves
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, T = +25°C, unless otherwise specified.
8
5.0
CL = 824pF
4.5
CL = 474pF
4
4.0
CL = 224pF
2
3.5
SIGNAL (V)
NORMALIZED GAIN (dB)
6
0
-2
CL = 104pF
-4
3.0
2.5
2.0
CL = 51pF
-6 VS = ±2.5V
RL = 100k
-8 AV = +1
V
= 10mVP-P
-10 OUT
100
1k
RL = 100k
CL = 3.7pF
AV = 1
VOUT = 4VP-P
1.5
1.0
CL = 3.7pF
0.5
10k
100k
1M
0
10M
0
50
100
150
FREQUENCY (Hz)
FIGURE 15. GAIN vs FREQUENCY vs CL
400
0.12
0.10
SIGNAL (V)
0.8
SIGNAL (V)
350
0.14
1.0
0.6
0.4
RL = 100k
CL = 3.7pF
AV = 1
VOUT = 1VP-P
0.2
0
10
20
30
40
50
60
TIME (µs)
0.08
0.06
5.000
0.02
70
80
90
0
0
100
5
10
15
20
25
TIME (µs)
30
35
40
FIGURE 18. SMALL SIGNAL STEP RESPONSE (100mV)
40
VS = 5V
RL = 10kΩ
35
4.990
30
VOL (mV)
4.995
4.985
4.980
4.975
-50
RL = 100k
CL = 3.7pF
AV = 1
VOUT = 100mVP-P
0.04
FIGURE 17. LARGE SIGNAL STEP RESPONSE (1V)
VOH (V)
300
FIGURE 16. LARGE SIGNAL STEP RESPONSE (4V)
1.2
0
200
250
TIME (µs)
VS = 5V
RL = 10kΩ
25
20
-25
0
25
50
75
TEMPERATURE (°C)
FIGURE 19. VOH vs TEMPERATURE
9
100
125
15
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
FIGURE 20. VOL vs TEMPERATURE
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Typical Performance Curves
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, T = +25°C, unless otherwise specified.
-20
-20
Vs = ±0.9V
RL = OPEN
CL = 3.7pF
AV = 1
VOUT = 1VP-P
-60
Vs = ±2.5V
RL = OPEN
CL = 3.7pF
AV = 1
VOUT = 1VP-P
-40
CROSSTALK (dB)
CROSSTALK (dB)
-40
-80
-100
-120
-60
-80
-100
-120
-140
1k
10k
100k
FREQUENCY (Hz)
FIGURE 21. CROSSTALK vs FREQUENCY, V S = ±0.9V
10
1M
-140
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 22. CROSSTALK vs FREQUENCY, VS = ±2.5V
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Applications Information
Layout Guidelines for High Impedance Inputs
Functional Description
To achieve maximum performance from the high input impedance
and low offset voltage of the ISL28130, ISL28230 and ISL28430
amplifiers, care should be taken in the circuit board layout. The PC
board surface must remain clean and free of moisture to avoid
leakage currents between adjacent traces. Surface coating of the
circuit board reduces surface moisture and provides a humidity
barrier, reducing parasitic resistance on the board.
The ISL28130, ISL28230 and ISL28430 are low offset and low
drift operational amplifiers with a very high open loop gain
(150dB) and rail-to-rail input/output. They are designed to
operate on a single supply range of 1.8V to 5.5V or a dual supply
range of ±0.9V to ±2.75V while consuming only 20µA of supply
current per channel. The ISL28130, ISL28230 and ISL28430
have a 400kHz gain-bandwidth.
The high open loop gain, low offset voltage, high bandwidth and
low 1/f noise make the ISL28130, ISL28230 and ISL28430
ideal for precision applications.
Rail-to-rail Input and Output (RRIO)
The RRIO CMOS amplifier uses parallel input PMOS and NMOS
that enable the inputs to swing 100mV beyond either supply rail.
The inverting and non-inverting inputs do not have back-to-back
input clamp diodes and are capable of maintaining high input
impedance at high differential input voltages. This is effective in
eliminating output distortion caused by high slew rate input
signals.
The output stage uses common source connected PMOS and
NMOS devices to achieve rail-to-rail output drive capability with
15mA current limit and the capability to swing to within 50mV of
either rail while driving a 10kΩ load.
IN+ and IN- Protection
High Gain, Precision DC-Coupled Amplifier
The circuit in Figure 24 implements a single-stage DC-coupled
amplifier with an input DC sensitivity of under 100nV that is only
possible using a low VOS amplifier with high open loop gain. High
gain DC amplifiers operating from low voltage supplies are not
practical using typical low offset precision op amps. For example,
consider a typical precision amplifier in a gain of 10kV/V. A low
offset op amp with ±100µV VOS and 0.5µV/°C offset drift yields
a DC error of >1V, with an additional 5mV/°C of
temperature-dependent error. This amount of error makes it
difficult to resolve DC input voltage changes in the mV range.
The ±40µV max VOS and 150nV/°C temperature drift of the
ISL28130, ISL28230, and ISL28430 produce a
temperature-stable maximum DC output error of only ±400mV,
with a maximum output temperature drift of 1.5mV/°C. The
additional benefit of a very low 1/f noise corner frequency and
some feedback filtering allows DC voltages and voltage
fluctuations well below 10µV to be easily detected with a simple,
single-stage amplifier.
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. For applications in which
either input is expected to exceed the rails by 0.5V, an external
series resistor must be used to ensure the input currents never
exceed 20mA (see Figure 23).
CF
0.018µF
1MΩ
+2.5V
VIN
VIN
RIN
VOUT
RL
+
100Ω
1MΩ
VOUT
RL
+
100Ω
-2.5V
ACL = 10kV/V
FIGURE 23. INPUT CURRENT LIMITING
FIGURE 24. HIGH GAIN, PRECISION DC-COUPLED AMPLIFIER
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest revision.
DATE
REVISION
February 13, 2014
FN7623.7
CHANGE
November 22, 2013
FN7623.6
Removed “Coming Soon” from ISL28430FBZ in “Ordering Information” on page 2.
November 8, 2012
FN7623.5
Removed “Coming Soon” from ISL28130FHZ-T7, ISL28130FEZ-T7, ISL28130CBZ, ISL28130FBZ,
ISL28230FUZ, ISL28230FRZ, ISL28430FVZ, ISL28230FRZ, ISL28130CBZ and ISL28130FBZ in “Ordering
Information” on page 2.
February 10, 2012
FN7623.4
Removed “Coming Soon” from ISL28230FBZ in “Ordering Information” on page 2.
June 13, 2011
FN7623.3
• Changed minimum operating supply voltage from +1.65V to +1.8V throughout datasheet. Modified Electrical
Specifications table, beginning on page 5, for all specs related at +1.65V to +1.8V, and all other text references
accordingly.
• On page 1, paragraph 2, last sentence: changed from “All devices operate over the temperature range of 40°C to +125°C.” to “Commercial temp range devices operate over the temperature range of 0°C to 70°C. Full
temp range devices operate over the temperature range of -40°C to 125°C.”
• On page 2, Ordering Information: added “Coming Soon” to all devices with -40°C to 125°C temp range and
to ISL28130CBZ at 0°C to +70°C temp range.
March 1, 2011
FN7623.2
-Ordering Information Table: Removed all 'Coming Soon' under part numbers (except for ISL28130FBZ and
ISL28230FRZ), added part markings for all 125°C grade parts. Added new data column called 'TEMPERATURE
GRADE' to distinguish between 'Commercial' and 'Full' temp grades.
- Electrical Specifications Table: added new text to common conditions: “Boldface limits apply over the entire
operating temperature range”. This note allows bold face limits to apply both to commercial and full grade temp
devices.
- Added over temperature 0°C to 70°C spec for Vos in addition to -40°C to 125°C Vos spec. Original Vos spec
of 46.8µV for -40°C to 125°C is a typo based on a TCVos of 150nV/C. -40°C to 125°C limit corrected as 55µV
over temp.
December 7, 2010
FN7623.1
Corrected Thermals for DFN package in “Tja from 125 to 53, “Tjc from 90 to 12”
Ordering information table on page 2: Added part number ISL28230FRZ
- Absolute Maximum Ratings table on page 5: changed Max Voltage VOUT to GND (10s) : from ±3.0V
to: (V- - 0.5V) to (V+ + 0.5V)V..
December 3, 2010
Removed Part Markings from Full temp grade parts and changed to TBD until availability is validated.
December 2, 2010
-Updated front page text to add DFN packaging and extended temp range -40°C to +125°C
-Removed previous Ib vs Temp plot and added new -40°C to +125°C Ib vs Temp plot on front page.
-Updated ordering information table by adding a full temp range option to all parts and temp range column. Also
added in DFN part to ordering table. All full temp parts are stamped Coming Soon.
-Added DFN package to Pin Configurations table.
-Added -40°C to +125°C temp range under Operating Conditions page 5.
-Added the testing standards performance information to the ESD ratings in Abs Max Table
-Added new Input Bias Current Ib spec of 700pA MIN/MAX in Electrical Spec table for -40°C to +125°C temp
range
-Revised Note 10 for Electrical Spec table as: “Compliance to datasheet limits is assured by one or more
methods: production test, characterization and/or design.”
-Updated all curves in the datasheet with 0°C to +70°C temp range to -40°C to +125°C temp range.
-Added DFN package L8.3x3J outline drawing to the end of datasheet.
October 19, 2010
On page 6 changed “Supply Current, Per Amplifier” from a typical of 18µA to 20µA to comply with front page.
August 17, 2010
FN7623.0
Initial Release
About Intersil
Intersil Corporation is a leader in the design and manufacture of high-performance analog, mixed-signal and power management
semiconductors. The company's products address some of the largest markets within the industrial and infrastructure, personal
computing and high-end consumer markets. For more information about Intersil, visit our website at www.intersil.com.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting
www.intersil.com/en/support/ask-an-expert.html. Reliability reports are also available from our website at
http://www.intersil.com/en/support/qualandreliability.html#reliability
12
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Small Outline Transistor Plastic Packages (SC70-5)
P5.049
D
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
VIEW C
e1
INCHES
5
4
E
CL
1
2
CL
3
E1
b
e
CL
0.20 (0.008) M
C
C
CL
A
A2
SEATING
PLANE
A1
-C-
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.031
0.043
0.80
1.10
-
A1
0.000
0.004
0.00
0.10
-
A2
0.031
0.039
0.80
1.00
-
b
0.006
0.012
0.15
0.30
b1
0.006
0.010
0.15
0.25
c
0.003
0.009
0.08
0.22
6
c1
0.003
0.009
0.08
0.20
6
D
0.073
0.085
1.85
2.15
3
E
0.071
0.094
1.80
2.40
-
E1
0.045
0.053
1.15
1.35
3
e
e1
L
0.10 (0.004) C
WITH
PLATING
b1
0.0256 Ref
0.0512 Ref
0.010
c1
0.018
-
1.30 Ref
0.26
-
0.46
0.017 Ref.
0.420 Ref.
L2
0.006 BSC
0.15 BSC
0o
N
c
0.65 Ref
L1

b
MILLIMETERS
8o
0o
5
4
-
8o
-
5
5
R
0.004
-
0.10
-
R1
0.004
0.010
0.15
0.25
Rev. 3 7/07
NOTES:
BASE METAL
1. Dimensioning and tolerances per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO-203AA.
4X q1
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
R1
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
R
GAUGE PLANE
SEATING
PLANE
L
C
L1
a
L2
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.
4X q1
VIEW C
0.4mm
0.75mm
2.1mm
0.65mm
TYPICAL RECOMMENDED LAND PATTERN
13
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Package Outline Drawing
P5.064A
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
Rev 0, 2/10
1.90
0-3°
D
A
0.08-0.20
5
4
PIN 1
INDEX AREA
2.80
3
1.60
3
0.15 C D
2x
2
5
(0.60)
0.20 C
2x
0.95
SEE DETAIL X
B
0.40 ±0.05
3
END VIEW
0.20 M C A-B D
TOP VIEW
10° TYP
(2 PLCS)
2.90
5
H
0.15 C A-B
2x
C
1.45 MAX
1.14 ±0.15
0.10 C
SIDE VIEW
SEATING PLANE
(0.25) GAUGE
PLANE
0.45±0.1
0.05-0.15
4
DETAIL "X"
(0.60)
(1.20)
NOTES:
(2.40)
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to ASME Y14.5M-1994.
3.
Dimension is exclusive of mold flash, protrusions or gate burrs.
4.
Foot length is measured at reference to guage plane.
5.
This dimension is measured at Datum “H”.
6.
Package conforms to JEDEC MO-178AA.
(0.95)
(1.90)
TYPICAL RECOMMENDED LAND PATTERN
14
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Package Outline Drawing
M8.118A
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP)
Rev 0, 9/09
3.0±0.1
8
A
0.25
CAB
3.0±0.1
4.9±0.15
DETAIL "X"
1.10 Max
PIN# 1 ID
B
SIDE VIEW 2
1
0.18 ± 0.05
2
0.65 BSC
TOP VIEW
0.95 BSC
0.86±0.09
H
GAUGE
PLANE
C
0.25
SEATING PLANE
0.33 +0.07/ -0.08
0.08 C A B
0.10 ± 0.05
3°±3°
0.10 C
0.55 ± 0.15
DETAIL "X"
SIDE VIEW 1
5.80
NOTES:
4.40
3.00
1.
Dimensions are in millimeters.
2.
Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSE Y14.5m-1994.
3.
Plastic or metal protrusions of 0.15mm max per side are not
included.
4.
Plastic interlead protrusions of 0.25mm max per side are not
included.
5.
Dimensions “D” and “E1” are measured at Datum Plane “H”.
6.
This replaces existing drawing # MDP0043 MSOP 8L.
0.65
0.40
1.40
TYPICAL RECOMMENDED LAND PATTERN
15
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Thin Shrink Small Outline Package Family (TSSOP)
0.25 M C A B
D
MDP0044
A
THIN SHRINK SMALL OUTLINE PACKAGE FAMILY
(N/2)+1
N
MILLIMETERS
SYMBOL 14 LD 16 LD 20 LD 24 LD 28 LD TOLERANCE
PIN #1 I.D.
E
E1
0.20 C B A
1
(N/2)
B
2X
N/2 LEAD TIPS
TOP VIEW
0.05
e
C
SEATING
PLANE
0.10 M C A B
b
0.10 C
N LEADS
H
A
1.20
1.20
1.20
1.20
1.20
Max
A1
0.10
0.10
0.10
0.10
0.10
±0.05
A2
0.90
0.90
0.90
0.90
0.90
±0.05
b
0.25
0.25
0.25
0.25
0.25
+0.05/-0.06
c
0.15
0.15
0.15
0.15
0.15
+0.05/-0.06
D
5.00
5.00
6.50
7.80
9.70
±0.10
E
6.40
6.40
6.40
6.40
6.40
Basic
E1
4.40
4.40
4.40
4.40
4.40
±0.10
e
0.65
0.65
0.65
0.65
0.65
Basic
L
0.60
0.60
0.60
0.60
0.60
±0.15
L1
1.00
1.00
1.00
1.00
1.00
Reference
Rev. F 2/07
NOTES:
1. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusions or gate burrs shall not exceed
0.15mm per side.
SIDE VIEW
2. Dimension “E1” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm per
side.
SEE DETAIL “X”
3. Dimensions “D” and “E1” are measured at dAtum Plane H.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
END VIEW
L1
A
A2
GAUGE
PLANE
0.25
L
A1
0° - 8°
DETAIL X
16
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M C A B
e
H
C
A2
GAUGE
PLANE
SEATING
PLANE
A1
0.004 C
0.010 M C A B
L
b
0.010
4° ±4°
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SYMBOL
SO-14
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCE
NOTES
A
0.068
0.068
0.068
0.104
0.104
0.104
0.104
MAX
-
A1
0.006
0.006
0.006
0.007
0.007
0.007
0.007
±0.003
-
A2
0.057
0.057
0.057
0.092
0.092
0.092
0.092
±0.002
-
b
0.017
0.017
0.017
0.017
0.017
0.017
0.017
±0.003
-
c
0.009
0.009
0.009
0.011
0.011
0.011
0.011
±0.001
-
D
0.193
0.341
0.390
0.406
0.504
0.606
0.704
±0.004
1, 3
E
0.236
0.236
0.236
0.406
0.406
0.406
0.406
±0.008
-
E1
0.154
0.154
0.154
0.295
0.295
0.295
0.295
±0.004
2, 3
e
0.050
0.050
0.050
0.050
0.050
0.050
0.050
Basic
-
L
0.025
0.025
0.025
0.030
0.030
0.030
0.030
±0.009
-
L1
0.041
0.041
0.041
0.056
0.056
0.056
0.056
Basic
-
h
0.013
0.013
0.013
0.020
0.020
0.020
0.020
Reference
-
16
20
24
28
Reference
-
N
SO-8
SO16
(0.150”)
8
14
16
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
17
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09
4
4.90 ± 0.10
A
DETAIL "A"
0.22 ± 0.03
B
6.0 ± 0.20
3.90 ± 0.10
4
PIN NO.1
ID MARK
5
(0.35) x 45°
4° ± 4°
0.43 ± 0.076
1.27
0.25 M C A B
SIDE VIEW “B”
TOP VIEW
1.75 MAX
1.45 ± 0.1
0.25
GAUGE PLANE
C
SEATING PLANE
0.10 C
0.175 ± 0.075
SIDE VIEW “A
0.63 ±0.23
DETAIL "A"
(0.60)
(1.27)
NOTES:
(1.50)
(5.40)
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5.
The pin #1 identifier may be either a mold or mark feature.
6.
Reference to JEDEC MS-012.
TYPICAL RECOMMENDED LAND PATTERN
18
FN7623.7
February 13, 2014
ISL28130, ISL28230, ISL28430
Package Outline Drawing
L8.3x3J
8 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE
Rev 0 9/09
2X 1.950
3.00
B
0.15
8
5
3.00
(4X)
6X 0.65
A
1.64 +0.10/ - 0.15
6
PIN 1
INDEX AREA
4
8X 0.30
8X 0.400 ± 0.10
TOP VIEW
6
PIN #1 INDEX AREA
1
4
0.10 M C A B
2.38
+0.10/ - 0.15
BOTTOM VIEW
SEE DETAIL "X"
( 2.38 )
( 1.95)
0.10 C
Max 1.00
C
0.08 C
SIDE VIEW
( 8X 0.60)
(1.64)
( 2.80 )
PIN 1
C
0 . 2 REF
5
(6x 0.65)
0 . 00 MIN.
0 . 05 MAX.
( 8 X 0.30)
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6.
19
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
FN7623.7
February 13, 2014
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