DATASHEET

ISL28168, ISL28268
Data Sheet
34µA Micro-power Single and Dual
Rail-to-Rail Input-Output (RRIO) Low Input
Bias Current Op Amps
The ISL28168 and ISL28268 are micro-power operational
amplifiers optimized for single supply operation over a power
supply range of 2.4VDC to 5.5VDC. These devices draw
minimal supply current and operate rail-to-rail at the input
and output, while providing excellent DC-accuracy, noise
and output drive specifications. Competing devices seriously
degrade these parameters to achieve micro-power supply
current.
The parts feature an Input Range Enhancement Circuit
(IREC), which enables them to maintain CMRR performance
for input voltages greater than the positive supply. The input
signal is capable of swinging 0.25V above the positive
supply and to 100mV below the negative supply with only a
slight degradation of the CMRR performance. The output
operation is rail-to-rail.
The 1/f corner of the voltage noise spectrum is at 100Hz.
This results in low frequency noise performance, which can
only be found on devices with an order of magnitude higher
supply current.
ISL28168 and ISL28268 can be operated from one lithium
cell or two Ni-Cd batteries. The ISL28168 contains an enable
pin feature that allows the device to be shutdown when not in
use.
July 25, 2011
FN6378.4
Features
• 34µA typical supply current
• 10pA typical input bias current
• 200kHz gain bandwidth product
• 2.4V to 5.5V single supply voltage range
• Rail-to-rail input and output
• Enable pin (ISL28168 only)
• Pb-free (RoHS compliant)
Applications
• Battery- or solar-powered systems
• 4mA to 20mA current loops
• Handheld consumer products
• Medical devices
• Sensor amplifiers
• ADC buffers
• DAC output amplifiers
Pinouts
ISL28168
(6 LD SOT-23)
TOP VIEW
OUT 1
V- 2
6 V+
+ -
IN+ 3
5 EN
4 IN-
ISL28268
(8 LD MSOP)
TOP VIEW
ISL28268
(8 LD SOIC)
TOP VIEW
OUT_A 1
IN-_A 2
IN+_A 3
V- 4
1
8 V+
- +
+ -
OUT_A 1
7 OUT_B
IN-_A 2
6 IN-_B
IN+_A 3
5 IN+_B
V- 4
8 V+
7 OUT_B
- +
+ -
6 IN-_B
5 IN+_B
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2007, 2008, 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL28168, ISL28268
Pin Descriptions
ISL28168
(6 Ld SOT-23)
ISL28268
(8 Ld SOIC)
(8 Ld MSOP)
PIN NAME
2 (A)
6 (B)
ININ-_A
IN-_B
4
FUNCTION
EQUIVALENT CIRCUIT
Inverting input
V+
IN-
IN+
VCIRCUIT 1
3 (A)
5 (B)
IN+
IN+_A
IN+_B
4
V-
3
2
Non-inverting input
Negative supply
See Circuit 1
V+
CAPACITIVELY
COUPLED
ESD CLAMP
VCIRCUIT 2
1
1 (A)
7 (B)
OUT
OUT_A
OUT_B
Output
V+
OUT
VCIRCUIT 3
6
8
5
V+
Positive supply
EN
Chip enable
See Circuit 2
V+
LOGIC
PIN
VCIRCUIT 3
2
FN6378.4
July 25, 2011
ISL28168, ISL28268
Ordering Information
PART NUMBER
(Notes 3, 4)
PART
MARKING
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL28168FHZ-T7 (Note 1)
GACA (Note 5)
6 Ld SOT-23
P6.064A
ISL28168FHZ-T7A (Note 1)
GACA (Note 5)
6 Ld SOT-23
P6.064A
ISL28268FBZ (Note 2)
28268 FBZ
8 Ld SOIC
M8.15E
ISL28268FUZ (Note 2)
8268Z
8 Ld MSOP
M8.118A
ISL28168EVAL1Z
Evaluation Board - 6 Ld SOT-23
ISL28268SOICEVAL1Z
Evaluation Board - 8 Ld SOIC
ISL28268MSOPEVAL1Z
Evaluation Board - 8 Ld MSOP
1. Please refer to TB347 for details on reel specifications.
2. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
4. For Moisture Sensitivity Level (MSL), please see device information page for ISL28168, ISL28268. For more information on MSL please see
techbrief TB363.
5. The part marking is located on the bottom of the part.
3
FN6378.4
July 25, 2011
ISL28168, ISL28268
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V
Supply Turn-on Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
Charge Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1500V
Thermal Resistance (Note 6)
θJA (°C/W)
6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . .
230
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
120
8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . .
160
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C
Pb-Free Reflow Profilesee link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
6. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data
established by characterization.
DESCRIPTION
CONDITIONS
MIN
(Note 7)
TYP
MAX
(Note 7)
UNIT
DC SPECIFICATIONS
VOS
Input Offset Voltage
ΔV OS
--------------ΔT
Input Offset Voltage vs Temperature
IOS
Input Offset Current
IB
ISL28168
-1.6
-1.8
±0.09
1.6
1.8
mV
ISL28268
-2.4
-2.6
±0.09
2.4
2.6
mV
0.3
µV/°C
-35
-80
±5
35
80
pA
TA = -40°C to +85°C
-30
-80
±10
30
80
pA
TA = -40°C to +85°C
5
V
Input Bias Current
CMIR
Common-Mode Voltage Range
Guaranteed by CMRR
0
CMRR
Common-Mode Rejection Ratio
VCM = 0V to 5V
75
70
98
dB
PSRR
Power Supply Rejection Ratio
V+ = 2.4V to 5.5V
80
75
98
dB
AVOL
Large Signal Voltage Gain
VO = 0.5V to 4.5V, RL = 100kΩ to VCM
100
75
220
V/mV
VO = 0.5V to 4.5V, RL = 1kΩ to VCM
45
V/mV
Output low, RL = 100kΩ to VCM
5.5
6
20
mV
Output low, RL = 1kΩ to VCM
135
150
250
mV
VOUT
IS,ON
Maximum Output Voltage Swing
Quiescent Supply Current, Enabled
4
Output high, RL = 100kΩ to VCM
4.992
4.990
4.995
V
Output high, RL = 1kΩ to VCM
4.84
4.77
4.874
V
Per Amp
34
43
55
µA
FN6378.4
July 25, 2011
ISL28168, ISL28268
Electrical Specifications
PARAMETER
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data
established by characterization. (Continued)
DESCRIPTION
CONDITIONS
IS,OFF
Quiescent Supply Current, Disabled
(ISL28168)
IO+
Short-Circuit Output Source Current
RL = 10Ω to VCM
IO-
Short-Circuit Output Sink Current
RL = 10Ω to VCM
VSUPPLY
Supply Operating Range
V+ to V-
VINH
EN Pin High Level (ISL28168)
VINL
EN Pin Low Level (ISL28168)
IENH
EN Pin Input High Current (ISL28168)
VEN = V+
IENL
EN Pin Input Low Current (ISL28168)
MIN
(Note 7)
TYP
10
27
15
MAX
(Note 7)
14
19
30
-25
2.4
UNIT
µA
mA
-22
-15
mA
5.5
V
2
V
0.8
V
1
1.5
1.6
µA
VEN = V-
12
25
30
nA
AC SPECIFICATIONS
GBW
Gain Bandwidth Product
AV = 100, RF = 100kΩ, RG = 1kΩ,
RL = 10kΩ to VCM
200
kHz
Unity Gain
Bandwidth
-3dB Bandwidth
AV =1, RF = 0Ω, VOUT = 10mVP-P,
RL = 10kΩ to VCM
420
kHz
eN
Input Noise Voltage Peak-to-Peak
f = 0.1Hz to 10Hz
1.4
µVP-P
Input Noise Voltage Density
fO = 1kHz
64
nV/√Hz
iN
Input Noise Current Density
fO = 10kHz
0.19
pA/√Hz
CMRR @ 60Hz
Input Common Mode Rejection Ratio
VCM = 1VP-P, RL = 10kΩ to VCM
-70
dB
PSRR+ @
120Hz
Power Supply Rejection Ratio - +V
V+, V- = ±1.2V and ±2.5V,
VSOURCE = 1VP-P, RL = 10kΩ to VCM
-64
dB
PSRR- @
120Hz
Power Supply Rejection Ratio - -V
V+, V- = ±1.2V and ±2.5V
VSOURCE = 1VP-P, RL = 10kΩ to VCM
-85
dB
0.1
V/µs
TRANSIENT RESPONSE
SR
Slew Rate
tr, tf, Large
Signal
Rise Time, 10% to 90%, VOUT
AV = +2, VOUT = 1VP-P, Rg = Rf = 10kΩ
RL = 10kΩ to VCM
10
µs
Fall Time, 90% to 10%, VOUT
AV = +2, VOUT = 1VP-P, Rg = Rf = 10kΩ
RL = 10kΩ to VCM
9
µs
Rise Time, 10% to 90%, VOUT
AV = +2, VOUT = 10mVP-P,
Rg = Rf = RL = 10kΩ to VCM
650
ns
Fall Time, 90% to 10%, VOUT
AV = +2, VOUT = 10mVP-P,
Rg = Rf = RL = 10kΩ to VCM
640
ns
Enable to Output Turn-on Delay Time, 10% VEN = 5V to 0V, AV = +2,
EN to 10% VOUT, (ISL28168)
Rg = Rf = RL = 1k to VCM
15
µs
Enable to Output Turn-off Delay Time, 10% VEN = 0V to 5V, AV = +2,
EN to 10% VOUT, (ISL28168)
Rg = Rf = RL = 1k to VCM
0.5
µs
tr, tf, Small
Signal
tEN
NOTE:
7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
5
FN6378.4
July 25, 2011
ISL28168, ISL28268
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
1
-1
Rf = Rg = 499
-2
Rf = Rg = 1k
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
0
-3
-4
-5
V+ = 5V
RL = 1k
CL = 16.3pF
AV = +2
VOUT = 10mVP-P
-6
-7
-8
-9
10
100
Rf = Rg = 10k
Rf = Rg = 4.99k
1k
10k
FREQUENCY (Hz)
100k
1M
1
1
0
0
-1
-2
VOUT = 10mV
-3
VOUT = 50mV
-4
VOUT = 100mV
-5
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
1M
FIGURE 2. GAIN vs FREQUENCY vs VOUT, RL = 1k
FIGURE 1. GAIN vs FREQUENCY vs FEEDBACK RESISTOR
VALUES Rf/Rg
VOUT = 1V
V+ = 5V
RL = 10k
CL = 16.3pF
AV = +1
VOUT = 10mVP-P
-6
-7
-8
-9
1k
10k
100k
FREQUENCY (Hz)
1M
FIGURE 3. GAIN vs FREQUENCY vs VOUT, RL = 10k
GAIN (dB)
RL = 10k
0
-1
-2
-6
1k
VOUT = 100mV
-4
VOUT = 1V
-5 V+ = 5V
-6 RL = 100k
CL = 16.3pF
-7
AV = +1
-8 V
OUT = 10mVP-P
-9
1k
10k
100k
FREQUENCY (Hz)
1M
AV = 1, Rg = INF, Rf = 0
AV = 10, Rg= 1k, Rf = 9.09k
AV = 101, Rg = 1k, Rf = 100k
AV = 1001, Rg = 1k, Rf = 1M
AV = 1001
50
1
-5
VOUT = 50mV
-3
60
RL = 1k
2
-4
VOUT = 10mV
-2
70
3
-3
-1
FIGURE 4. GAIN vs FREQUENCY vs VOUT, RL = 100k
4
NORMALIZED GAIN (dB)
4
VOUT = 10mV
3
2
VOUT = 50mV
1
0
-1
VOUT = 100mV
-2
-3
V+ = 5V
VOUT = 1V
-4 R = 1k
L
-5 C = 16.3pF
L
-6 AV = +1
-7 VOUT = 10mVP-P
-8
1k
10k
100k
FREQUENCY (Hz)
RL = 100k
V+ = 5V
CL = 16.3pF
AV = +1
VOUT = 10mVP-P
40
AV = 101
V+ = 5V
CL = 16.3pF
RL = 10k
VOUT = 10mVP-P
30
20
AV = 10
10
0
10k
100k
FREQUENCY (Hz)
FIGURE 5. GAIN vs FREQUENCY vs RL
6
1M
-10
10
AV = 1
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 6. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
FN6378.4
July 25, 2011
ISL28168, ISL28268
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
1
V+ = 5V
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
0
-1
V+ = 2.4V
-2
-3
-4
-5
-6
-7
RL = 10k
CL = 16.3pF
AV = +1
VOUT = 10mVP-P
-8
1k
10k
100k
FREQUENCY (Hz)
1M
8
7
6
5
4
3
2
1
0
-1
-2
-3
-4
-5 V+ = 5V
-6 RL = 10k
-7 AV = +1
-8 V
OUT = 10mVP-P
-9
-10
1k
10k
0
-10
-10
100k
1M
PSRR-
-20
PSRR (dB)
CMRR (dB)
CL = 16.3pF
10
0
-20
-30
-40
-50
V+ = 2.4V, 5V
RL = 10k
CL = 16.3pF
AV = +1
VCM = 1VP-P
-60
-70
-80
100
1k
10k
100k
-30
PSRR+
-40
-50
V+ = 2.4V
RL = 10k
CL = 16.3pF
AV = +1
VCM = 1VP-P
-60
-70
-80
-90
-100
10
1M
100
FREQUENCY (Hz)
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 9. CMRR vs FREQUENCY, V+ = 2.4V AND 5V
FIGURE 10. PSRR vs FREQUENCY, V+, V- = ±1.2V
1000
INPUT VOLTAGE NOISE (nV√Hz)
10
0
-10
PSRR-
-20
PSRR (dB)
CL = 43.3pF
CL = 34.3pF
FIGURE 8. GAIN vs FREQUENCY vs CL
10
-30
PSRR+
-40
-50
V+ = 5V
RL = 10k
CL = 16.3pF
AV = +1
VCM = 1VP-P
-60
-70
-80
-90
-100
10
CL = 98.3pF
CL = 72.3pF
CL = 55.3pF
FREQUENCY (Hz)
FIGURE 7. GAIN vs FREQUENCY vs SUPPLY VOLTAGE
-90
10
(Continued)
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 11. PSRR vs FREQUENCY, V+, V- = ±1.2V
7
V+ = 5V
RL = 10k
CL = 16.3pF
AV = +1
100
10
1M
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 12. INPUT VOLTAGE NOISE DENSITY vs FREQUENCY
FN6378.4
July 25, 2011
ISL28168, ISL28268
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
10
0
RL = 10k
V+ = 5V
CL = 16.3pF AV = 1000
Rg = 100, Rf = 100k
-0.2
-0.4
INPUT NOISE (µV)
INPUT CURRENT NOISE (pA√Hz)
V+ = 5V
RL = 10k
CL = 16.3pF
AV = +1
1
-0.6
-0.8
-1.0
-1.2
-1.4
0.1
1
10
100
1k
FREQUENCY (Hz)
10k
-1.6
100k
FIGURE 13. INPUT CURRENT NOISE DENSITY vs FREQUENCY
0.6
0.020
0.4
0.018
0.2
0
V+, V- = ±2.5V
RL = 10k
CL = 16.3pF
Rg = Rf = 10k
AV = 2
VOUT = 1VP-P
-0.2
-0.4
100
150
200
250
2
3
300
350
0.010
400
0
50
100
4
0.8
V+ = 5V
Rg = Rf = 10k
CL = 16.3pF
AV = +2
VOUT = 1VP-P
0.6
0.4
0.2
RL = 10k
350
400
0
-100
-200
V+ = 5V
RL = OPEN
Rf = 100k, Rg = 100
AV = +1000
-300
-400
-0.2
400
-500
300
350
FIGURE 17. ISL28168 ENABLE TO OUTPUT RESPONSE
8
300
100
-1
200
250
TIME (µs)
250
200
0
150
200
300
0
100
150
400
VOS (µV)
1.0
OUTPUT (V)
V-ENABLE (V)
5
50
10
500
1.2
0
9
FIGURE 16. SMALL SIGNAL STEP RESPONSE
V-OUT
1
8
TIME (µs)
6
2
7
V+, V- = ±2.5V
RL = 10k
CL = 16.3pF
Rg= Rf = 10k
AV = 2
VOUT = 10mVP-P
0.012
FIGURE 15. LARGE SIGNAL STEP RESPONSE
3
5
6
TIME (s)
0.014
TIME (µs)
V-ENABLE
4
0.016
0.006
50
1
0.008
-0.6
0
0
FIGURE 14. INPUT VOLTAGE NOISE 0.1Hz TO 10Hz
SMALL SIGNAL (V)
LARGE SIGNAL (V)
(Continued)
-1
0
1
2
3
VCM (V)
4
5
6
FIGURE 18. INPUT OFFSET VOLTAGE vs COMMON MODE
INPUT VOLTAGE
FN6378.4
July 25, 2011
ISL28168, ISL28268
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
100
(Continued)
50
N = 1000
80
45
60
MAX
CURRENT (µA)
40
IBIAS (pA)
20
0
-20
V+ = 5V
RL = OPEN
Rf = 100k, Rg = 100
AV = +1000
-40
-60
-80
-100
-1
0
1
2
3
VCM (V)
40
MEDIAN
35
30
MIN
25
4
5
20
-40
6
-20
0
20
40
60
80
FIGURE 19. INPUT BIAS CURRENT vs COMMON MODE
INPUT VOLTAGE
120
FIGURE 20. SUPPLY CURRENT ENABLED vs
TEMPERATURE, V+, V- = ±2.5V
1.5
14
N = 1000
N = 1000
13
100
TEMPERATURE (°C)
MAX
MAX
1.0
0.5
11
VOS (µV)
CURRENT (µA)
12
10
MEDIAN
9
0
MEDIAN
-0.5
8
7
MIN
-1.0
20
-1.5
-40
6
MIN
5
-40
-20
0
40
60
80
100
120
-20
0
TEMPERATURE (°C)
FIGURE 21. SUPPLY CURRENT DISABLED vs
TEMPERATURE, V+, V- = ±2.5V
1.5
MAX
80
100
120
N = 1000
MAX
1.0
0.5
VOS (µV)
VOS (µV)
60
1.5
0.5
0
MEDIAN
0
MEDIAN
-0.5
-0.5
-1.0
-1.0
MIN
MIN
-1.5
-40
40
FIGURE 22. VOS (SOT PKG) vs TEMPERATURE, VIN = 0V,
V+, V- = ±2.75V
N = 1000
1.0
20
TEMPERATURE (°C)
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 23. VOS (SOT PKG) vs TEMPERATURE, VIN = 0V,
V+, V- = ±2.5V
9
-1.5
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 24. VOS (SOT PKG) vs TEMPERATURE, VIN = 0V,
V+, V- = ±1.2V
FN6378.4
July 25, 2011
ISL28168, ISL28268
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
250
500
N = 1000
MAX
450
200
MAX
N = 1000
400
350
MEDIAN
IBIAS- (pA)
150
IBIAS+ (pA)
(Continued)
100
MIN
50
MEDIAN
300
250
200
150
MIN
100
50
0
0
-50
-40
-20
0
20
40
60
80
100
-50
-40
120
-20
0
FIGURE 25. IBIAS+ vs TEMPERATURE, V+, V- = ±2.5V
40
60
80
100
120
FIGURE 26. IBIAS- vs TEMPERATURE, V+, V- = ±2.5V
350
450
N = 1000
300
MAX
250
MEDIAN
400
N = 1000
MAX
350
150
100
MEDIAN
300
200
IBIAS- (pA)
IBIAS+ (pA)
20
TEMPERATURE (°C)
TEMPERATURE (°C)
MIN
250
200
150
MIN
100
50
50
0
-50
-40
0
-20
0
20
40
60
80
100
-50
-40
120
-20
0
TEMPERATURE (°C)
FIGURE 27. IBIAS+ vs TEMPERATURE, V+, V- = ±1.2V
30
N = 1000
0
10
-20
-10
-40
60
80
100
120
N = 1000
-30
MAX
-60
IOS (pA)
IOS (pA)
40
FIGURE 28. IBIAS- vs TEMPERATURE, V+, V- = ±1.2V
20
-80
MEDIAN
-100
MAX
-50
-70
MEDIAN
-90
-120
-110
MIN
-140
-160
-40
20
TEMPERATURE (°C)
MIN
-130
-20
0
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 29. IOS vs TEMPERATURE, V+, V- = ±2.5
10
120
-150
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 30. IOS vs TEMPERATURE, V+, V- = ±1.2V
FN6378.4
July 25, 2011
ISL28168, ISL28268
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
140
130
140
N = 1000
MAX
N = 1000
MAX
130
PSRR (dB)
120
CMRR (dB)
(Continued)
110
MEDIAN
100
120
110
MEDIAN
100
90
MIN
80
90
70
-40
80
-40
MIN
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 31. CMRR vs TEMPERATURE, VCM = -2.5V TO +2.5V,
V+, V- = ±2.5V
FIGURE 32. PSRR vs TEMPERATURE, V+, V- = ±1.2V TO ±2.75V
450
70
N = 1000
400
N = 1000
MAX
65
MAX
60
55
AVOL (V/mV)
AVOL (V/mV)
350
300
250
MEDIAN
100
-40
MEDIAN
45
40
35
200
150
50
30
MIN
MIN
25
-20
0
20
40
60
80
100
20
-40
120
-20
0
20
FIGURE 33. AVOL vs TEMPERATURE, V+, V- = ±2.5V, VO = -2V
TO +2V, RL = 100k
60
80
100
120
FIGURE 34. AVOL vs TEMPERATURE, V+, V- = ±2.5V, VO = -2V
TO +2V, RL = 1k
4.92
4.9980
N = 1000
N = 1000
4.91
MAX
4.9975
MAX
4.90
4.89
VOUT (V)
VOUT (V)
40
TEMPERATURE (°C)
TEMPERATURE (°C)
4.88
4.87
MEDIAN
4.9970
4.9965
MEDIAN
4.86
4.9960
4.84
-40
MIN
MIN
4.85
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 35. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V,
RL = 1k
11
4.9955
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 36. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V,
RL = 100k
FN6378.4
July 25, 2011
ISL28168, ISL28268
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
7.5
190
180
N = 1000
N = 1000
7.0
MAX
MAX
170
6.5
160
VOUT (mV)
VOUT (mV)
(Continued)
150
140
MEDIAN
130
6.0
MEDIAN
5.5
5.0
120
MIN
110
100
-40
-20
0
20
40
MIN
4.5
60
80
100
4.0
-40
120
-20
0
TEMPERATURE (°C)
45
N = 1000
MAX
35
MEDIAN
30
25
20
-40
MIN
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 39. IO+ SHORT CIRCUIT OUTPUT CURRENT vs
TEMPERATURE, VIN = -2.55V, RL = 10k,
V+, V- = ±2.5V
Applications Information
Introduction
The ISL28168 is a single CMOS rail-to-rail input, output
(RRIO) operational amplifier with an enable feature. The
ISL28268 is a dual version without the enable feature. Both
devices are designed to operate from single supply (2.4V to
5.5V) or dual supplies (±1.2V to ±2.75V).
Rail-to-Rail Input/Output
Many rail-to-rail input stages use two differential input pairs,
a long-tail PNP (or PFET) and an NPN (or NFET). Severe
penalties have to be paid for this circuit topology. As the
input signal moves from one supply rail to another, the
operational amplifier switches from one input pair to the
other causing drastic changes in input offset voltage and an
undesired change in magnitude and polarity of input offset
current.
12
40
60
80
100
120
FIGURE 38. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V,
RL = 100k
IO- SHORT CIRCUIT CURRENT (mA)
IO+ SHORT CIRCUIT CURRENT (mA)
FIGURE 37. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V,
RL = 1k
40
20
TEMPERATURE (°C)
-20
MAX
N = 1000
-22
-24
MEDIAN
-26
MIN
-28
-30
-32
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 40. IO- SHORT CIRCUIT OUTPUT CURRENT vs
TEMPERATURE, VIN = +2.55V, RL = 10k,
V+, V- = ±2.5V
The ISL28168 and ISL28268 achieve input rail-to-rail
operation without sacrificing important precision
specifications and degrading distortion performance. The
devices’ input offset voltage exhibits a smooth behavior
throughout the entire common-mode input range. The input
bias current versus the common-mode voltage range gives
us an undistorted behavior from typically 100mV below the
negative rail, and 0.25V higher than the V+ rail. The CMOS
output stage features excellent drive capability, typically
swinging to within 6mV of either rail with a 100kΩ load.
Results of Over-Driving the Output
Caution should be used when over-driving the output for
long periods of time. Over-driving the output can occur in two
ways.
1. The input voltage times the gain of the amplifier exceeds
the supply voltage by a large value
FN6378.4
July 25, 2011
ISL28168, ISL28268
2. The output current required is higher than the output
stage can deliver. These conditions can result in a shift in
the Input Offset Voltage (VOS) as much as 1µV/hr. of
exposure under these conditions.
Large differential input voltages can arise from several
sources:
IN+ and IN- Input Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. They also contain
back-to-back diodes across the input terminals (see “Pin
Descriptions” on page 2 - Circuit 1). For applications where
the input differential voltage is expected to exceed 0.5V, an
external series resistor must be used to ensure the input
currents never exceed 5mA (see Figure 41).
VIN
VOUT
RIN
RL
+
choice, unless the feedback (RF) and gain setting (RG)
resistors are both sufficiently large to limit the input current to
5mA.
FIGURE 41. INPUT CURRENT LIMITING
1. During open loop (comparator) operation. Used this way,
the IN+ and IN- voltages don’t track, so differentials arise.
2. When the amplifier is disabled but an input signal is still
present. An RL or RG to GND keeps the IN- at GND, while
the varying IN+ signal creates a differential voltage. Mux
Amp applications are similar, except that the active
channel VOUT determines the voltage on the IN- terminal.
3. When the slew rate of the input pulse is considerably
faster than the op amp’s slew rate. If the VOUT can’t keep
up with the IN+ signal, a differential voltage results, and
visible distortion occurs on the input and output signals.
To avoid this issue, keep the input slew rate below
0.1V/µs, or use appropriate current limiting resistors.
Large (>2V) differential input voltages can also cause an
increase in disabled ICC.
Enable/Disable Feature
Using Only One Channel
The ISL28168 offers an EN pin that disables the device
when pulled up to at least 2.0V. In the disabled state (output
in a high impedance state), the part consumes typically 10µA
at room temperature. By disabling the part, multiple
ISL28168 parts can be connected together as a MUX. In this
configuration, the outputs are tied together in parallel and a
channel can be selected by the EN pin. The loading effects
of the feedback resistors of the disabled amplifier must be
considered when multiple amplifier outputs are connected
together. Note that feed through from the IN+ to IN- pins
occurs on any Mux Amp disabled channel where the input
differential voltage exceeds 0.5V (e.g., active channel
VOUT = 1V, while disabled channel VIN = GND), so the Mux
implementation is best suited for small signal applications. If
large signals are required, use series IN+ resistors, or large
value RF, to keep the feed-through current low enough to
minimize the impact on the active channel. See “Limitations
of the Differential Input Protection” on page 13 for more
details.
The ISL28268 is a dual op amp. If the application only
requires one channel, the user must configure the unused
channel to prevent it from oscillating. The unused channel
will oscillate if the input and output pins are floating. This will
result in higher than expected supply currents and possible
noise injection into the channel being used. The proper way
to prevent this oscillation is to short the output to the
negative input and ground the positive input (as shown in
Figure 42).
To disable the part, the user needs to supply the 1.5µA
required to pull the EN pin to the V+ rail. If left open, the EN
pin will pull to the negative rail and the device will be enabled
by default. If the EN function is not required (no need to turn
the part off), as a precaution, it is recommended that the
user tie the EN pin to the V- pin.
Limitations of the Differential Input Protection
If the input differential voltage is expected to exceed 0.5V, an
external current limiting resistor must be used to ensure the
input current never exceeds 5mA. For non inverting unity
gain applications, the current limiting can be via a series IN+
resistor, or via a feedback resistor of appropriate value. For
other gain configurations, the series IN+ resistor is the best
13
+
FIGURE 42. PREVENTING OSCILLATIONS IN UNUSED
CHANNELS
Proper Layout Maximizes Performance
To achieve the maximum performance of the high input
impedance and low offset voltage, care should be taken in
the circuit board layout. The PC board surface must remain
clean and free of moisture to avoid leakage currents
between adjacent traces. Surface coating of the circuit board
will reduce surface moisture and provide a humidity barrier,
reducing parasitic resistance on the board. When input
leakage current is a concern, the use of guard rings around
the amplifier inputs will further reduce leakage currents.
Figure 43 shows a guard ring example for a unity gain
amplifier that uses the low impedance amplifier output at the
same voltage as the high impedance input to eliminate
surface leakage. The guard ring does not need to be a
specific width, but it should form a continuous loop around
both inputs. For further reduction of leakage currents,
FN6378.4
July 25, 2011
ISL28168, ISL28268
components can be mounted to the PC board using Teflon
standoff insulators.
V+
HIGH IMPEDANCE INPUT
IN
+
-
FIGURE 43. GUARD RING EXAMPLE FOR UNITY GAIN
AMPLIFIER
Power Dissipation
It is possible to exceed the +125°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (TJMAX) for all applications
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related in Equation 1:
T JMAX = T MAX + ( θ JA xPD MAXTOTAL )
(EQ. 1)
Current Limiting
where:
These devices have no internal current-limiting circuitry. If
the output is shorted, it is possible to exceed the Absolute
Maximum Rating for output current or power dissipation,
potentially resulting in the destruction of the device.
• PDMAXTOTAL is the sum of the maximum power
dissipation of each amplifier in the package (PDMAX)
• PDMAX for each amplifier can be calculated using
Equation 2:
V OUTMAX
PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × ---------------------------R
L
(EQ. 2)
where:
• TMAX = Maximum ambient temperature
• θJA = Thermal resistance of the package
• PDMAX = Maximum power dissipation of 1 amplifier
• VS = Supply voltage (Magnitude of V+ and V-)
• IMAX = Maximum supply current of 1 amplifier
• VOUTMAX = Maximum output voltage swing of the
application
RL = Load resistance
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
14
FN6378.4
July 25, 2011
ISL28168, ISL28268
Package Outline Drawing
P6.064A
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
Rev 0, 2/10
1.90
0-3°
0.95
D
0.08-0.20
A
5
6
4
PIN 1
INDEX AREA
2.80
3
1.60
3
0.15 C D
2x
5
(0.60)
1
3
2
0.20 C
2x
0.40 ±0.05
B
SEE DETAIL X
3
0.20 M C A-B
D
TOP VIEW
2.90
5
END VIEW
10° TYP
(2 PLCS)
0.15 C A-B
2x
H
1.14 ±0.15
1.45 MAX
C
SIDE VIEW
0.10 C
0.05-0.15
SEATING PLANE
DETAIL "X"
(0.25) GAUGE
PLANE
0.45±0.1
4
(0.60)
(1.20)
NOTES:
(2.40)
(0.95)
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to ASME Y14.5M-1994.
3.
Dimension is exclusive of mold flash, protrusions or gate burrs.
4.
Foot length is measured at reference to guage plane.
5.
This dimension is measured at Datum “H”.
6.
Package conforms to JEDEC MO-178AA.
(1.90)
TYPICAL RECOMMENDED LAND PATTERN
15
FN6378.4
July 25, 2011
ISL28168, ISL28268
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09
4
4.90 ± 0.10
A
DETAIL "A"
0.22 ± 0.03
B
6.0 ± 0.20
3.90 ± 0.10
4
PIN NO.1
ID MARK
5
(0.35) x 45°
4° ± 4°
0.43 ± 0.076
1.27
0.25 M C A B
SIDE VIEW “B”
TOP VIEW
1.75 MAX
1.45 ± 0.1
0.25
GAUGE PLANE
C
SEATING PLANE
0.10 C
0.175 ± 0.075
SIDE VIEW “A
0.63 ±0.23
DETAIL "A"
(0.60)
(1.27)
NOTES:
(1.50)
(5.40)
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5.
The pin #1 identifier may be either a mold or mark feature.
6.
Reference to JEDEC MS-012.
TYPICAL RECOMMENDED LAND PATTERN
16
FN6378.4
July 25, 2011
ISL28168, ISL28268
Package Outline Drawing
M8.118A
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP)
Rev 0, 9/09
A
3.0±0.1
8
0.25
CAB
3.0±0.1
4.9±0.15
DETAIL "X"
1.10 Max
PIN# 1 ID
B
SIDE VIEW 2
1
0.18 ± 0.05
2
0.65 BSC
TOP VIEW
0.95 BSC
0.86±0.09
GAUGE
PLANE
H
C
0.25
SEATING PLANE
0.33 +0.07/ -0.08
0.08 C A B
0.10 ± 0.05
3°±3°
0.10 C
0.55 ± 0.15
DETAIL "X"
SIDE VIEW 1
5.80
NOTES:
4.40
3.00
1.
Dimensions are in millimeters.
2.
Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSE Y14.5m-1994.
3.
Plastic or metal protrusions of 0.15mm max per side are not
included.
4.
Plastic interlead protrusions of 0.25mm max per side are not
included.
5.
Dimensions “D” and “E1” are measured at Datum Plane “H”.
6.
This replaces existing drawing # MDP0043 MSOP 8L.
0.65
0.40
1.40
TYPICAL RECOMMENDED LAND PATTERN
17
FN6378.4
July 25, 2011
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