an1748

Application Note 1748
ISL28617SMXXEV1Z User’s Guide
Introduction
Amplifier Configuration
The ISL28617SMXXEV1Z evaluation board is designed to assess
the performance of the ISL28617 differential input, differential
output, precision instrumentation amplifier (in-amp). With an
input voltage range up to ±34V, a supply voltage range of 8V (±4V)
to 40V (±20V) and gain ranging from 0.1 to 10,000, this in-amp is
ideal for a wide variety of applications. The gain accuracy is
limited only by the matching of the gain resistors, and the output
is capable of driving rail-to-rail.
The ISL28617 evaluation board schematic is shown in Figure 4
with a closed loop gain of 10 and split supply operation with
input and output supplies tied together. Other gain options are
0.25 and 100, with the required resistor and capacitor changes
listed in Table 1. The in-amp gain is controlled through R1 and
R2, the feedback and input resistors, with the following simple
formula:
The board is configured for ease of use, but allows for more
complex variations to fit the user’s need, as discussed in the
following sections. The evaluation board includes test points
(VCC, VEE, and GND) for the power supply inputs, and is
configured for operation from split supplies between ±4V to
±20V. There are two pairs of test points for the differential input
and output as well (VIN+, VIN-, VOUT+, and VOUT-). The board is
available in three different gain configurations: 0.25, 10 and
100. Ordering information is shown in Table 3.
Reference Documents
• ISL28617 Data sheet, FN6562
Power Supplies
External power connections are made to the positive supply rail
(TP1), the negative supply rail (TP9), and ground (TP4) for split
supply operation. The operating voltage range is ±4V to ±20V.
The in-amp has two distinct sets of power supplies; one on the
input stage and one on the output stage. For the evaluation
board, the output stage supplies are tied to the input stage
supplies, and the common mode voltage is tied to ground. The
supply voltage on the input stage must be 3V above and below
the maximum and minimum input signal voltage, respectively.
Note that while the output stage is rail-to-rail, the feedback
returns to the input stage, which is not rail-to-rail. Therefore, the
input power supply must be 3V above and below the maximum
and minimum output signal as well. Table 2 provides suggested
supply voltages for the three standard boards. For more
information, reference “Setting the Power Supply Voltages” on
page 13 of the ISL28617 data sheet.
If the user wants to control the output supplies separately, the R3
and R5 resistors must be removed, and the VCO (TP2) and VEO
(TP6) test points are used for the positive output supply and
negative output supply respectively (reference evaluation board
schematic in Figure 4). Single supply operation requires removing
R7 and attaching the desired common mode voltage to the VREF
(TP10) test point. Using the separate supply feature enables input
signals riding on a high common mode voltage to be level shifted
to a low voltage device such as an analog to digital converter
(ADC). The rail-to-rail output stage can be powered from the same
supplies as the ADC while preserving the in-amp’s maximum input
dynamic range. Once again, the positive input power supply must
be 3V above the maximum output signal, and the negative input
power supply must be 3V below the minimum output signal.
October 24, 2012
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1
R1
A V = ------R2
(EQ. 1)
R1 and R2 also limit the maximum signal size at the input and
output due to the amplifier architecture. Table 2 shows the signal
limits for the boards at the preset resistor values. For more
information, refer to “Setting the Feedback Gain RFB“ and
“Setting the Input Gain RIN” on page 13 of the ISL28617 data
sheet.
The evaluation board allows the user to add an optional low pass
RC filter to the signal path. R8, R9, and C6 create a filter on the
output of the in-amp, while R10, R11, and C7 create a filter on
the input. The gain of 0.25 board option includes a filter on the
input to avoid gain peaking at the limits of the gain bandwidth
product.
TABLE 1. COMPONENTS PARTS LIST
DEVICE #
VALUE
DESCRIPTION
C1-C5
0.01µF
Decoupling Capacitors
C6
Open
Optional Output Filter Capacitor
C7
Open
Optional Input Filter Capacitor
1.2pF
Input Filter Capacitor (G = 0.25)
D1, D2
S1A
Reverse Power Protection
R1
30.1kΩ
Feedback Gain Resistor (G = 0.25)
100kΩ
Feedback Gain Resistor (G = 10, 100)
121kΩ
Input Gain Resistor (G = 0.25)
10kΩ
Input Gain Resistor (G = 10)
1kΩ
Input Gain Resistor (G = 100)
R3, R5, R7
0Ω
User Selectable Resistors
R8, R9
0Ω
Optional Output Filter Resistors
R10, R11
0Ω
Optional Input Filter Resistors
49.9kΩ
Input Filter Resistors (G = 0.25)
R4, R6
1MΩ
Ground Input for Stability
U1
ISL28617
TSSOP 24-Pin Package
R2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright Intersil Americas Inc. 2012. All Rights Reserved.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
Application Note 1748
TABLE 2. SUGGESTED INPUT VOLTAGE AND POWER SUPPLY LIMITS
GAIN
SUGGESTED
VIN LIMIT
OVERLOAD
VIN LIMIT
SUGGESTED
SUPPLY
VOLTAGE
0.25
±10V
±12V
±15V
10
±0.8V
±1V
±13V
100
±0.08V
±0.1V
±13V
TABLE 3. ORDERING INFORMATION
BOARD PART NUMBER
GAIN
TYPE
ISL28617SMR25EV1Z
0.25
Evaluation Board
ISL28617SM10EV1Z
10
Evaluation Board
ISL28617SM100EV1Z
100
Evaluation Board
ISL28617SMXXEV1Z Evaluation Board Layout
FIGURE 2. BOTTOM LAYER
FIGURE 1. TOP LAYER
FIGURE 3. ASSEMBLY DRAWING
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Application Note 1748
ISL28617SMXXEV1Z Schematic
IN-
IN+
-VFB
+VOUT
-VOUT
1MΩ
0Ω
R6
R11 (NOTE)
0Ω
R10 (NOTE)
TP9
TP6
15
14
VEO
13
VEE
C5
+VFB
VREF
TP10
D2
VEO
0.01µF
VCO
16
0Ω
VEE
0Ω
C4
VCC
R7
0.01µF
19
10kΩ
-RIN SENSE
0Ω
0.01µF
R8
-RFB SENSE
20
VCMO 17
12
C2
0Ω
0.01µF
R3
C1
D1
+RFB SENSE +RIN SENSE
21
8 GND
11
VCO
+RIN
-RIN 18
10
TP2
+RFB
7 -R
FB
9
TP1
DNC
OPEN
22
R9
VCC
DNC
C7 (NOTE)
23
R5
6
IN-
24
R2 (NOTE)
5
100kΩ
R1 (NOTE)
4
DNC
IN+
TP8
0.01µF
3
U1
ISL28617
24 LD TSSOP
C3
2
NC
0Ω
1
1MΩ
R4
TP7
C6
OPEN
VOUT+
GND
TP3
TP4
VOUT-
NOTE: COMPONENT VALUES FOR AV = 10
BOARD ONLY. SEE TABLE 1 FOR VALUES
USED ON AV = 0.25 AND AV = 100 BOARDS.
TP5
FIGURE 4. ISL28617SM10EV1Z (AV = 10) EVALUATION BOARD SCHEMATIC
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Application Note 1748
TABLE 4. BILL OF MATERIALS FOR AV = 10 BOARD (ISL28617SM10EV1Z)
PART #
REF DES
QTY
DESCRIPTION
MANUFACTURER
GRM39X7R103K050
C1-C5
5
CAP, SMD, 0603, 0.01µF, 50V, 10%, Murata
X7R, ROHS
DNP
C6, C7
0
DO NOT POPULATE
5000
TP1, TP9
2
CONN-MINI TEST POINT, VERTICAL,
RED, ROHS
Keystone
5001
TP4
1
CONN-MINI TEST POINT, VERTICAL,
BLK, ROHS
Keystone
5002
TP7, TP8
2
CONN-MINI TEST POINT, VERTICAL,
WHITE, ROHS
Keystone
5004
TP3, TP5
2
CONN-MINI TEST POINT, VERTICAL,
YEL, ROHS
Keystone
S1A
D1, D2
2
DIODE-RECTIFIER, SMD, 2P, SMA,
50V, 1A, 1.4W, ROHS
Fairchild
ISL28617FVZ
U1
1
IC-40V R/R OUTPUT ADC DRIVER,
24P, TSSOP, 4X5, ROHS
Intersil
ERA-6YEB103V
R2
1
RES, SMD, 0805, 10k, 1/10W,
0.1%, MF, ROHS
Panasonic
ERA-6AEB104V
R1
1
RES, SMD, 0805, 100k, 1/8W,
0.1%, 25ppm, MF, ROHS
Panasonic
ERJ-3GEY0R00V
R3, R5, R7-R11
7
RES, SMD, 0603, 0Ω, 1/10W, TF,
ROHS
Panasonic
ERJ-3EKF1004V
R4, R6
2
RES, SMD, 0603, 1M, 1/10W, 1%,
TF, ROHS
Panasonic
DNP
TP2, TP6, TP10
0
DO NOT POPULATE
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
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