DATASHEET

ISL99201
Data Sheet
Filterless High Efficiency 1.5W Class D
Mono Amplifier
The ISL99201 is a fully integrated high efficiency class-D
mono amplifier. It is designed to maximize performance for
mobile phone applications. The application circuit requires a
minimum requirement of external components and operates
from a 2.4V to 5.5V input supply. It is capable of delivering
1.4W of continuous output power with less than 1% THD+N
driving a 8Ω load from a 5V supply.
The ISL99201 features a high-efficiency, low-noise
modulation scheme. It operates with 86% efficiency at
400mW into 8Ω and has a signal-to-noise ratio (SNR) that is
better than 95dB. The ISL99201 has a micro-power
shutdown mode with a typical shutdown current of 200nA.
Shutdown is enabled by applying a logic low to the SD pin.
November 1, 2013
FN6742.2
Features
• Filterless class D with efficiency > 86% at 400mW
• Click-pop suppression
• Slew rate control
• Spread spectrum switching
• Optional SYNC pin for master/slave operation without
interface
• 1.4W into 8Ω with less than 1% THD+N
• 2.4V to 5.5V single supply voltage
• Built-in resistors to reduce board component count
• Only one external component required (Fixed gain mode)
• Short circuit and thermal protection
The architecture of the devices allows it to achieve very low
level of pop-and-click. This minimizes voltage glitches at the
output during turn-on and turn-off, thus reducing audible
noise on activation and deactivation.
• Gain programmable 6dB, 9.6dB, 12dB and User
programmable
The fully differential input of the ISL99201 provides excellent
rejection of common mode noise on the input typically 75dB.
EMI suppression is achieved by SRC (Slew Rate Control).
Applications
The ISL99201 oscillator can be synchronized to an external
clock through the SYNC input, allowing the switching
frequency to be externally defined. The SYNC input also
allows multiple ISL99201 to be cascaded and frequency
locked; minimizing interference due to clock intermodulation.
• MP3 players
• Pb-Free (RoHS compliant)
• Mobile phones
• Portable gaming
• Portable electronics
• Educational toys
The ISL99201 also has excellent rejection of power supply
noise, including noise caused by GSM transmission bursts
and RF rectification. PSRR is typically 75dB at 217Hz. There
will be 4 versions of the part; they will consist of three fixed
gain settings (6dB, 9. 6dB, 12dB) and one user
programmable gain setting (need external resistors).
The ISL99201 has built-in thermal shutdown and output
short-circuit protection.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2009, 2012, 2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
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ISL99201
Ordering Information
PART
NUMBER
PACKAGE
Tape and Reel
(Pb-Free)
PKG.
DWG. #
GAIN SETTING
(dB)
TEMP. RANGE
(°C)
201A
6
-40 to +85
8 Ld 3x3 TDFN
L8.3x3A
ISL99201IRTAZ-TK (Notes 1, 2) 201A
6
-40 to +85
8 Ld 3x3 TDFN
L8.3x3A
201B
9.6
-40 to +85
8 Ld 3x3 TDFN
L8.3x3A
ISL99201IRTBZ-TK (Notes 1, 2) 201B
9.6
-40 to +85
8 Ld 3x3 TDFN
L8.3x3A
ISL99201IRTCZ-T (Notes 1, 2)
201C
12
-40 to +85
8 Ld 3x3 TDFN
L8.3x3A
ISL99201IRTCZ-TK (Notes 1, 2) 201C
12
-40 to +85
8 Ld 3x3 TDFN
L8.3x3A
201D
Prog.
-40 to +85
8 Ld 3x3 TDFN
L8.3x3A
ISL99201IRTDZ-TK (Notes 1, 2) 201D
Prog.
-40 to +85
8 Ld 3x3 TDFN
L8.3x3A
ISL99201IRTAZ-T (Notes 1, 2)
ISL99201IRTBZ-T (Notes 1, 2)
ISL99201IRTDZ-T (Notes 1, 2)
PART
MARKING
ISL99201IRTAEVZ
Evaluation Board
ISL99201IRTBEVZ
Evaluation Board
ISL99201IRTCEVZ
Evaluation Board
ISL99201IRTDEVZ
Evaluation Board
NOTES:
1. Please refer to TB347or details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-20.
Pinout
ISL99201
(8 LD TDFN)
TOP VIEW
SD 1
8 VO-
SYNC 2
7 GND
IN+ 3
6 VDD
IN- 4
5 VO+
*
2
FN6742.2
November 1, 2013
ISL99201
Absolute Maximum Ratings (Reference to GND)
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V
Thermal Resistance (Typical Note 3)
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C
Operating Supply Voltage (VDD Pin) . . . . . . . . . . . . . . 2.4V to 5.5V
θJA (°C/W)
TDFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . .
53
Maximum Junction Temperature (Plastic Package) -65°C to +150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C
Power Dissipation Ratings
8 Ld 3x3 TDFN
Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21.8mW/°C
Power Ratings
TA = +25°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7W
TA = +70°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7W
TA = +85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4W
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
3. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379
Electrical Specifications Typical Values Are Tested at VDD = 5V and the Ambient Temperature at +25°C.
PARAMETER
SYMBOL
Output Power
Po
Efficiency
η
Total Harmonic Distortion + Ratio
THD+N
Common-Mode Rejection Ratio
CMRR
TEST CONDITIONS
MIN
(Note 5)
fsw
Differential Output Offset Voltage
VOOS
MAX
(Note 5)
UNITS
RL = 8Ω, THD = 10%, f = 1kHz, 20kHz BW, VDD = 5.0V
1.4
W
RL = 8Ω, THD = 10%, f = 1kHz, 20kHz BW, VDD = 3.6V
0.75
W
RL = 8Ω, THD = 10%, f = 1kHz, 20kHz BW, VDD = 2.5V
0.4
W
RL = 8Ω, THD = 1%, f = 1kHz, 20kHz BW, VDD = 5.0V
1.15
W
90
%
PO = 1W into 8Ω each channel, f = 1kHz, VDD = 5.0V
0.05
%
PO = 0.5W into 8Ω each channel, f = 1kHz, VDD = 3.6V
0.05
%
PO = 0.2W into 8Ω each channel, f = 1kHz, VDD = 3.6V
0.09
%
VIC = 0.5V to (VDD - 0.8V); RL= 8Ω, VDD = 2.5V to 5.5V
-60
dB
-60
dB
POUT = 1.4W, 8Ω + 33µH, VDD = 5.0V
CMRRGSM VCM = 2.5V ± 1VP-P at 217Hz, RL= 8Ω
Average Switching Frequency
TYP
VDD = 5V
300
G = 6dB; 9.6dB; 12dB; 28dB.
375
450
kHz
0.2
5.0
mV
5.5
V
POWER SUPPLY
Supply Voltage Range
VDD
Power Supply Rejection Ratio
PSRR
2.4
VDD = 2.5V to 5.0V
-65
dB
-65
dB
VIN = 0V, No load, VDD = 5V
3.9
mA
VIN = 0V, No load, VDD = 3.6V
3.2
VIN = 0V, 8Ω + 33µH, VDD = 5V
3.9
mA
VIN = 0V, 8Ω + 33µH, VDD = 3.6V
3.8
mA
SD = GND
0.2
PSRRGSM VRIPPLT = 100mVRMS at 217Hz (Input AC-Coupled with
2µF capacitor)
Supply Current
IIN
ISD
(Note 4)
3
3.75
0.4
mA
µA
FN6742.2
November 1, 2013
ISL99201
Electrical Specifications Typical Values Are Tested at VDD = 5V and the Ambient Temperature at +25°C. (Continued)
PARAMETER
MIN
(Note 5)
TYP
MAX
(Note 5)
UNITS
D version user program
(Max Gain, Ri = 0Ω)
27.5
28.5
29.5
dB
A version
5.7
6
6.3
dB
B version
9.2
9.6
10
dB
C version
11.5
12
12.5
dB
SYMBOL
TEST CONDITIONS
GAIN CONTROL
Closed-Loop Gain
Differential Input Impedance
ZIN
SD = VDD, A version
70
kΩ
SD = VDD, B version
46.25
kΩ
SD = VDD, C version
35
kΩ
SD = VDD, D version, Ri = 2.5kΩ
7.5
kΩ
SD = GND
100
kΩ
SHUTDOWN CONTROL
Input Voltage High
VIH
1.2
V
Input Voltage Low
VIL
0.5
V
Turn-on Time
tWU
SD rising edge from GND to VDD
3.5
ms
Turn-off Time
tSD
SD falling edge from VDD to GND
5
µs
>100
kΩ
VDD = 3.6V, f = 20Hz to 20kHz, inputs are AC grounded,
AV = 6dB, A-weighting
27
µV
VDD = 3.6V, f = 20Hz to 20kHz, inputs are AC grounded,
AV 0 = 6dB, no weighting
35
µV
POUT = 1W, RL = 8Ω
102
dB
Output Impedance
ZOUT
SD = GND
NOISE PERFORMANCE
Output Voltage Noise
En
Signal-to-Noise Ratio
SNR
NOTES:
4. Limits established by Characterization and are not production tested
5. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
4
FN6742.2
November 1, 2013
ISL99201
Pin Descriptions
IN-
SD
Negative Differential Input.
Shutdown Active Low. This signal is used to shut down and activate
the part. It is 1.8V to 5V compatible. During shutdown, the part
draws less than 100nA input current. Coming out of shutdown takes
3.5ms and going into shutdown is instantaneous.
VO+
SYNC
Ground.
External clock input. This pin allows the chip to be synchronized to a
system clock. This helps in folding the spectral components and the
switching harmonic out of band of interest. The range of SYNC
frequency is from 250kHz to 800kHz.
VDD
IN+
Negative BTL output.
Positive BTL output.
GND
Power Supply.
VO-
Positive Differential Input.
Block Diagram (Notes)
SD
SHU TD O W N
LO G IC
CLICK A ND P O P
S UPP RE SS IO N
VD D
SY NC 1
S AW TO O TH
G EN ER ATO R
VDD
+180°
+
CO M P
B IAS A ND
RE FER EN CE
-
+
IN+
-
+
COMP
G A TE DR IV E
W ITH
SRC
O VE R
C UR R EN T
P R O TE C TIO N
VDD
+
-
IN-
+
VO -
G A TE D RIVE
W ITH
SR C
VO+
G ND
Notes:
Gain = 6dB, 9.6dB, 12dB (gain setting)
Gain =
140kΩ ; with external resistor
(Ri + 5kΩ)
5
FN6742.2
November 1, 2013
ISL99201
Typical Performance Characteristics
100
400
VDD = 2.5 V
90
350
SUPPLY CURRENT (mA)
80
EFFICIENCY (%)
70
VDD = 3.6 V
60
50
VDD= 5 V
40
30
20
250
0
0.25
0.50
0.75
1.00
1.25
OUTPUT POWER (W)
1.50
150
50
0
1.75
TOTAL HARMONIC DISTORTION (%)
SUPPLY CURRENT (mA)
RL= 8Ω + 33µH
4.0
3.5
RL= NO LOAD
3.0
2.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
INPUT SUPPLY (V)
5.5
0.25
0.50
0.75
1.0
1.25
OUTPUT POWER (W)
1.50
1.75
RL= 8Ω
VDD = 5V
10
VDD = 3.6V
VDD = 3V
1
VDD = 2.5V
0.10
0.01
0.01
6.0
FIGURE 3. SUPPLY CURRENT vs SUPPLY VOLTAGE
0.10
1
OUTPUT POWER (W)
10
FIGURE 4. TOTAL HARMONIC DISTORTION + NOISE vs
OUTPUT POWER
0.30
-20
VDD= 3.6V
VIC = 1VP-P
RL = 8Ω
POWER DISSIPATION (W)
CMRR (COMMON MODE
REJECTION RATIO - dB)
0
RL= 8Ω + 33µH
100
4.5
-50
-60
-70
-80
-90
-100
VDD = 5 V
FIGURE 2. SUPPLY CURRENT vs OUTPUT POWER
5.0
-40
VDD = 3.6 V
100
FIGURE 1. EFFICIENCY vs OUTPUT POWER
-30
VDD = 2.5 V
200
RL= 8Ω + 33µH
10
0
300
10
100
1k
FREQUENCY (Hz)
10k
FIGURE 5. COMMON MODE REJECTION MODE vs
FREQUENCY
6
100k
0.25
0.20
0.15
0.10
0.05
0
0
0.1
0.2
0.3 0.4 0.5 0.6 0.7
OUTPUT POWER (W)
0.8
0.9
FIGURE 6. POWER DISSIPATION vs OUTPUT POWER
FN6742.2
November 1, 2013
ISL99201
Typical Performance Characteristics (Continued)
2.5
VDD = 5V
RL = 8Ω
0.5
RL = 8Ω
f = 1kHz
2.0 GAIN = 4V/V
OUTPUT POWER (W)
POWER DISSIPATION (W)
0.6
0.4
0.3
0.2
0
0.25
0.50
0.75
1.00
OUTPUT POWER (W)
1.25
THD = 1%
0
2.5
1.50
FIGURE 7. POWER DISSIPATION vs OUTPUT POWER
4.0
3.5
SUPP L Y VOLTAGE (V)
4.5
5.0
10
TOTAL HARMONIC
DISTORTION + NOISE (%)
VDD = 2.5V
RL = 8Ω
0.015W
1
0.075W
0.2W
0.10
0.01
3.0
FIGURE 8. OUTPUT POWER vs SUPPLY VOLTAGE
10
TOTAL HARMONIC
DISTORTION + NOISE (%)
THD = 10%
1.0
0.5
0.1
0
1.5
10
100
1k
FREQUENCY (Hz)
10k
1
0.125W
0.25W
0.5W
0.1
0.01
10
100k
FIGURE 9. TOTAL HARMONIC DISTORTION + NOISE vs
FREQUENCY
VDD = 3.6V
RL = 8Ω
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 10. TOTAL HARMONIC DISTORTION + NOISE vs
FREQUENCY
10
-30
1W
SUPPLY RIPPLE
REJECTION RATIO (dB)
TOTAL HARMONIC
DISTORTION + NOISE (%)
VDD = 5V
RL = 8Ω
0.5W
1
0.25W
0.125W
0.10
INPUTS AC-GROUNDED
RL = 8Ω
-40 CL = 2µF
ISL99201A
VDD = 5V
-50
VDD = 2.5V
-60
VDD = 3.6V
-70
0.01
10
100
1k
10k
FREQUENCY (Hz)
100k
FIGURE 11. TOTAL HARMONIC DISTORTION + NOISE vs
FREQUENCY
7
-80
10
100
1k
FREQUENCY (Hz)
10k
100k
FIGURE 12. SUPPLY RIPPLE REJECTION RATIO vs
FREQUENCY - ISL99201A
FN6742.2
November 1, 2013
ISL99201
Typical Performance Characteristics (Continued)
-30
INPUTS AC-GROUNDED
RL = 8Ω
-40 CL = 2µF
ISL99201B
-50
-60
VDD = 3.6V
-70
VDD = 2.5V
-80
10
100
1k
FREQUENCY (Hz)
10k
SUPPLY RIPPLE
REJECTION RATIO (dB)
SUPPLY RIPPLE
REJECTION RATIO (dB)
VDD = 3.6V
40
VDD = 5V
-50
-60
VDD = 2.5V
-70
10
100
1k
FREQUENCY (Hz)
10k
-60
VDD = 3.6V
-70
100
1k
FREQUENCY (Hz)
10k
100k
-60
VDD = 2.5V
-70
100
TOTAL HARMONIC
REJECTION RATIO (%)
VDD = 3.6V
-50
-60
100
1k
FREQUENCY (Hz)
FIGURE 17. SUPPLY RIPPLE REJECTION RATIO vs
FREQUENCY - ISL99201C
8
100k
5V
0.1
2.5V
10k
10k
1
VDD = 2.5V
10
1k
FREQUENCY (Hz)
f = 1kHz
PO = 200mW
VDD = 5V
-70
VDD = 3.6V
-50
10
INPUTS FLOATING
RL = 8Ω
CL = 2µF
ISL99201C
VDD = 5V
FIGURE 16. SUPPLY RIPPLE REJECTION RATIO vs
FREQUENCY - ISL99201B
-20
-40
INPUTS FLOATING
RL = 8Ω
-30 C = 2µF
L
ISL99201B
-40
-80
10
100k
FIGURE 15. SUPPLY RIPPLE REJECTION RATIO vs
FREQUENCY - ISL99201A
SUPPLY RIPPLE
REJECTION RATIO (dB)
VDD = 2.5V
-20
INPUTS FLOATING
RL = 8Ω
CL = 2µF
ISL99201A
-30
-80
-50
VDD = 5V
FIGURE 14. SUPPLY RIPPLE REJECTION RATIO vs
FREQUENCY - ISL99201C
-20
-30
-40
-80
10
100k
FIGURE 13. SUPPLY RIPPLE REJECTION RATIO vs
FREQUENCY - ISL99201B
-80
INPUTS AC-GROUNDED
RL = 8Ω
CL = 2µF
ISL99201C
VDD = 5V
SUPPLY RIPPLE
REJECTION RATIO (dB)
SUPPLY RIPPLE
REJECTION RATIO (dB)
-30
100k
0.01
0
0.5
3.6V
1.0 1.5 2.0 2.5 3.0 3.5 4.0
COMMON MODE INPUT VOLTAGE (V)
4.5
5.0
FIGURE 18. TOTAL HARMONIC DISTORTION + NOISE vs
COMMON MODE INPUT VOLTAGE
FN6742.2
November 1, 2013
ISL99201
0
0
-10
-10
COMMON MODE
REJECTION RATIO (dB)
SUPPLY INPUT REJECTION RATIO (dB)
Typical Performance Characteristics (Continued)
-20
-30
VDD = 2.5V
-40
VDD = 3.6V
-50
-60
-20
-30
VDD = 2.5V
-40
-50
VDD = 3.6V
-60
VDD = 5V
-70
VDD = 5V
-80
0.25
-70
0.25 0.75 1.25 1.75 2.25 2.75 3.25 3.75 4.25 4.75 5.25
DC COMMON MODE VOLTAGE (V)
1.25
2.25
3.25
4.25
COMMON INPUT VOLTAGE (V)
5.25
FIGURE 20. COMMON MODE REJECTION RATIO vs COMMON
MODE INPUT VOLTAGE
FIGURE 19. SUPPLY RIPPLE REJECTION RATIO vs DC
COMMON MODE VOLTAGE
Typical Applications
VDD
DIFFERENTIAL
INPUT
SAWTOOTH
GENERATOR
SYNC
C3
ZIN
VIN+
RI
+
PWM
RI
VIN-
RI, REV D
VO+
H-BRIDGE
POWER
STAGE
AND
SR
CONTROL
VO-
ZIN
SD
BIAS
AND
REFERENCE
GND
FIGURE 21. TYPICAL CIRCUIT WITH DIFFERENTIAL INPUT
VDD
SAWTOOTH
GENERATOR
SYNC
C3
DIFFERENTIAL
INPUT
ZIN
RI
VIN+
+
PWM
RI
VIN-
H-BRIDGE
POWER
STAGE
AND
SR
CONTROL
VO+
VO-
ZIN
RI, REV D
SD
BIAS
AND
REFERENCE
GND
FIGURE 22. TYPICAL CIRCUIT WITH DIFFERENTIAL INPUT AND INPUT CAPACITORS
9
FN6742.2
November 1, 2013
ISL99201
Typical Applications (Continued)
VDD
SAWTOOTH
GENERATOR
SYNC
C3
DIFFERENTIAL
INPUT
ZIN
C1
RI
VIN+
+
C2
PWM
RI
VIN-
H-BRIDGE
POWER
STAGE
AND
SR
CONTROL
VO+
VO-
RI, REV D
C1 = C2 = 1µF
SD
BIAS
AND
REFERENCE
GND
FIGURE 23. TYPICAL CIRCUIT WITH SINGLE-ENDED INPUT
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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10
FN6742.2
November 1, 2013
ISL99201
Package Outline Drawing
L8.3x3A
8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
Rev 4, 2/10
( 2.30)
3.00
( 1.95)
A
B
3.00
( 8X 0.50)
6
PIN 1
INDEX AREA
(4X)
(1.50)
( 2.90 )
0.15
PIN 1
TOP VIEW
(6x 0.65)
( 8 X 0.30)
TYPICAL RECOMMENDED LAND PATTERN
SEE DETAIL "X"
2X 1.950
PIN #1
INDEX AREA
0.10 C
0.75 ±0.05
6X 0.65
C
0.08 C
1
SIDE VIEW
6
1.50 ±0.10
8
C
8X 0.30 ±0.05
8X 0.30 ± 0.10
0 . 2 REF
5
4
0.10 M C A B
0 . 02 NOM.
0 . 05 MAX.
2.30 ±0.10
DETAIL "X"
BOTTOM VIEW
NOTES:
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to ASME Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension applies to the metallized terminal and is measured
between 0.15mm and 0.20mm from the terminal tip.
5.
Tiebar shown (if present) is a non-functional feature.
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
7.
Compliant to JEDEC MO-229 WEEC-2 except for the foot length.
either a mold or mark feature.
11
FN6742.2
November 1, 2013
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