an1270

ISL55141, ISL55142, ISL55143
Evaluation Board User’s Manual
®
Application Note
January 17, 2007
AN1270.1
Before Getting Started
VEE
PD
QA
QB
VOL
VOH
CVB
VINP
CVA
VCC
VEE
14
12
11
10
9
8
ISL55141_TSSOP
FIGURE 1. THERE ARE NO GROUND PINS ON THESE
COMPARATORS. VEE ALWAYS PROVIDES THE
MOST NEGATIVE POWER CONNECTION.
JP01
VOL = VEE
VOL
2
VOL
GND
TP04_VCC_VEE
C4
C3
+4.7µF 0.1µF
DIF--
VCC
2
JP02
JP03
VOL = GND VEE = GND
DIF+
1
VEE
1
No voltage should be greater than VCC or less than VEE.
Also, VOH must be greater than VOL. Since there are so
many variations of use, each evaluation board provides
three jumpers relating to basic power strapping.
4
5
6
7
2
Take time to review the ISL55141, ISL55142, ISL55143 Data
Sheet (FN6230) and become familiar with the part’s basic
functions and power options. Note also that FN6230 super
cedes this document with respect to updates and
modifications. Always refer to that document if discrepancies
occur.
1
1
This document supplements the ISL55141, ISL55142,
ISL55143 specification FN6230. Evaluation board users
should review that document to obtain information on the
part’s basic functionality and power requirements. A most
important note is before powering up the board, review
the Power-up Sequence in that specification. There are
many DC sources utilized, therefore a user may
inadvertently mis-apply the power sources causing damage
to the part.
VEE
GND
All ISL55141, ISL55142, ISL55143 boards are designed
essentially in the same fashion. This document provides the
user with the information regarding the evaluation board
design, circuitry layout and jumper options.
GND - BANANA JACK VCC - BANANA JACK VEE - BANANA JACK
VOL - BANANA JACK
VOH
TP03-VOH_VOL
Jumper Options - VEE, VOL and GND
First, VEE can be negative with respect to ground for
receiving negative input ranges on the VINPs (comparator
Inputs). The comparator outputs QA, QB toggle between
VOH and VOL. VOL could also be a negative voltage,
although this is usually not the case. VOL should never be
more negative than VEE.
For single supply operations, the user may wish to connect
VEE to ground and VOL as well. Therefore, on each
evaluation board there are positions for three jumpers (JP01,
JP02, JP03).
The user should make note that the ISL55141, ISL55142,
ISL55143 all operate with VEE as the negative reference.
There are no actual ground connection to the comparators
unless VEE itself is connected to ground.
DIF+
C1
C2
+4.7µF 0.1µF
DIF-VOH - BANANA JACK
VOL
FIGURE 2. THREE JUMPERS ARE AVAILABLE TO SET USER
POWER STRAPPING OPTIONS.
Before beginning the evaluation, the user should determine
the desired relationship between GND, VEE and VOL.
JP01 Connects VOL to VEE
Both VEE and VOL voltage busses are negative with respect
to ground. Comparator receives negative inputs and
translates the QA/QB outputs with a negative low voltage.
JP02 Connects VOL to GND
VOL low is connected to ground, VEE is negative with
respect to ground. Comparator inputs operate below ground
but QA/QB level translation in reference to ground.
JP03 Connects VEE to GND
Both VOL and VEE are referenced to ground. There are no
negative voltage requirements with respect to Comparator
Inputs or level translation on the QA/QB Outputs
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006-2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Application Note 1270
Scope Probe Connections
QA_J3
Another topic to cover before getting started is the evaluation
board physical connections for waveform observations. On
each schematic version you will see a component with pins
designated as DIF+ and DIF-. This is not an active
component but a dual pin header physically design to
accommodate connection of active differential probes. This
will minimize ground lead inductance and capacitive loading
while make waveform observations. However, the user must
also be mindful of max voltage limitations when using these
types of probes. The ISL5514x comparators cover a large
voltage range, so double check the probe’s specifications.
SCOPE PROBE CONNECTIONS
QA0
TP01-QA_VOL
DIF+
R1
50Ω
1
DIF--
VOL
QB_J4
QB0
TP02-QB_VOL
QA0
QB0
VOL
VOH
DIF+
R2
50Ω
TP07-VINP
DIF+
PD
DIF--
CVB
VINP
CVA
VCC
VEE
VOL
R14
0Ω
VINP_J8
R14
0Ω
R18
0Ω
R20
NOT POPULATED
GND
GND
14
12
11
10
9
8
VINP_J8
CVB_BUS
VINP
CVA_BUS
VCC
VEE
_TSSOP
DIF+
R20
NOT POPULATED
GND
DIF--
12
11
10
9
8
VINP
TP01-QA_VOL
R18
0Ω
CVB
VINP
CVA
VCC
VEE
DIF--
DIF--
TP07-VINP
QA
QB
VOL
VOH
ISL55141_TSSOP
DIF+
R1
50Ω
14
FIGURE 4. BNC CONNECTIONS ON THE QA/QB
COMPARATOR OUTPUTS HAVE THE SHIELD
CONNECTED TO THE VOL BUS. NOTE: YOU MAY
WISH TO REMOVE THE 50Ω TERMINATIONS.
DIF--
QA0
PD
VOL
DIF+
QA_J3
4
5
6
7
VEE
GND
FIGURE 3. DUAL1” SPACED PINS ARE PLACED ON THE
EVALUATION BOARDS FOR DIFFERENTIAL
PROBE CONNECTIONS
Scope probe test points (TP) are positioned across all
inputs, outputs and VCC and VEE.
BNC Connections
This series of evaluation boards also provides BNC
connections for input and output signals. A key point to
remember is the ISL55141, ISL55142, ISL55143 comparator
outputs (QA/QB) operate with the VOH voltage as a High
and VOL voltage as a Low. QA/QB BNC’s, which are
connected to the outputs, have the shield connected to the
VOL voltage bus. Keep this in mind when making BNC
connections to avoid connecting the GND shield of the BNC
inputs to the VOL shield of the BNC outputs.
Also note that the comparator outputs have 50Ω
terminations that you may need to remove for your
application.
FIGURE 5. BNC CONNECTIONS ON THE HIGH SPEED VINP
PINS HAVE THE SHIELD CONNECTED TO GND.
NOTE: TWO SMD SERIES POSITIONS PLUS ONE
POSITION TO GROUND ARE AVAILABLE FOR
USER SPECIFIC CIRCUITRY.
Power-Down Feature
All boards provide the same capability for testing the
power-down feature. A SPDT- center OFF switch is provided
for manual testing of the feature. In one position the PD input
is connected to VCC (Power-down enabled). In the other
position the PD Input is connected to VEE (power-down
disabled).
S1 - POWER-DOWN CONTROL
SPDT - CENTER OFF
VDD
VEE
PD - BN_J5
PD
GND
1
4
5
6
7
VEE
PD
14
QA
QB
VOL
VOH
CVB
VINP
CVA
VCC
VEE
12
11
10
9
8
ISL55141_TSSOP
FIGURE 6. ALL ISL5514X EVALUATION BOARDS HAVE THE
SAME POWER-DOWN CIRCUITRY.
2
AN1270.1
January 17, 2007
Application Note 1270
Finally the center off position provides a means of
connecting a repetitive signal source to the PD input. This is
so the user can observe power-down enable/disable timing.
An important note to remember when using the PD - BNC:
1. Place the switch in center-off position.
2. The PD input is referenced to VCC/VEE. The low
amplitude of the PD input must match the VEE voltage.
The high amplitude must be close to VCC.
Comparator Threshold Rails
28
CVB0
VINP0
CVA0
CVB1
VINP1
CVA1
CVB2
VINP2
CVA2
QA0
QB0
QA1
QB1
QA2
QB2
QA3
QB3
CVB_BUS
27
26
25
24
23
22
21
20
Once static observations check out, you can then increase
power current limits for VCC/VEE and VOH/VOL and apply
higher frequency inputs to the VINP pins.
Layout Information
All evaluation boards have complete silk-screen information
regarding test points, jumpers and component placements.
The silk-screen on the board you receive will provide
up-to-date layout information.
Included in the following pages are three schematics.
ISL55141 single comparator device, ISL55142 dual
comparator and ISL55143 quad comparator device. The
Evaluation boards are laid out for the TSSOP packages for
the ISL55141 and ISL55142, while the ISL55143 is the QFN
package. Please refer to the device specification for part
numbers/options for these and other package ordering.
19
CVA_BUS
FIGURE 7. ISL55142 AND ISL55143 COMPARATOR
THRESHOLD CVA/CVB INPUTS ARE TIED
TOGETHER TO EITHER THE CVA_BUS OR
CVB_BUS.
3
When first powering up the device, set all power bus inputs
to minimum current levels needed for quiescent operation.
Check the device out statically with DC inputs on the VINP
pins and observe that the QA/QB outputs toggle when the
VINP voltage crosses the CVA and CVB thresholds.
Schematics are drawn with physical location in mind. Any
changes in electrical circuitry will be updated in this
document as needed.
10
11
12
13
14
15
16
17
18
ISL55143_QFN
Please refer to the device specification for power-up
sequencing and current requirements. Also note that the
frequency of operation and number of comparators will
determine the current needed. There are graphs in the
specification regarding current characteristics.
Schematic Information
VOH
VOL
VOH
VOL
VEE
VCC
CVA3
VINP3
CVB3
2
3
4
5
6
7
8
9
PD
VCC
VEE
VCC
VEE
34
33
32
31
Each comparator has two thresholds. CVA/CVB. The data
sheet explains the operation of these analog inputs.
However, it should be mentioned that while the ISL55142
(Dual) and ISL55143 (QUAD) comparators have separate
threshold inputs for each comparator, the evaluation boards
have all CVA inputs tied to single CVA_BUS. Accordingly, all
CVB inputs are tied to a single CVB_BUS.
Initial Power-Up
Bill of Material
A bill of material of the ISL55142 evaluation board is
included on page 6. It provides sources for special
components such as the BNC connectors and banana jacks.
All other parts are QPL standard passive components. Refer
to device specification (FN6230) when ordering
replacements for actual ISL55141, ISL55142 or ISL55143
devices.
AN1270.1
January 17, 2007
Application Note 1270
ISL55142IVZ Evaluation Board Schematic
S1 - POWER DOWN CONTROL
SPDT - CENTER OFF
VEE
VDD
VINP
PD - BN_J5
TP07-VINP
DIF+
PD
DIF-QA_J3
QA0
TP01-QA_VOL
GND
R1
50Ω
DIF+
QB_J4
QB0
R2
50Ω
1 .VEE
DIF--
VOL
TP02-QB_VOL
QA0
QB0
VOL
VOH
DIF+
4
5
6
7
CVB_BUS
CVA_BUS
VCC
VEE
CVB_BUS
C5
0.1μF
DIF+
VINP
VINP_J8
R14
0Ω
R20
NOT POPULATED
GND
CVB_BUS
TP06_CVB
PD 14
CVB 12
VINP 11
CVA 10
VCC 9
VEE 8
QA
QB
VOL
VOH
R18
0Ω
DIF--
J9-CVB - BANANA JACK
C7
+ 4.7μF
GND
ISL55141_TSSOP
GND
J10-GND - BANANA JACK
DIF--
CVA_BUS
VOL
TP05_CVA
VOL
VOL
2
GND
DIF--
C4 C3
+ 4.7μF 0.1μF
DIF+
VCC
2
1
VOL
1
JP02
JP03
VOL=GND VEE=GND
DIF-VOH - BANANA JACK
GND
TP04_VCC_VEE GND
DIF+
2
VOL - BANANA JACK
J11-CVA - BANANA JACK
C8
+ 4.7μF
DIF--
VEE
1
TP03-VOH_VOL
C1
C2
+4.7μF 0.1μF
DIF+
JP01
VOL=VEE
VOH
CVA_BUS
C6
0.1μF
VEE
GND
GND - BANANA JACK VCC - BANANA JACK VEE - BANANA JACK
FIGURE 8. ISL55141IVZ TSSOP SINGLE COMPARATOR EVALUATION BOARD SCHEMATIC
4
AN1270.1
January 17, 2007
ISL55142IVZ Evaluation Board Schematic
S1 - POWER-DOWN CONTROL
SPDT - CENTER OFF
VINP0_J8
VINP0
VEE
R14
0Ω
R18
0Ω
VDD
VINP1
PD - BN_J5
TP10-VINP0
R20
NOT POPULATED
GND
VINP1_J14
R10
0Ω
R8
0Ω
TP07-VINP1
DIF+
R9
NOT POPULATED
DIF+
PD
DIF-GND
GND
DIF--
GND
GND
5
CVA_BUS
QB1_J13
TP01-QA0_VOL
DIF--
VOL
QB0
R2
50Ω
TP02-QB0_VOL
CVB_BUS
VINP1
VCC
VEE
16
15
VCC
VEE
QB1
QA1
12
11
VEE
VCC
VOH
VOL
QA0
QB0
VOL
ISL55142IVZ_TSSOP
JP01
VOL = VEE
VEE
DIF+
DIF--
1
VOL
20
19
18
VCC
JP02
JP03
VOL = GND VEE = GND
DIF+
VOL
R7
50Ω
DIF--
VOL
QB1
QA1
QA1_J12
TP09-QA1_VOL
DIF+
R6
50Ω
DIF--
VOL
CVB_BUS
TP04_VCC_VEE
C4
C3
C9
+4.7µF 0.1µF 0.1µF
TP06_CVB
GND
VEE
CVB_BUS
C5
0.1µF
J9-CVB - BANANA JACK
C7
+ 4.7µF
DIF-GND
GND
GND J10-GND - BANANA JACK
DIF-VOH - BANANA JACK
QA1
2
1
2
1
TP03-VOH_VOL
C2
C1
+4.7µF 0.1µF
DIF+
DIF+
VOH
VOL - BANANA JACK
QB1
CVA_BUS
TP05_CVA
VOL
CVA_BUS
C6
0.1µF
DIF+
GND - BANANA JACK VCC - BANANA JACK
VEE - BANANA JACK
DIF-GND
J11-CVA - BANANA JACK
C8
+4.7µF
GND
FIGURE 9. ISL55142IVZ TSSOP DUAL COMPARATOR EVALUATION BOARD
Application Note 1270
QB0_J4
.
CVB0
VINP0
CVA0
PD
VEE
VCC
VOH
VOL
QA0
QB0
CVB1
VINP1
CVA1
1
2
3
4
5
6
7
8
9
10
VINP0
TP10-QB1_VOL
DIF--
DIF+
R1
50Ω
DIF+
QA0
2
QA0_J3
AN1270.1
January 17, 2007
Application Note 1270
ISL5514x Bill of Materials
QTY
REF DES
7
J3-J5, J8, J12-J14
2
J7, J10
1
DESCRIPTION
50Ω PCB mount receptacle
PART NUMBER
31-5329-52RFX
MANUFACTURER
AMPHENOL
Right angle PCB mount insulated socket - single (black) 571-0100
DELTRON
J1
Right angle PCB mount insulated socket - single (blue)
571-0200
DELTRON
1
J20
Right angle PCB mount insulated socket - single (brown) 571-0300
DELTRON
1
J2
Right angle PCB mount insulated socket - single (green) 571-0400
DELTRON
1
J6
Right angle PCB mount insulated socket - single (red)
571-0500
DELTRON
1
J9
Right angle PCB mount insulated socket - single (white) 571-0600
DELTRON
1
J11
Right angle PCB mount insulated socket - single (yellow) 571-0700
DELTRON
2
C5, C6
Multilayer cap
C1608X7R1H104K
TDK
1
S1
Sealed subminiature toggle switch
ET03SD1CBE
ITT CANNON-C&K
3
C2, C3, C9
Multilayer cap
H1045-00104-25V10
GENERIC
4
C1, C4, C7, C8
Multilayer cap
H1065-004R7-50VR25
GENERIC
4
R3, R5, R8, R10
Thick film chip resistor
H2511-00R00-1/16W1
GENERIC
4
R1, R2, R6, R7
Thick film chip resistor
H2513-049R9-1/8W1
GENERIC
2
R4, R9
Thick film chip resistor (do not populate)
H2513-DNP-DNP-1
GENERIC
1
U1
High-speed CMOS window comparators (Pb-free)
ISL55142ARZ
INTERSIL
JUMPER2_100
GENERIC
13
JP01-JP03, TP01-TP010 Two-pin jumper
6
AN1270.1
January 17, 2007
Application Note 1270
ISL55143IRZ Evaluation Board Schematic
VINP0
QA0_J3
QA0
TP01-QA0_VOL
TP10-VINP0
DIF+
DIF+
DIF--
DIF--
R1
50Ω
QB0_J4
R18
0Ω
GND
TP02-QB0_VOL
TP10-VINP1
S1 - POWER-DOWN CONTROL
SPDT - CENTER OFF
DIF+
R2
50Ω
DIF--
VEE
VDD
DIF+
PD - BN_J5
QA1
GND
DIF--
QA1
2
3
4
5
6
7
8
9
QB1
QA2
TP05-QA3_VOL
QA2
QB2
DIF+
R11
50Ω
VOH
VOL
VOH
VOL
VEE
VCC
CVA3
VINP3
CVB3
QA2_J17
QA3
DIF--
QB3
27
26
25
24
23
22
21
20
19
CVB0
VINP0
CVA0
CVB1
VINP1
CVA1
CVB2
VINP2
CVA2
QA0
QB0
QA1
QB1
QA2
QB2
QA3
QB3
ISL55143_QFN
VINP3
DIF+
CVB_BUS
PD
VCC
VEE
VCC
VEE
QB0
DIF--
C9
NOT POPULATED
GND
TP10-VINP3
QA0
DIF+
R4
NOT POPULATED
GND
DIF-VINP1
GND
CVB_BUS
TP16_CVB
VINP2
CVB_BUS
C5
0.1µF
DIF+
J9-CVB - BANANA JACK
C7
+4.7µF
DIF--
TP06-QB2_VOL
CVA_BUS
VOH
GND
J10-GND - BANANA JACK
VCC
CVA_BUS
DIF+
VINP3
DIF--
TP15_CVA
JP01
VOL = VEE
GND
TP01_VCC_VEE
2
1
TP07-QA3_VOL
DIF+
VOL
QB3_J13
QB3
R7
50Ω
GND
2
JP02
JP03
VOL = GND VEE = GND
DIF--
1
R6
50Ω
2
QA3
C6
0.1µF
DIF+
DIF--
1
QA3_J12
CVA_BUS
VCC
C9
C3
C4
+4.7µF 0.1µF 0.1µF
J11-CVA - BANANA JACK
C8
+4.7µF
GND
DIF--
R15
50Ω
DIF+
QB2
VINP3_J8
R5
0Ω
R3
0Ω
GND
QB2_J21
VINP2_J14
GND
28
34
33
32
31
TP05-QB1_VOL
R16
50Ω
R6
0Ω
R4
0Ω
DIF-VINP0
10
11
12
13
14
15
16
17
18
QB1
DIF+
VCC
VEE
QB1_J21
GND
TP10-VINP2
DIF+
VINP1_J15
R9
NOT POPULATED
GND
DIF--
TP03-QA1_VOL
R12
50Ω
R10
0Ω
R8
0Ω
VINP2
QA1_J18
VINP0_J16
R20
NOT POPULATED
GND
VINP1
QB0
R14
0Ω
VEE
TP08-QB3_VOL
GND
VOH
DIF+
DIF--
TP03-VOH_VOL
VOL - BANANA JACK
C1
C2
+4.7µF 0.1µF
DIF+
DIF--
VOH - BANANA JACK
GND - BANANA JACK VCC - BANANA JACK VEE - BANANA JACK
VOL
FIGURE 10. ISL55143IRZ QFN QUAD COMPARATOR EVALUATION BOARD
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to
verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
7
AN1270.1
January 17, 2007
Similar pages