ISL23511 ® Single Push Button Controlled Potentiometer (XDCP™) Data Sheet January 21, 2008 Low Noise, Low Power, 32 Taps, Push Button Controlled Potentiometer Features • Solid-state volatile potentiometer The Intersil ISL23511 is a three-terminal digitally-controlled potentiometer (XDCP) implemented by a resistor array composed of 31 resistive elements and a wiper switching network. The ISL23511 features a push button control, a shutdown mode, as well as an industry-leading µTQFN package. • Push button controlled • Single or Auto increment/decrement - Fast Mode after 1s button press • Shutdown Mode The push button control has individual PU and PD inputs for adjusting the wiper. To eliminate redundancy, the wiper position will automatically increment or decrement if one of these inputs is held longer than 1s. Forcing both PU and PD low for more than 2s activates shutdown mode. Shutdown mode disconnects the top of the resistor chain and moves the wiper to the lowest position, minimizing power consumption. The three terminals accessing the resistor chain naturally configure the ISL23511 as a voltage divider. A rheostat is easily formed by floating an end terminal or connecting it to the wiper. PD • Contrast Control • Programming Bias Voltages NC RW PU PD RH VSS RL O 1 8 2 SOIC 7 3 (TOP VIEW) 6 4 • Packages - 8 Ld SOIC and 10 Ld µTQFN (2.1mmx1.6mm) • LED/LCD Brightness Control 5 CONTROL BLOCK • RTOTAL value = 10kΩ, 50kΩ • Volume Control PU 1 9 VCC PD 2 µTFQFN 8 NC RH 3 (TOP VIEW) 7 RL VSS 4 6 RW RH PU • Low power CMOS - VCC = 2.7V to 5.5V - Terminal voltage, 0 to VCC - Standby current, 3µA max Applications 10 O • 32 wiper tap points - Zero scale wiper position on power-up • Pb-free (RoHS compliant) NC VCC (SUPPLY VOLTAGE) FN6588.1 5 • Ladder Networks VCC NC RL RW VSS (GROUND) Ordering Information PART NUMBER PART MARKING RTOTAL (kΩ) TEMP. RANGE (°C) PACKAGE (Pb-free) PKG. DWG. # ISL23511WFB8Z* (Note 1) 23511 WFBZ 10 -40 to +125 8 Ld SOIC M8.15 ISL23511UFB8Z* (Note 1) 23511 UFBZ 50 -40 to +125 8 Ld SOIC M8.15 ISL23511WFRU10Z* (Note 2) GA 10 -40 to +125 10 Ld µTQFN L10.2.1x1.6A ISL23511UFRU10Z* (Note 2) FZ 50 -40 to +125 10 Ld µTQFN L10.2.1x1.6A *Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007, 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL23511 Pinouts ISL23511 (10 LD µTQFN) TOP VIEW ISL23511 (8 LD SOIC) TOP VIEW 1 8 VCC PD 2 7 NC RH 3 6 RL VSS 4 5 RW PU 1 9 VCC PD 2 8 NC RH 3 7 RL VSS 4 6 RW 5 PU O 10 NC O NC Pin Descriptions SOIC PIN µTQFN PIN SYMBOL 1 1 PU The PU is a negative-edge triggered input with internal pull-up. Toggling PU will move the wiper close to RH terminal. 2 2 PD The PD is a negative-edge triggered input with internal pull-up. Toggling PD will move the wiper close to RL terminal. 3 3 RH The RH and RL pins of the ISL23511 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in relation to wiper movement direction selected by the PU/PD input. 4 4 VSS Ground 5 6 RW The RW pin is the wiper terminal of the potentiometer, which is equivalent to the movable terminal of a mechanical potentiometer. 6 7 RL The RH and RL pins of the ISL23511 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in relation to wiper movement direction selected by the PU/PD input. 7 5, 8, 10 NC No connection 8 9 VCC Supply Voltage BRIEF DESCRIPTION Block Diagrams PU PD VCC (SUPPLY VOLTAGE) 5-BIT UP/DOWN COUNTER RH 31 30 29 RH PU PD CONTROL BLOCK RW ONE 28 OF THIRTY TWO DECODER TRANSFER GATES RESISTOR ARRAY RW 2 RL 1 0 VSS (GROUND) GENERAL RL DETAILED 2 FN6588.1 January 21, 2008 ISL23511 Absolute Maximum Ratings Thermal Information Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Voltage at PU and PD Pin with Respect to GND . -0.3V to VCC + 0.3 VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V Voltage at any DCP Pin with Respect to GND. . . . . . . . -0.3V to VCC IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA Latchup . . . . . . . . . . . . . . . . . . . . . . . . . Class II, Level A @ +125°C ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .250V Thermal Resistance (Typical, Note 3, 4) θJA (°C/W) θJC (°C/W) 8 Lead SOIC . . . . . . . . . . . . . . . . . . . . 120 10 Lead µTQFN . . . . . . . . . . . . . . . . . 150 48.3 Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Temperature Range (Extended Industrial). . . . . . . .-40°C to +125°C VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15mW Wiper Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3.0mA CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 3. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 4. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Potentiometer Specifications Over recommended operating conditions, unless otherwise specified. SYMBOL RTOTAL PARAMETER RH to RL Resistance TEST CONDITIONS MIN (Note 18) W option RW UNIT kΩ 50 -20 kΩ +20 % End-to-End Temperature Coefficient W option ±80 ppm/°C (Note 16) U option ±125 ppm/°C (Note 16) Wiper Resistance VCC = 3.3V, wiper current IRW = VCC/RTOTAL VRH, VRL VRH and VRL Terminal Voltages VRH and VRL to GND Noise on Wiper Terminal From 0Hz to 10MHz CH/CL/CW (Note 17) Potentiometer Capacitance ILkgDCP MAX (Note 18) 10 U option RH to RL Resistance Tolerance TYP (Note 5) Leakage on DCP Pins 130 0 Voltage at pin from GND to VCC 400 Ω VCC V -80 dBV 10/10/25 pF 0.05 0.4 µA -1 1 LSB (Note 6) -0.5 0.5 LSB (Note 6) 0.3 3 LSB (Note 6) VOLTAGE DIVIDER MODE (0V @ RL; VCC @ RH; measured at RW unloaded) INL (Note 10) Integral Non-linearity DNL (Note 9) Differential Non-linearity Monotonic over all tap positions ZSerror (Note 7) Zero-scale Error W option FSerror (Note 8) Full-scale Error TCV (Note 11) fCUTOFF 0 U option 0 0.3 1 W option -3 -0.3 0 U option -1 -0.3 0 LSB (Note 6) Ratiometric Temperature Coefficient Wiper from 5 hex to 1F hex for W and U option ±25 ppm/°C 3dB Cut-Off Frequency Wiper at the middle scale, W option 500 kHz Wiper at the middle scale, U option 75 kHz RESISTOR MODE (Measurements between RW and RL with RH not connected, or between RW and RH with RL not connected) RINL (Note 15) Integral Non-linearity 3 DCP register set between 1 hex and 1F hex; monotonic over all tap positions; W option -1.5 1.5 MI (Note 12) DCP register set between 1 hex and 1F hex; monotonic over all tap positions; U option -1 1 MI (Note 12) FN6588.1 January 21, 2008 ISL23511 Potentiometer Specifications Over recommended operating conditions, unless otherwise specified. (Continued) SYMBOL PARAMETER TEST CONDITIONS MIN (Note 18) RDNL (Note 14) Differential Non-linearity W and U option Roffset (Note 13) Offset W option 0 U option 0 DC Electrical Specifications SYMBOL PARAMETER VCC Active Current ISB Standby Current ILkg PU, PD Input Leakage Current VIH PU, PD Input HIGH Voltage PU, PD input LOW Voltage PU, PD Input Capacitance Rpull_up (Note 17) Pull-up Resistor for PU and PD AC Electrical Specifications SYMBOL TEST CONDITIONS MIN (Note 18) VIN = VSS to VCC MI (Note 12) 1 3 MI (Note 12) 0.5 1 MI (Note 12) TYP (Note 5) MAX (Note 18) UNIT 150 µA 3 µA +2 µA -2 VCC x 0.7 V VCC x 0.1 VCC = 3.3V, TA = +25°C, f = 1MHz V 10 pF 1 MΩ Over recommended operating conditions unless otherwise specified. PARAMETER tGAP Time Between Two Separate Push Button Events tDB Debounce Time tR VCC UNIT 0.5 0.6 VIL tstdn (Note 17) -0.5 VCC = 5.5V, perform wiper move operation CIN (Note 17) tS FAST MAX (Note 18) Over recommended operating conditions unless otherwise specified. ICC tS SLOW TYP (Note 5) MIN (Note 18) TYP (Note 5) MAX (Note 18) 2 UNIT ms 15 30 ms Wiper Change on a Slow Mode 100 250 375 ms Wiper Change on a Fast Mode 25 50 75 ms Time to Enter Shutdown Mode (keep PU and PD LOW) VCC Power-up Rate 2 0.2 s 50 V/ms NOTES: 5. Typical values are for TA = +25°C and 3.3V supply voltage. 6. LSB: [V(RW)31 – V(RW)0]/31. V(RW)31 and V(RW)0 are voltage on RW pin for the DCP register set to 1F hex and 00 hex respectively. LSB is the incremental voltage when changing from one tap to an adjacent tap. 7. ZS error = V(RW)0/LSB. 8. FS error = [V(RW)31 – VCC]/LSB. 9. DNL = [V(RW)i – V(RW)i-1]/LSB -1, for i = 1 to 31; i is the DCP register setting. 10. INL = [V(RW)i – i • LSB – V(RW)]/LSB for i = 1 to 31 Max ( V ( RW ) i ) – Min ( V ( RW ) i ) 10 6 11. TC = --------------------------------------------------------------------------------------------- × --------------------- for i = 5 to 31 decimal, T = -40°C to +125°C. Max( ) is the maximum value of the wiper V [ Max ( V ( RW ) i ) + Min ( V ( RW ) i ) ] ⁄ 2 +165°Cvoltage and Min ( ) is the minimum value of the wiper voltage over the temperature range. 12. MI = |RW31 – RW0|/31. MI is a minimum increment. RW31 and RW0 are the measured resistances for the DCP register set to 1F hex and 00 hex respectively. 13. Roffset = RW0/MI, when measuring between RW and RL. Roffset = RW31/MI, when measuring between RW and RH. 14. RDNL = (RWi – RWi-1)/MI, for i = 1 to 31. 15. RINL = [RWi – (MI • i) – RW0]/MI, for i = 1 to 31. 6 for i = 5 to 31, T = -40°C to +125°C. Max( ) is the maximum value of the resistance and Min ( ) is [ Max ( Ri ) – Min ( Ri ) ] 10 TC R = ---------------------------------------------------------------- × --------------------- the minimum value of the resistance over the temperature range. [ Max ( Ri ) + Min ( Ri ) ] ⁄ 2 +165°C 17. Limits should be considered typical and are not production tested. 16. 18. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested. 4 FN6588.1 January 21, 2008 ISL23511 Slow Mode Timing tDB tGAP PU MI* VW * MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage. Fast Mode Timing tDB PU tS FAST tS SLOW MI* VW 1s * MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage. Shutdown Mode Timing tDB 2s SHUTDOWN MODE PU PD VW 5 FN6588.1 January 21, 2008 ISL23511 Typical Performance Curves 160 3.0 VCC = 5.5V +125ºC 2.5 120 2.0 +25ºC 100 ICC (µA) WIPER RESISTANCE (Ω) 140 80 60 VCC = 5.5V VCC = 2.7V 1.0 -40ºC 40 0.5 20 0 1.5 0 5 10 15 20 25 0 -40 30 -15 10 TAP POSITION (DECIMAL) 35 60 85 110 TEMPERATURE (°C) FIGURE 1. WIPER RESISTANCE vs TAP POSITION [ I(RW) = VCC/RTOTAL ] FOR 10kΩ (W) FIGURE 2. STANDBY ICC vs TEMPERATURE 0.03 0.010 VCC = 2.7V VCC = 2.7V 0.02 0.005 INL (LSB) DNL (LSB) 0.01 0.000 0.00 -0.01 -0.005 VCC = 5.5V -0.02 VCC = 5.5V -0.010 0 5 10 15 20 25 -0.03 30 0 5 TAP POSITION (DECIMAL) FIGURE 3. DNL vs TAP POSITION IN VOLTAGE DIVIDER MODE FOR 10kΩ (W) 20 25 30 0 0.005 0.004 VCC = 5.5V 0.003 0.002 VCC = 2.7V 0.001 -15 10 35 60 85 TEMPERATURE (°C) FIGURE 5. ZS ERROR vs TEMPERATURE 6 110 FULL SCALE ERROR (LSB) ZERO SCALE ERROR (LSB) 15 FIGURE 4. INL vs TAP POSITION IN VOLTAGE DIVIDER MODE FOR 10kΩ (W) 0.006 0 -40 10 TAP POSITION (DECIMAL) VCC = 5.5V -0.1 -0.2 -0.3 -0.4 VCC = 2.7V -0.5 -40 -15 10 35 60 85 110 TEMPERATURE (°C) FIGURE 6. FS ERROR vs TEMPERATURE FN6588.1 January 21, 2008 ISL23511 Typical Performance Curves (Continued) 0.2 0.8 VCC = 2.7V VCC = 2.7V 0.6 RINL (LSB) RDNL (LSB) 0.1 0.0 -0.1 -0.2 5 10 VCC = 5.5V 0.2 VCC = 5.5V 0 0.4 15 20 25 0.0 30 0 5 TAP POSITION (DECIMAL) 15 20 25 30 TAP POSITION (DECIMAL) FIGURE 7. DNL vs TAP POSITION IN RHEOSTAT MODE FOR 10kΩ (W) FIGURE 8. INL vs TAP POSITION IN RHEOSTAT MODE FOR 10kΩ (W) 40 1.2 10k 35 VCC = 5.5V 30 0.6 TCv (ppm/°C) RTOTAL CHANGE (%) 10 10k 0.0 VCC = 2.7V -0.6 VCC = 5.5V 15 50k 5 0 -15 VCC = 2.7V 20 10 50k -1.2 -40 25 10 35 60 85 110 5 10 15 20 25 30 TAP POSITION (DECIMAL) TEMPERATURE (°C) FIGURE 10. TC FOR VOLTAGE DIVIDER MODE IN ppm FIGURE 9. END-TO-END RTOTAL % CHANGE vs TEMPERATURE INPUT SINEWAVE 300 250 TCr (ppm/°C) 50k 200 VCC = 5.5V 150 10k MIDSCALE OUTPUT 100 3dB CUTOFF = 500kHz 50 0 VCC = 2.7V 5 10 15 20 25 30 TAP POSITION (DECIMAL) FIGURE 11. TC FOR RHEOSTAT MODE IN ppm 7 FIGURE 12. FREQUENCY RESPONSE (500kHz) FN6588.1 January 21, 2008 ISL23511 Power-up and Power-down Requirements There are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the potentiometer pins provided that VCC is always more positive than or equal to VRH and VRL, i.e., VCC ≥ VRH,VRL. The VCC ramp rate specification is always in effect. Pin Descriptions RH and RL The RH and RL pins of the ISL23511 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in relation to wiper movement direction. RW The RW pin is the wiper terminal of the potentiometer which is equivalent to the movable terminal of a mechanical potentiometer. The default wiper position at power-up is at 0 tap. PU The debounced PU input is used to increment the wiper position. An on-chip pull-up holds the PU input HIGH. A switch closure to ground or a LOW logic level will, after a debounce time, move the wiper to the next adjacent higher tap position. input, the wiper will be switched to the next adjacent tap position. Internal debounce circuitry prevents inadvertent switching of the wiper position if PU or PD remain LOW for less than 15ms, typical. Each of the buttons can be pushed either once for a single increment/decrement or continuously for a multiple increments/decrements. The number of increments/decrements of the wiper position depend on how long the button is being pushed. When making a continuous push, after the first second, the increment/decrement speed increases. For the first second, the device will be in the slow scan mode. Then, if the button is held for longer than 1s, the device will go into the fast scan mode. As soon as the button is released, the ISL23511 will return to a stand-by condition. If both PU and PD buttons are pulled low more than 15ms from each other, all commands are ignored upon release of ALL buttons. The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. Shutdown Mode The ISL23511 enters into Shutdown Mode if both PU and PD inputs are kept LOW for 2s. In this mode, the resistors array is totally disconnected from its RH pin and the wiper is moved to the position closest to the RL pin, as shown in Figure 13. PD RH The debounced PD input is used to decrement the wiper position. An on-chip pull-up holds the PD input HIGH. A switch closure to ground or a LOW logic level will, after a debounce time, move the wiper to the next adjacent lower tap position. RW RL Device Operation FIGURE 13. DCP CONNECTION IN SHUTDOWN MODE There are three sections of the ISL23511: the input control, the counter and decode section and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch, connecting a point on the resistor array to the wiper output. The resistor array is comprised of 31 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the potential at that point to the wiper. The ISL23511 is designed to interface directly to two push button switches for effectively moving the wiper up or down. The PU and PD inputs increment or decrement a 5-bit counter respectively. The output of this counter is decoded to select one of the thirty-two wiper positions along the resistive array. The wiper increment input, PU and the wiper decrement input, PD are both connected to an internal pull-up so that they normally remain HIGH. When pulled LOW by an external push button switch or a logic LOW level 8 Note that PU and PD inputs must be brought LOW within tDB time window of 15ms (see “Shutdown Mode Timing” on page 5) otherwise all commands will be ignored until both inputs are released. Holding either PU or PD input LOW for more than 15ms will exit shutdown mode and return wiper to prior shutdown position. If PU or PD will be held LOW for more than 250ms, the ISL23511 will start auto-increment or auto-decrement of wiper position. RTOTAL with VCC Removed The end-to-end resistance of the array will fluctuate once VCC is removed. FN6588.1 January 21, 2008 ISL23511 Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN) D 6 INDEX AREA A L10.2.1x1.6A B N 10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS E SYMBOL 2X MIN NOMINAL MAX 1 2X 2 0.10 C TOP VIEW C A 0.05 C SEATING PLANE 1 0.45 0.50 0.55 - A1 - - 0.05 - 0.127 REF - b 0.15 0.20 0.25 5 D 2.05 2.10 2.15 - E 1.55 1.60 1.65 - A1 e SIDE VIEW k 0.20 - - L 0.35 0.40 0.45 (DATUM A) PIN #1 ID A A3 0.10 C 4xk 2 NX L 0.50 BSC - NX b e 2 Nd 4 3 Ne 1 3 0 12 - NOTES: 5 BOTTOM VIEW CL (A1) L 5 e SECTION "C-C" TERMINAL TIP C C 4 Rev. 3 6/06 0.10 M C A B 0.05 M C 3 (ND-1) X e - 10 (DATUM B) N-1 - N θ N NX (b) NOTES 0.10 C FOR ODD TERMINAL/SIDE b 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd and Ne refer to the number of terminals on D and E side, respectively. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Maximum package warpage is 0.05mm. 8. Maximum allowable burrs is 0.076mm in all directions. 9. Same as JEDEC MO-255UABD except: No lead-pull-back, "A" MIN dimension = 0.45 not 0.50mm "L" MAX dimension = 0.45 not 0.42mm. 10. For additional information, to assist with the PCB Land Pattern Design effort, see Intersil Technical Brief TB389. 2.50 1.75 0.05 MIN L 2.00 0.80 0.275 0.10 MIN DETAIL “A” PIN 1 ID 0.50 0.25 LAND PATTERN 10 9 FN6588.1 January 21, 2008 ISL23511 Small Outline Plastic Packages (SOIC) M8.15 (JEDEC MS-012-AA ISSUE C) N 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M B M INCHES E SYMBOL -B- 1 2 3 L SEATING PLANE -A- A D h x 45° -C- e A1 B 0.25(0.010) M C 0.10(0.004) C A M MIN MAX MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.1890 0.1968 4.80 5.00 3 E 0.1497 0.1574 3.80 4.00 4 e α B S 0.050 BSC 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 N α NOTES: MILLIMETERS 8 0° 8 8° 0° 7 8° 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. Rev. 1 6/05 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10 FN6588.1 January 21, 2008