DATASHEET

CA3089
U CT
NT
P RO D
E
T
E
CEME
L
O BS O DE D RE P L A
MEN
ECOM
Data
Sheet
October 2002
NO R
®
FM IF System
FN561.4
Features
Description
• For FM IF Amplifier Applications in High-Fidelity,
Automotive, and Communications Receivers
.
Intersil CA3089 is a monolithic integrated circuit that provides all the functions of a comprehensive FM-IF system.
The block diagram shows the CA3089 features, which
include a three-stage FM-IF amplifier/limiter configuration
with level detectors for each stage, a doubly-balanced
quadrature FM detector and an audio amplifier that features
the optional use of a muting (squelch) circuit.
The advanced circuit design of the IF system includes desirable deluxe features such as delayed AGC for the RF tuner,
and AFC drive circuit, and an output signal to drive a tuning
meter and/or provide stereo switching logic. In addition, internal power supply regulators maintain a nearly constant current drain over the voltage supply range of +8.5V to +16V.
The CA3089 is ideal for high-fidelity operation. Distortion in a
CA3089 FM-IF System is primarily a function of the phase
linearity characteristic of the outboard detector coil.
• Includes: IF Amplifier, Quadrature Detector, AF
Preamplifier, and Specific Circuits for AGC, AFC, Muting
(Squelch), and Tuning Meter
• Exceptional Limiting Sensitivity
at -3dB Point . . . . . . . . . . . . . . . . . . . . . . . . . . 12µV (Typ)
• Low Distortion:
(with Double-Tuned Coil) . . . . . . . . . . . . . . . . . 0.1% (Typ)
• Single-Coil Tuning Capability
• High Recovered Audio . . . . . . . . . . . . . . . . . 400mV (Typ)
• Provides Specific Signal for Control of Interchannel Muting
(Squelch)
• Provides Specific Signal for Direct Drive of a Tuning Meter
• Provides Delayed AGC Voltage for RF Amplifier
• Provides a Specific Circuit for Flexible AFC
Part Number Information
• Internal Supply-Voltage Regulators
PART
NUMBER
TEMP. RANGE
(oC)
PACKAGE
PKG. NO.
CA3089E
-40 to 85
16 Ld PDIP
E16.3
CA3089M1
(3089M)
-40 to 85
20 Ld SOIC
M20.3
Pinouts
CA3089
(PDIP)
TOP VIEW
CA3089
(SOIC)
TOP VIEW
16 NC
IF IN 1
GND
1
20 GND
IF IN
2
19 DELAYED AGC
INPUT BYPASS 2
15 DELAYED AGC
INPUT BYPASS 3
18 GND
DC FB BYPASS 3
14 SUBSTRATE (GND)
DC FB BYPASS 4
17 SUBSTRATE (GND)
13 TUNING METER OUT
FRAME GND 4
12 MUTE LOGIC
MUTE CONTROL 5
11 V+
AUDIO OUT 6
10 REF BIAS
AFC OUT 7
9 QUADRATURE INPUT
IF OUT 8
FRAME GND
5
16 TUNING METER OUT
MUTE CONTROL
6
15 MUTE LOGIC
AUDIO OUT
7
14 V+
AFC OUT
8
13 REF BIAS
IF OUT
9
12 QUADRATURE INPUT
GND 10
1
11 NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
CA3089
Absolute Maximum Ratings
Thermal Information
Supply Voltage
Between V+ and Frame GND . . . . . . . . . . . . . . . . . . . . . . . . .16V
Between V+ and Substrate GND . . . . . . . . . . . . . . . . . . . . . . .16V
DC Current (Out of Delayed AGC). . . . . . . . . . . . . . . . . . . . . . . 2mA
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
95
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V+ = 12V (See Figures 3 and 4)
(NOTE 3)
PARAMETER
TEST CONDITIONS
TEMP.
(oC)
MIN
TYP
MAX
UNITS
25
16
23
30
mA
DC CHARACTERISTICS
Quiescent Circuit Current
DC Voltages
No signal input, Non muted
Terminal 1 (IF Input)
25
1.2
1.9
2.4
V
Terminal 2 (AC Return to Input)
25
1.2
1.9
2.4
V
Terminal 3 (DC Bias to Input)
25
1.2
1.9
2.4
V
Terminal 6 (Audio Output)
25
5.0
5.6
6.0
V
Terminal 10 (DC Reference)
25
5.0
5.6
6.0
V
DYNAMIC CHARACTERISTICS
Input Limiting Voltage (-3dB point), V1 (lim)
-
AM Rejection (Terminal 6), AMR
VIN = 0.1V,
AM Mod. = 30%
Recovered AF Voltage (Terminal 6) VO (AF)
VIN = 0.1V
Total Harmonic
Distortion, THD
(Note 2)
fO = 10.7MHz,
fMOD = 400Hz,
Deviation = ±75kHz
25
-
12
25
µV
25
45
55
-
dB
25
300
400
500
mV
Single Tuned (Terminal 6)
25
-
0.5
1.0
%
Double Tuned (Terminal 6)
25
-
0.1
-
%
Signal Plus Noise to Noise Ratio (Terminal 6)
25
60
67
-
dB
NOTES:
2. THD characteristics are essentially a function of the phase characteristics of the network connected between Terminals 8, 9, and 10.
3. Terminal numbers refer to 16 Lead PDIP.
V+ = 12V, TA 25oC
5kΩ
CURRENT INTO TERMINAL 7 (µA)
125
10
7
µA
100
75
50
25
0
-25
-50
-75
-100
-125
-100
-50
0
50
100
CHANGE IN FREQUENCY (kHz)
FIGURE 1. AFC CHARACTERISTICS (CURRENT AT
TERMINAL 7) vs CHANGE IN FREQUENCY. (SEE
TEST CIRCUIT FIGURE 3)
2
V+ = 12V, TA = 25oC
0
6
RECOVERED AUDIO FROM FULL OUTPUT
(LEFT COORDINATE)
5
-10
-20
-30
TUNER AGC DC VOLTAGE AT
TERM. 15 (RIGHT COORDINATE)
VOLTAGE AT TERMINAL 13
METER CIRCUIT (33kΩ TO GND)
(RIGHT COORDINATE)
4
3
-40
2
-50
1
-60
1
10
100
1K
INPUT SIGNAL (µV)
10K
100K
FIGURE 2. MUTING ACTION, TUNER AGC, AND TUNING
METER OUTPUT vs INPUT SIGNAL VOLTAGE.
(SEE TEST CIRCUIT FIGURE 3)
DC (V)
RECOVERED AUDIO (dB) MUTING CONTROL
AT MAXIMUM RESISTANCE
Application Information
CA3089
Test Circuits
3K
100
pF
L
(NOTE 5)
V+ = 12V
0.05µF
SIGNAL
INPUT
VOLTAGE
11
22µH
C
C1
5K
V+ = 12V
100
pF
8
9
0.01µF
0.05µF
3.9K
11
T (NOTE 8)
22µH
10
2.7K
3
0.02
µF
0.01
µF
12
13
15
14
4
10
K
10
6
CA3089E
0.01
µF
0.02
µF
12
5
0.001
µF
15
14
4
0.5M
150µA
FULL
SCALE
AUDIO
OUT
0.01
µF
470
13
2
0.33µF
33K
TUNING METER
AFC OUTPUT
2.7K
3
470
120K
7
51
0.001
µF
0.001
µF
8.2K
1
0.01
µF
5
2
AUDIO
OUT
6
CA3089E
9
0.01µF
SIGNAL
INPUT
VOLTAGE
AFC OUTPUT
7
5K
100
pF
8
1
51
C2
0.001
µF
120K
10
K
0.33µF
33K
0.5M
150µA
FULL
SCALE
TUNING METER
NOTES:
NOTES:
7. All resistance values are in ohms.
4. All resistance values are in ohms.
8. T PRI. - Q0 (unloaded) ≅ 75 (tunes with 100pF (C1) 20↑ of 34e on
7/ ” dia. form).
32
9. SEC. - Q0 (unloaded) ≅ 75 (tunes with 100pF (C2) 20↑ of 34e on
7/ ” dia. form).
32
10. kQ (percent of critical coupling) ≅ 70%.
(Adjusted for coil voltage VC) = 150mV.
Above values permit proper operation of mute (squelch) circuit
“E” type slugs, spacing 4mm.
5. L tunes with 100pF (C) at 10.7MHz.
6. Q0 (unloaded) ≅ 75 (G.I. Automatic Mfg. Div. EX22741 or equivalent)
FIGURE 3. TEST CIRCUIT FOR CA3089E USING A SINGLETUNED DETECTOR COIL
FIGURE 4. TEST CIRCUIT FOR CA3089E USING A DOUBLETUNED DETECTOR COIL
Test Applications
L (NOTE 14)
100pF
V+ = 12V
100
C
0.05µF
0.01µF
22
µH
11
220pF 250pF
1
300Ω
INPUT
FM
TUNER
(NOTE 12)
IF OUT
3.9K
8
CERAMIC
FILTER
(NOTE 13)
9
10
330
3
CA3089E
CA3089E
2.7K
6
AUDIO
OUT
0.01µF
2
NOTES:
11. All resistance values are in ohms.
12. Waller 4SN3FIC or equivalent.
13. Murata SFG 10.7mA or equivalent.
14. L tunes with 100pF (C) at 10.7MHz Q0 unloaded ≅ 75
(G.I. EX22741 or equivalent).
14
4
Performance Data at fO = 98MHz, fMOD = 400Hz, Deviation = ±75kHz:
-3dB Limiting Sensitivity . . . . . . . . . . . . . . . . . . 2µV (Antenna Level)
20dB Quieting Sensitivity . . . . . . . . . . . . . . . . . 1µV (Antenna Level)
30dB Quieting Sensitivity . . . . . . . . . . . . . . . .1.5µV (Antenna Level)
FIGURE 5. TYPICAL FM TUNER USING THE CA3089E WITH A SINGLE TUNED DETECTOR COIL
3
CA3089
Test Applications (Continued)
FIGURE 6A. BOTTOM VIEW OF PRINTED CIRCUIT BOARD
FIGURE 6B. COMPONENT SIDE - TOP VIEW
FIGURE 6. ACTUAL SIZE PHOTOGRAPHS OF THE CA3089E AND OUTBOARD COMPONENTS MOUNTED ON A PRINTED-CIRCUIT BOARD
Block Diagram
L
(NOTE 16)
QUADRATURE
INPUT
V+
TO INTERNAL
REGULATORS
IF
INPUT
IF AMPLIFIER
1
1ST IF
AMPL.
2ND IF
AMPL.
11
22µH
IF
OUT
8
C=
100pF
9
3RD IF
AMPL.
10
QUADRATURE
DETECTOR
REFERENCE
BIAS
AFC
AMPL.
7
AFC
OUTPUT
AUDIO
AMPL.
6
AUDIO
OUTPUT
AUDIO
MUTE
(SQUELCH)
CONTROL
AMPL.
5
3
0.02
µF
0.02µF
2
LEVEL
DETECTOR
LEVEL
DETECTOR
LEVEL
DETECTOR
LEVEL
DETECTOR
DELAYED
AGC FOR
RF AMPL
TUNING
METER
CIRCUIT
15
10K
FRAME SUBSTRATE
4
14
150µA
METER
NOTES:
15. All resistance values are in ohms.
16. L Tunes with 100pF (C) at 10.7MHz.
17. QO @ 75 (G.I. EX22741 or equivalent).
18. Pin numbers refer to 16 lead DIP.
4
470
MUTE (SQUELCH)
DRIVE CIRCUIT
13
33K
TUNING METER OUTPUT
MUTING
SENSITIVITY
120K
12
0.33µF
TO STEREO
THRESHOLD
LOGIC CIRCUITS
500K
CA3089
Schematic Diagram
IF AMPLIFIER
Q9
Q15
A
R6
2K
R7
2K
C11
1
R10
2K
C13
1
C12
1
R18
2K
C
R11
2K
Q21
R19
2K
Q22 R27
750
R23
2K
R24
480
C14
1
B
R25
1.5K
V+
V+
Q3
Q4
C1
1
Q19
Q7
Q8
C2
1
Q10
Q2
Q1
Q12
2
R13
2.7K
Q6
INPUT
BYPASSING
R12A
2K
R13A
2K
R2
30K
R14
360
R12
2.7K
Q16Q17
R16A
2K
Q18
R16
2.7K
R17
360
C3
0.2
R20
2K
Q13A
Q14A
Q11
Q20
Q13
Q14
Q7A
Q8A
IF
INPUT
1
V+
R15A
2K
R28
750
R21
480
SEE
R22
1.5K
NEXT
R15
2.7K
PAGE
C4
0.2
R3
360
3
R1
30K
V+
V+
Q74
R50
500
R51
5K
C6
3
C5
2
Q58
C7
3
Q61
Q60
R52
400
15
Q68
Q63
Q62
Q59
Q64
Q77
Q84
Q76
R56
600
R61
4K
TUNING
13 METER
AGC FOR
RF AMPL.
NOTE: Pin numbers refer to 16 lead PDIP.
LEVEL DETECTOR AND METER CIRCUIT
5
Q75
Q69
Q70
R53
600
R60
300
R59
150
C8
3
CA3089
Schematic Diagram
(Continued)
9 QUADRATURE
INPUT
REF 10
BIAS
8 IF
OUT
11 V+
DETECTOR
R33
500
AUDIO
AMPLIFIER
R32
500
R37
166
R38
500
R44
500
R42
166
Q35
Q23
Q24 Q25
Q32 Q33
Q44
R31
390
Q45
R34
10K
R26
10K
Q53
Q46
D2
Q48
Q80
Q82
Q40
Q27
Q41
R29
200
Q49
Q50
R35
2.2K
D3
R41
500
Q81
Q79
Q39
R40
500
R64
300
R63
300
Q38
Q54
A
Q34
Q26
Q51
AUDIO
OUT
6
R49
5K
Q83
R36
200
V+
R65
5
R9
10K
Q28
Q5
C
B
R5
4K
V+
Q30
A
R8
2K
Z1
Q29
Q31
Q43
D4
D5
R54
5K
Z2
R55
13K
R4
480
Q67
BIAS
SUPPLY
MUTE
CONTROL
Q52
7
Q56
Q55
Q66
50K
AFC
OUTPUT
R46
4.2K
Q65
Q57
R47
500
R48
500
AFC AMPLIFIER
R62
R57
10K
C9
10
Q47
R43
500
Q42
R30
480
D1
Q71
R39
500
R45
500
V+
500
4
FRAME
14 SUBSTRATE
Q78
Q72
Q73
C10
10
NOTES:
R58
50
19. All resistance values are in ohms.
12
MUTE
LOGIC
20. All capacitance values are in pF.
21. Pin numbers refer to 16 lead PDIP.
MUTE DRIVE
6
CA3089
Dual-In-Line Plastic Packages (PDIP)
E16.3 (JEDEC MS-001-BB ISSUE D)
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE
N
E1
INDEX
AREA
1 2 3
INCHES
N/2
-B-
-AE
D
BASE
PLANE
-C-
A2
SEATING
PLANE
A
L
D1
e
B1
D1
A1
eC
B
0.010 (0.25) M
C A B S
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
C
L
B1
0.045
0.070
1.15
1.77
8, 10
eA
C
0.008
0.014
C
D
0.735
0.775
D1
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
e
0.100 BSC
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
eA
0.300 BSC
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
eB
-
4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3.
L
0.115
N
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
7. eB and eC are measured at the lead tips with the leads unconstrained.
eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
7
0.204
16
0.355
18.66
19.68
5
2.54 BSC
-
7.62 BSC
6
0.430
-
0.150
2.93
16
10.92
7
3.81
4
9
Rev. 0 12/93
CA3089
Small Outline Plastic Packages (SOIC)
M20.3 (JEDEC MS-013-AC ISSUE C)
N
20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010) M
H
B M
INCHES
E
-B1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
e
A1
B
C
0.10(0.004)
0.25(0.010) M
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.013
0.0200
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.4961
0.5118
12.60
13.00
3
E
0.2914
0.2992
7.40
7.60
4
e
µα
B S
0.050 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.010
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
N
α
NOTES:
MILLIMETERS
20
0o
20
8o
0o
7
8o
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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8
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