an9721

The HMP8156EVAL2 Video Evaluation Platform
(HMP8156EVAL2)
TM
Application Note
March 1997
AN9721
Author: Steven M. Martin
Features
Description
• HMP8156 video encoder
The HMP8156EVAL2 Video Evaluation Platform is a PC ISA
Bus add-in card designed to demonstrate the capabilities
and performance of the HMP8156 NTSC/PAL Encoder and
the HMP8112 NTSC/PAL Decoder.
• HMP8112/8112A video decoder
• Analog input formats
- Composite (up to four inputs)
- Y/C (S-Video)
- Analog RGB with sync
• Digital parallel BT.656 input
• Analog output formats
- Y/C + two composite
- RGB + composite (SCART)
• NTSC and PAL operation
• ITU-R BT.601 and square pixel operation
• Three Megabyte video RAM on board
• Programmable sync generator
• Analog sync separator
• User selectable hue, saturation, contrast
and brightness controls
• Closed captioning insertion
• Windows95™ application program
Applications
• Video image capture and display
• Real time standards conversion
The board has three input data paths: analog composite via
the HMP8112 analog component RGB via a Intersil A/D
design, and digital BT.656. For all three input paths, the
board outputs analog video via the HMP8156. The board
can output one composite video signal and either S-Video
and a second composite signal, or component RGB video.
The board accepts analog composite or S-video in NTSC or
PAL format. The decoder converts the analog signal into digital data and stores it in the three megabyte video frame
buffer. The encoder reads the data from the video RAM and
generates analog video in NTSC or PAL format. The
encoder generates its own timing information, or it may be
driven by the on board programmable sync generator. The
input and output formats may be different, eg: NTSC input
and PAL output.
The board accepts analog RGB video with composite sync.
Three high-performance ADCs convert the analog signals to
digital data and drive the encoder. A sync separator derives
timing information for the encoder from the input. The
encoder converts the digital data and timing information into
analog video in the same format as the input video.
The board accepts a digital parallel BT.656 data stream.
Translators convert the ECL input to TTL levels and drive the
encoder. The encoder converts the data and its embedded
timing information into analog video.
The user interface to the evaluation platform is an easy to
use Windows95 application program. The application provides host control to program the board. It provides user
access to all of the decoder and encoder operating parameters and also allows the user to load (store) video images in
the video RAM from (to) the PC file system.
• Live color editing
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001. All Rights Reserved
Application Note 9721
Functional Block Diagram
PIXEL DATA SOURCES
COMP/
LUMA
HMP8112
DECODER
VRAM
1 MEG X 24
FIFO
CHROMA
16
SERIAL
SHIFT
PORT
RANDOM
ACCESS
PORT
PC
TO BOARD
INTERFACE
ISA
BUS
24
I2C, TTX2, RESET
BOARD CONTROL
BT.656
ECL TO TTL
RGB
8
ADC
3
24
24 / 16
SELECT
MISC I/O
DATA
HMP8156
ENCODER
SYNC
SEPARATOR
ANALOG
OUTPUTS
2
BOARD SYNC
GENERATOR
SYNCS
SYNC SOURCES
BT.656
CLOCK
CLOCKS
CRYSTAL
OSCILLATOR
SMA
CONN
CLOCK SOURCES
2
CONTROL FOR
VRAM
AND
MISC.
4
Application Note 9721
Flywire Physical Interface
TOP, COMPONENT SIDE
1
3
2
TOP VIEW
50 POSITION HEADER,
0.025 INCH SQUARE POSTS,
0.100 INCH SPACING
49
50
CONNECTOR PINOUTS
SIGNAL
PIN
SIGNAL
PIN
SIGNAL
PIN
VCC
1
PIX<12>
18
PIX<1>
35
GND
2
PIX<11>
19
PIX<0>
36
N/C
3
PIX<10>
20
VCC
37
N/C
4
PIX<9>
21
GND
38
PIX<23>
5
PIX<8>
22
FIELD_ENC
39
PIX<22>
6
-VSYNC_ENC
23
-BLANK_ENC
40
PIX<21>
7
GND
24
N/C
41
PIX<20>
8
VCC
25
N/C
42
PIX<19>
9
VCC
26
SCLK
43
PIX<18>
10
GND
27
SDATA
44
PIX<17>
11
-HSYNC_ENC
28
N/C
45
PIX<16>
12
PIX<7>
29
-RESET_A
46
GND
13
PIX<6>
30
PIXCLK_RDH
47
VCC
14
PIX<5>
31
VIDCLK
48
PIX<15>
15
PIX<4>
32
GND
49
PIX<14>
16
PIX<3>
33
VCC
50
PIX<13>
17
PIX<2>
34
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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