DATASHEET

ISL54214
Features
The Intersil ISL54214 is a single supply dual SP3T
analog switch that operates from a single supply in the
range of 2.7V to 4.6V. It was designed to multiplex
between audio stereo signals and two different USB 2.0
high speed differential data signals. The audio channels
allow signal swings below ground, allowing the
multiplexing of the voice and data signals through a
common headphone connector in Personal Media
Players and other portable battery powered devices.
• High Speed (480Mbps) and Full Speed (12Mbps)
Signaling Capability per USB 2.0
The audio switch cells can pass ±1V ground referenced
audio signals with very low distortion (<0.03% THD+N
when driving 5mW into 32Ω loads). The USB switch
cells have very low ON capacitance (8pF) and high
bandwidth to pass USB high speed signals (480Mbps)
with minimal edge and phase distortion.
• Cross-talk (100kHz) . . . . . . . . . . . . . . . . . . -98dB
• Low Distortion Negative Signal Capability Audio
Switches
• Power OFF Protection
• COM Pins Overvoltage Tolerant to 5.5V
• Low Distortion Headphone Audio Signals
- THD+N at 5mW into 32Ω Load . . . . . . . . <0.03%
• OFF-Isolation (100kHz) . . . . . . . . . . . . . . . 95.5dB
• Single Supply Operation (VDD) . . . . . . 2.7V to 4.6V
• -3dB Bandwidth USB Switches. . . . . . . . . . . 700MHz
• Available in Tiny 12 Ld µTQFN and TQFN Packages
• Compliant with USB 2.0 Short Circuit Requirements
Without Additional External Components
The ISL54214 is available in a tiny 12 Ld
2.2mmx1.4mm ultra-thin QFN and 12 Ld 3mmx3mm
TQFN packages. It operates over a temperature range
of -40 to +85°C.
• Pb-Free (RoHS Compliant)
Applications
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• MP3 and other Personal Media Players
• Cellular/Mobile Phone
Application Block Diagram
3.3V
µCONTROLLER
VDD
ISL54214
4MΩ
C1
2DUSB
HIGH-SPEED
TRANSCEIVER
COM -
2D+
COM +
L
AUDIO
CODEC
R
USB
HIGH-SPEED
TRANSCEIVER
1D-
1kΩ
1D+
50kΩ
VBUS
USB/HEADPHONE JACK
C0
LOGIC CONTROL
1kΩ
50kΩ
GND
June 28, 2010
FN6816.3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008-2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL54214
USB 2.0 High-Speed x 2 Channels/Stereo Audio
Dual SP3T (Dual 3 to 1 Multiplexer)
ISL54214
State Diagram
0
ALL
00
00
SWITCHES
OFF
10
01
00
00
0
1
0
01
USB2
11
00
10
USB1
AUDIO
MUTE
01
INTERNAL REGISTER VALUE
WHEN TRANSISTIONED
INTO THIS STATE
11
10
11
1
11
01
AUDIO
11
Truth Table
CURRENT CODE
LAST CODE
SHUNT SWITCHES
C1
C0
C1
C0
MODE
1kΩ COM SHUNTS
REGISTER
0
0
X
X
ALL SWITCHES OFF
OFF
0
0
1
X
X
USB1
OFF
0
1
0
0
0
USB2
OFF
0
1
0
0
1
USB2
OFF
0
1
0
1
0
USB2
OFF
0
1
1
X
X
AUDIO
OFF
1
1
0
1
0
MUTE
ON
1
1
0
1
1
MUTE
ON
1
C0, C1: Logic “0” when ≤ 0.5V or float, Logic “1” when ≥ 1.4V with VDD in range of 2.7V to 3.6V.
2
FN6816.3
June 28, 2010
ISL54214
Pin Configurations
ISL54214
(12 LD 3x3 TQFN)
TOP VIEW
ISL54214
(12 LD 2.2x1.4 µTQFN)
TOP VIEW
2D-
VDD
C0
2D-
12
11
10
12
VDD
C0
11
10
PD
2D+
1
L
R
LOGIC
CONTROL
9
C1
2
8
COM -
3
7
COM +
4
5
6
1D-
1D+
GND
2D+
1
L
R
LOGIC
CONTROL
9
C1
2
8
COM -
3
7
COM +
4
5
1D-
1D+
6
GND
NOTE:
1. ISL54214 Switches Shown for C1 = Logic “1” and C0 = Logic “1”. The R and L 50kΩ pull-down resistors, C1 and CO 4MΩ
pull-down resistors and COM- and COM+ 1kΩ Shunts are not shown.
Pin Descriptions
Pin Descriptions
µTQFN
TQFN
NAME
1
1
2D+
2
2
L
3
3
R
4
4
1D-
5
5
1D+
USB1 Differential Input
6
6
GND
Ground Connection
7
7
COM+
3
FUNCTION
(Continued)
µTQFN
TQFN
NAME
FUNCTION
USB2 Differential Input
8
8
COM-
Voice and Data Common Pin
Audio Left Input
9
9
C1
Digital Control Input
Audio Right Input
10
10
C0
Digital Control Input
USB1 Differential Input
11
11
VDD
Power Supply
12
12
2D-
USB2 Differential Input
-
-
PD
Thermal Pad. Tie to Ground
or Float (TQFN only)
Voice and Data Common Pin
FN6816.3
June 28, 2010
ISL54214
Ordering Information
PART NUMBER
(Note 5)
PART
MARKING
TEMP. RANGE
(°C)
ISL54214IRUZ-T (Note 2, 3)
GJ
-40 to +85
12 Ld 2.2mmx1.4mm µTQFN (Tape and Reel)
L12.2.2x1.4A
ISL54214IRTZ (Note 4)
4214
-40 to +85
12 Ld 3mmx3mm TQFN
L12.3x3A
ISL54214IRTZ-T (Notes 2, 4)
4214
-40 to +85
12 Ld 3mmx3mm TQFN (Tape and Reel)
L12.3x3A
ISL54214EVAL1Z
PACKAGE
(Pb-Free)
PKG.
DWG. #
Evaluation Board
NOTES:
2. Please refer to TB347 for details on reel specifications.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach
materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
4. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
5. For Moisture Sensitivity Level (MSL), please see device information page for ISL54214. For more information on MSL please
see techbrief TB363.
4
FN6816.3
June 28, 2010
ISL54214
Absolute Maximum Ratings
VDD to GND . . . . . . . . . . . . . . . . . . . . . . .
Input Voltages
1D+, 1D-, L, R, 2D+, 2D-. . . . . . . . . . . .
C0, C1 (Note 6). . . . . . . . . . . . . . . . . . .
Output Voltages
COM-, COM+ . . . . . . . . . . . . . . . . . . . .
Continuous Current (L, R) . . . . . . . . . . . . .
Peak Current (L, R)
(Pulsed 1ms, 10% Duty Cycle, Max) . . . .
Continuous Current (1D-, 1D+, 2D-, 2D+) .
Peak Current (1D-, 1D+, 2D-, 2D+)
(Pulsed 1ms, 10% Duty Cycle, Max) . . . .
ESD Rating:
Human Body Model . . . . . . . . . . . . . . . .
Machine Model . . . . . . . . . . . . . . . . . . .
Charged Device Model . . . . . . . . . . . . . .
Latch-up Tested per JEDEC; Class II Level A
Thermal Information
. . -0.3V to 5.5V
. . . -2V to 5.5V
. . -0.3V to 5.5V
. . . -2V to 5.5V
. . . . . . ±60mA
. . . . . ±120mA
. . . . . . ±40mA
. . . . . ±100mA
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
12 Ld µTQFN Package (Note 7, 8) .
155
90
12 Ld TQFN Package (Notes 9, 10) .
58
1.0
Maximum Junction Temperature (Plastic Package). . +150°C
Maximum Storage Temperature Range. . . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C
Supply Voltage Range . . . . . . . . . . . . . . . . . . 2.7V to 4.6V
. . >5kV
. >500V
. . >2kV
at 85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
6. Signals on C1 and C0 exceeding GND by specified amount are clamped. Limit current to maximum current ratings.
7. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379 for details.
8. For θJC, the “case temp” location is taken at the package top center.
9. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
10. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VC0H, VC1H = 1.4V, VC0L,
VC1L = 0.5V, (Note 11), Unless Otherwise Specified.
PARAMETER
TEST CONDITIONS
MAX
MIN
(Notes
TEMP (Notes
(°C) 12, 13) TYP 12, 13) UNITS
ANALOG SWITCH CHARACTERISTICS
Audio Switches (L, R)
Analog Signal Range, VANALOG
VDD = 3.0V to 3.6V, Audio Mode (C0 = VDD, C1 = VDD)
Full
-1.5
-
1.5
V
ON-Resistance, rON
VDD = 3.0V, Audio Mode (C0 = 1.4V, C1 = 1.4V),
ICOMx = 60mA, VL or VR = -0.85V to 0.85V, (See Figure 3,
Note 15)
+25
-
2.3
2.8
Ω
Full
-
-
3.4
Ω
rON Matching Between Channels, VDD = 3.0V, Audio Mode (C0 = 1.4V, C1 = 1.4V),
ΔrON
ICOMx = 60mA, VL or VR = Voltage at max rON over signal
range of -0.85V to 0.85V, (Notes 15, 16)
+25
-
0.04
0.25
Ω
Full
-
-
0.26
Ω
VDD = 3.0V, Audio Mode (C0 = 1.4V, C1 = 1.4V),
+25
ICOMx = 60mA, VL or VR = -0.85V to 0.85V, (Notes 14, 15)
Full
-
0.03
0.05
Ω
-
-
0.07
Ω
rON Flatness, rFLAT(ON)
USB/DATA Switches (1D+, 1D-, 2D+, 2D-)
Analog Signal Range, VANALOG
VDD = 2.7V to 4.6V, USB1 mode (C0 = 0V, C1 = VDD) or
USB2 Mode (C0 = VDD, C1 = 0V)
Full
-1
-
VDD
V
ON-Resistance, rON
VDD = 2.7V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or USB2
Mode (C0 = 1.4V, C1 = 0.5V), ICOMx = 40mA, VD+ or
VD-= 0V to 400mV (See Figure 4, Note 15)
25
-
6.2
8
Ω
Full
-
-
10
Ω
25
-
0.08
0.5
Ω
Full
-
-
0.55
Ω
rON Matching Between Channels, VDD = 2.7V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or USB2
ΔrON
Mode (C0 = 1.4V, C1 = 0.5V), ICOMx = 40mA, VD+ or
VD-= Voltage at max rON, (Notes 15, 16)
5
FN6816.3
June 28, 2010
ISL54214
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VC0H, VC1H = 1.4V, VC0L,
VC1L = 0.5V, (Note 11), Unless Otherwise Specified. (Continued)
PARAMETER
TEST CONDITIONS
MAX
MIN
(Notes
TEMP (Notes
(°C) 12, 13) TYP 12, 13) UNITS
25
-
0.26
1
Ω
Full
-
-
1.2
Ω
VDD = 3.3V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or USB2
Mode (C0 = 1.4V, C1 = 0.5V), ICOMx = 40mA, VD+ or
VD- = 3.3V (See Figure 4, Note 15)
+25
-
9.8
20
Ω
Full
-
-
25
Ω
OFF Leakage Current, ID+(OFF)
or ID-(OFF)
VDD = 3.6V, All OFF Mode (C0 = 0.5V, C1 = 0.5V), VCOMor VCOM+ = 0.5V, 0V, VD+ or VD- = 0V, 0.5V, L = R = float
25
-15
0.11
15
nA
Full
-20
-
20
nA
ON Leakage Current, IDX
VDD = 3.3V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or USB2
Mode (C0 = 1.4V, C1 = 0.5V), VD+ or VD- = 2.7V,
COM- = COM+ = Float, L and R = float
25
-20
2.4
20
nA
Full
-25
-
25
nA
All OFF to USB or USB to All OFF VDD = 2.7V, RL = 50Ω, CL = 10pF, (see Figure 1)
Address Transition Time, tTRANS
25
-
175
-
ns
Audio to USB1 Address Transition VDD = 2.7V, RL = 50Ω, CL = 10pF, (see Figure 1)
Time, tTRANS
25
-
12
-
µs
Break-Before-Make Time Delay,
tD
VDD = 3.6V, RL = 50Ω, CL = 10pF, (see Figure 2)
25
-
52
-
ns
Skew, (tSKEWOUT - tSKEWIN)
VDD = 3.0V, USB1 mode (C0 = 0V, C1 = VDD) or USB2
Mode (C0 = VDD, C1 = 0V), RL = 45Ω, CL = 10pF,
tR = tF = 500ps at 480Mbps, (Duty Cycle = 50%)
(see Figure 7)
25
-
75
-
ps
Total Jitter, tJ
VDD =3.0V, USB1 mode (C0 = 0V, C1 = VDD) or USB2 Mode
(C0 = VDD, C1 = 0V), RL = 50Ω, CL = 10pF, tR = tF = 500ps
at 480Mbps
25
-
210
-
ps
Rise/Fall Degradation
(Propagation Delay), tPD
VDD = 3.0V, USB1 mode (C0 = 0V, C1 = VDD) or USB2
Mode (C0 = VDD, C1 = 0V), RL = 45Ω, CL = 10pF, (see
Figure 7)
25
-
250
-
ps
Audio Crosstalk
R to COM-, L to COM+
VDD = 3.0V, Audio Mode (C0 = VDD , C1 = VDD), RL = 32Ω,
f = 20Hz to 20kHz, VR or VL = 0.707VRMS
(see Figure 6)
25
-
-88
-
dB
Crosstalk
(Audio to USB, USB to Audio)
VDD = 3.0V, RL = 50Ω, f = 100kHz
25
-
-98
-
dB
OFF-Isolation
VDD = 3.0V, RL = 50Ω, f = 100kHz
25
-
95.5
-
dB
Audio OFF-Isolation
(All OFF Mode)
VDD = 3.0V, C0 = 0V, C1 = 0V, RL = 32Ω, f = 20Hz to 20kHz
25
-
115
-
dB
Audio OFF-Isolation
(Mute Mode)
VDD = 3.0V, C1 = VDD , C0 = 0V, RL = 32Ω, f = 20Hz to
20kHz
25
-
105
-
dB
Audio OFF-Isolation
(Mute Mode)
VDD = 3.0V, C1 = VDD , C0 = 0V, RL = 20kΩ, f = 20Hz to
20kHz
25
-
77
-
dB
Total Harmonic Distortion
f = 20Hz to 20kHz, VDD = 3.0V, C0 = VDD, C1 = VDD, L or
R = 0.707VRMS (2 VP-P), RL = 32 Ω
25
-
0.045
-
%
Total Harmonic Distortion
f = 20Hz to 20kHz, VDD = 3.0V, C0 = VDD, C1 = VDD, 5mW
into RL = 32Ω
25
-
0.025
-
%
USB Switch -3dB Bandwidth
Signal = 0dBm, 0.2VDC offset, RL = 50Ω, CL = 5pF
25
-
700
-
MHz
Audio Switch -3dB Bandwidth
Signal = 0dBm, RL = 50Ω, CL = 5pF
25
-
330
-
MHz
rON Flatness, rFLAT(ON)
VDD = 2.7V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or USB2
Mode (C0 = 1.4V, C1 = 0.5V), ICOMx = 40mA, VD+ or
VD- = 0V to 400mV, (Notes 14, 15)
ON-Resistance, rON
DPDT DYNAMIC CHARACTERISTICS
6
FN6816.3
June 28, 2010
ISL54214
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VC0H, VC1H = 1.4V, VC0L,
VC1L = 0.5V, (Note 11), Unless Otherwise Specified. (Continued)
PARAMETER
TEST CONDITIONS
MAX
MIN
(Notes
TEMP (Notes
(°C) 12, 13) TYP 12, 13) UNITS
1D+/1D- OFF Capacitance,
C1D+OFF, C1D-OFF
f = 1MHz, VDD = 3.0V, C0 = VDD, C1 = VDD, VD- or
VD+ = VCOMx = 0V, (see Figure 5)
25
-
3
-
pF
L/R OFF Capacitance, CLOFF,
CROFF
f = 1MHz, VDD = 3.0V, C0 = 0V, C1 = VDD, L or
R = COMx = 0V, (see Figure 5)
25
-
5
-
pF
2D+/2D- OFF Capacitance,
C2D+OFF, C2D-OFF
f = 1MHz, VDD = 3.3V, C0 = VDD, C1 = VDD, Tx or
Rx = COMx = 0V, (See Figure 5)
25
-
3
-
pF
COM ON Capacitance, CCOM(ON), CCOM+(ON)
f = 1MHz, VDD = 3.0V, USB Mode (C0 = 0V, C1 = VDD),
D- or D+ = COMx = 0V, (see Figure 5)
25
-
8
-
pF
Full
2.7
4.6
V
25
-
6.2
8
µA
Full
-
-
15
µA
25
-
6.5
8
µA
Full
-
-
15
µA
25
-
6.2
8
µA
Full
-
-
15
µA
25
-
9
14
µA
Full
-
-
20
µA
25
-
6.6
8
µA
Full
-
-
15
µA
Power OFF COMx Current, ICOMx VDD = 0V, C0 = C1 = Float, COMx = 5.25V
25
-
-
4
µA
Power OFF Logic Current, IC0, IC1 VDD = 0V, C0 = C1 = 5.25V
25
-
11
-
µA
Power OFF D+/D- Current, IXD+, VDD = 0V, C0 = C1 = Float, XD- = XD+ = 5.25V
IXD-
25
-
5
-
µA
VDD = 2.7V to 3.6V
Full
-
-
0.5
V
C0, C1 Voltage High, VC0H, VC1H VDD = 2.7V to 3.6V
Full
1.4
-
5.25
V
C0, C1 Input Current, IC0L, IC1L VDD = 3.6V, C0 = C1 = 0V or Float
Full
-50
6.2
50
nA
C0, C1 Input Current, IC0H, IC1H VDD = 3.6V, C0 = C1 = 3.6V
Full
-2
1.6
2
µA
C0, C1 Pull-Down Resistor, RCx
Full
-
4
-
MΩ
POWER SUPPLY CHARACTERISTICS
Power Supply Range, VDD
Positive Supply Current, IDD
(ALL OFF Mode)
VDD = 3.6V, C1 = GND, C0 = GND
Positive Supply Current, IDD
(USB1 Mode)
VDD = 3.6V, C1 = GND, C0 = VDD
Positive Supply Current, IDD
(USB2 Mode)
VDD = 3.6V, C1 = VDD, C0 = GND
Positive Supply Current, IDD
(Audio Mode)
VDD = 3.6V, Audio Mode (C0 = C1 = VDD)
Positive Supply Current, IDD
(MUTE Mode)
VDD = 3.6V, C1 = VDD, C0 = GND
DIGITAL INPUT CHARACTERISTICS
C0, C1 Voltage Low, VC0L, VC1L
VDD = 3.6V, C0 = C1 = 3.6V, Measure current into C0 or C1
pin and calculate resistance value.
NOTES:
11. Vlogic = Input voltage to perform proper function.
12. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data
sheet.
13. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
14. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal
range.
15. Limits established by characterization and are not production tested.
16. rON matching between channels is calculated by subtracting the channel with the highest max rON value from the channel with
lowest max rON value, between L and R or between 1D+ and 1D- or between 2D+ and 2D-.
7
FN6816.3
June 28, 2010
ISL54214
Test Circuits and Waveforms
VC0,C1
LOGIC
INPUT
VC0,C1
50%
VINPUT
tOFF
SWITCH
V
INPUT INPUT
VOUT
SWITCH
INPUT
COMx
C0, C1
VOUT
90%
90%
SWITCH
OUTPUT
C
VDD
tr < 20ns
tf < 20ns
LOGIC
INPUT
0V
RL
50Ω
GND
CL
10pF
tON
Logic input waveform is inverted for switches that have the
opposite logic sense.
FIGURE 1A. ADDRESS tTRANS MEASUREMENT POINTS
Repeat test for all switches. CL includes fixture and stray
capacitance.
RL
----------------------V OUT = V
(INPUT) R + r
L
ON
FIGURE 1B. ADDRESS tTRANS TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
VDD
2D- OR 2D+
VC0
LOGIC
INPUT
1D- OR 1D+
VINPUT
VC1
SWITCH
OUTPUT
C
RL
50Ω
C0, C1
VOUT
90%
0V
VOUT
COMx
L OR R
CL
10pF
GND
LOGIC
INPUT
tD
Repeat test for all switches. CL includes fixture and stray
capacitance.
FIGURE 2B. TEST CIRCUIT
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2. BREAK-BEFORE-MAKE TIME
VDD
VDD
C
C
rON = V1/60mA
rON = V1/40mA
COMx
D- OR D+
VD- OR VD+
VL OR VR
C0
V1
40mA
C1
VC0H
V1
VC1H
40mA
L OR R
0V
C1
VDD
COMx
GND
Repeat test for all switches.
C0
GND
Repeat test for all switches.
FIGURE 3. AUDIO rON TEST CIRCUIT
8
FIGURE 4. USB rON TEST CIRCUIT
FN6816.3
June 28, 2010
ISL54214
Test Circuits and Waveforms (Continued)
VDD
VDD
C
CTRL
CTRL
SIGNAL
GENERATOR
AUDIO OR USB
L OR R
VCx
IMPEDANCE
ANALYZER
C
VCx
0V OR FLOAT
VCxL OR
VCxH
COMx
32Ω
COMx
GND
R OR L
COMx
ANALYZER
N.C.
GND
32Ω
Repeat test for all switches.
FIGURE 5. CAPACITANCE TEST CIRCUIT
FIGURE 6. AUDIO CROSSTALK TEST CIRCUIT
VDD
C
tri
90%
DIN+
DIN-
50%
10%
0V
C0
VDD
C1
tskew_i
15.8Ω
COM+
DIN+
90%
50%
VDD
D+
143Ω
10%
DIN-
tfi
tro
15.8Ω
COM-
OUT+
CL
45Ω
CL
OUT45Ω
D-
143Ω
90%
OUT+
OUT-
10%
GND
50%
tskew_o
50%
90%
|tro - tri| Delay Due to Switch for Rising Input and Rising Output Signals.
|tfo - tfi| Delay Due to Switch for Falling Input and Falling Output Signals.
tf0
10%
|tskew_0| Change in Skew through the Switch for Output Signals.
|tskew_i| Change in Skew through the Switch for Input Signals.
FIGURE 7A. MEASUREMENT POINTS
FIGURE 7B. TEST CIRCUIT
FIGURE 7. SKEW TEST
9
FN6816.3
June 28, 2010
ISL54214
Application Block Diagrams
3.3V
µCONTROLLER
VDD
ISL54214
4MΩ
USB
HIGH-SPEED
TRANSCEIVER
#2
2DCOM -
2D+
COM +
L
AUDIO
CODEC
C1
R
USB
HIGH-SPEED
TRANSCEIVER
#1
OR UART
1D-
1kΩ
1D+
50kΩ
TRANSCEIVER
VBUS
USB/HEADPHONE JACK
C0
LOGIC CONTROL
1kΩ
50kΩ
GND
Detailed Description
Audio Switches
The ISL54214 device consists of dual SP3T (single
pole/triple throw) analog switches. It operates from a
single DC power supply in the range of 2.7V to 4.6V. It
was designed to function as differential 3 to 1
multiplexer to select between two different USB
differential data signals and audio L and R stereo
signals. Its offered in tiny µTQFN and TQFN packages
for use in MP3 players, PDAs, cellphones, and other
personal media players.
The two audio switches (L, R) are 2.3Ω switches that
can pass signals that swing below ground.
Over a signal range of ±1V (0.707VRMS) with VDD >
2.7V, these switches have an extremely low rON
resistance variation. They can pass ground referenced
audio signals with very low distortion (<0.05%
THD+N) when delivering 15.6mW into a 32Ω
headphone speaker load. See Figures 16, 17, 18, 19
and 20 THD+N performance curves.
A device consists of two 2.3Ω audio switches and four
6.2Ω USB switches. The audio switches can accept
signals that swing below ground. They were designed
to pass audio left and right stereo signals, that are
ground referenced, with minimal distortion. The USB
switches were designed to pass high-speed USB
differential data signals with minimal edge and phase
distortion.
Crosstalk between the L and R audio switches over the
frequency range of 20Hz to 20kHz when driving a 32Ω
load is < -88dB. These switches have excellent
off-isolation > 105dB over the audio band when
connected to 32Ω loads and 77dB when connected to
20kΩ loads (In Audio Mute mode). See Figures 21 and
22 in “Typical Performance Curves” section.
The ISL54214 was specifically designed for MP3
players, personal media players and cellphone
applications that need to combine the stereo audio and
USB channels into a single shared connector, thereby
saving space and component cost. The Typical
application block diagram of this functionality is
previously shown.
The ISL54214 contains two logic control pins (C1 and
C0) that determine the state of the device. The part
has the following five states or modes of operation: All
SWITCHES OFF; USB1; USB2; Audio; and Audio Mute.
These states are discussed in detail in “Logic Control”
on page 11.
A detailed description of the various types of switches
is provided in the following sections.
10
The audio drivers should be connected at the L and R
side of the switch (pins 2 and 3) and the speaker loads
should be connected at the COM side of the switch
(pins 7 and 8).
The audio switches are active (turned ON) whenever
the C1 and C0 logic pins are logic “1” (High).
USB Switches
The four USB switches (1D+, 1D-, 2D+, 2D-) are
6.2Ω bidirectional switches that were specifically
designed to pass high-speed USB differential data
signals in the range of 0V to 400mV. The switches
have low capacitance and high bandwidth to pass USB
high-speed signals (480Mbps) with minimum edge and
phase distortion to meet USB 2.0 signal quality
specifications. See Figures 23 and 24 for the high-speed
eye pattern taken with the switch in the signal path.
FN6816.3
June 28, 2010
ISL54214
These switches can also swing rail-to-rail and pass USB
full-speed signals (12Mbps) with minimal distortion. See
Figure 25 for the full-speed eye pattern taken with the
switch in the signal path.
The maximum normal operating signal range for the USB
switches is from -1V to VDD. The signal voltage at D- and
D+ should not be allow to exceed the VDD voltage rail or
go below ground by more than -1V for normal operation.
However, in the event that the USB 5.25V VBUS voltage
is shorted to one or both of the COM pins, the ISL54214
has fault protection circuitry to prevent damage to the
ISL54214 part. The fault circuitry allows the signal pins
(COM-, COM+, 1D-, 1D+, 2D-, 2D+, L and R) to be
driven up to 5.25V while the VDD supply voltage is in the
range of 0V to 4.6V. This fault condition causes no stress
to the IC. In addition, when VDD is at 0V (ground), all
switches are OFF and the fault voltage is isolated from
the other side of the switch. When VDD is in the range of
2.7V to 4.6V, the fault voltage will pass through to the
output of an active switch channel. Note: During the fault
condition normal operation is not guaranteed until the
fault condition is removed.
The USB (1D+ and 1D-) switches are active (turned ON)
whenever the C1 is logic “0” (Low) and C0 is logic “1”
(High). The USB (2D+ and 2D-) switches are active
(turned ON) whenever the C1 is logic “1” (High) and C0
is logic “0” (Low) provided the last state was not the
Audio or Audio Mute state.
ALL SWITCHES OFF Mode
If the C1 pin = Logic “0” and C0 pin = Logic “0” the part
will be in the ALL SWITCHES OFF mode. In this mode,
the 2D- and 2D+ USB switches, the L and R audio
switches and the 1D- and 1D+ USB switches will be OFF
(high impedance).
The 1kΩ shunts on the COM side will be disconnected
(OFF).
It is recommended that when transitioning from USB1
to USB2 or from USB2 to USB1 that you always pass
through the All Switches OFF state.
Audio Mode
If the C1 pin = Logic “1” and C0 pin = Logic “1”, the part
will be in the Audio mode. In Audio mode, the L (left) and
R (right) 2.3Ω audio switches are ON, the 1D- and 1D+
6.2Ω USB switches and 2D- and 2D+ 6.2Ω USB switches
will be OFF (high impedance).
The 1kΩ shunts on the COM side of the switch will be
disconnected (OFF).
When a headphone is plugged into the common
connector, the µcontroller will drive the C1 and C0 logic
pins “High” putting the part in the audio mode. In the
Audio mode, the audio drivers of the player can drive the
headphones and play music.
USB1 Mode
The discussion that follows will discuss using the
ISL54214 in the “Application Block Diagrams” on
page 10.
If the C1 pin = Logic “0” and C0 pin = Logic “1” the part
will go into USB1 mode. In USB1 mode, the 1D- and 1D+
6.2Ω switches are ON and the L and R 2.3Ω audio
switches and 2D- and 2D+ 6.2Ω USB switches will be
OFF (high impedance).
LOGIC CONTROL
The 1kΩ COM shunt resistors will be disconnected (OFF).
The state of the ISL54214 device is determined by the
voltage at the C1 pin (pin 9) and the C0 pin (pin 10). The
part has five states or modes of operation. The All
SWITCHES OFF mode, USB1 mode, USB2 mode, Audio
mode and Audio Mute mode. Refer to the “Truth Table”
on page 2 and “State Diagram” on page 2.
When a USB cable from a computer or USB hub is
connected at the common connector, the μcontroller will
route the incoming USB signal to USB transceiver section
#1 by taking the C1 pin “Low” and the C0 pin “High”
putting the ISL54214 part into the USB1 mode. In USB1
mode the computer or USB hub transceiver and the MP3
player or cellphone USB transceiver #1 are connected
and digital data will be able to be transmit back and
forth.
ISL54214 Operation
The C1 pin and C0 pin are internally pulled low through
4MΩ resistors to ground and can be tri-stated or left
floating.
The C1 pin and C0 pin can be driven with a voltage that
is higher than the VDD supply voltage. They can be
driven up to 5.25V with the VDD supply in the range of
2.7V to 4.6V. Driving the logic higher than the supply rail
will cause the logic current to increase. With VDD = 2.7V
and VLOGIC = 5.25V, ILOGIC current is approximately
5.5µA.
USB2 Mode
Logic Control Voltage Levels
The 1kΩ COM shunt resistors will be disconnected (OFF).
With VDD in the range of 2.7V to 3.6V the logic levels
are: C1, C0 = Logic “0” (Low) when ≤ 0.5V or Floating.
C1, C0 = Logic “1” (High) when ≥ 1.4V
When a USB cable from a computer or USB hub is
connected at the common connector, the μcontroller will
route the incoming USB signal to USB transceiver section
#2 by taking the C1 pin “High” and the C0 pin “Low”
putting the ISL54214 part into the USB2 mode. In USB2
11
If the C1 = Logic “1” and C0 pin = Logic “0” the part will
be in the USB2 mode provided that the last state was not
the Audio or Audio Mute state. In the USB2 mode, the
2D- and 2D+ 6.2Ω USB switches will be ON and audio
switches and the 1D- and 1D+ USB switches will be OFF
(high impedance).
FN6816.3
June 28, 2010
ISL54214
mode, the computer or USB hub transceiver and the MP3
player or cellphone USB transceiver #2 are connected
and digital data will be able to be transmit back and
forth.
The delay time between these bits must be < 100ns to
ensure that you directly move between these states
without momentarily transitioning to one of the other
states.
Audio MUTE Mode
For example, if you are going from the “All OFF” state to
the “Audio” state and C0 does not go high until 100nS
after C1 went high you will momentarily transition to the
“USB2” state. Any signals connected at the USB2 signal
lines will momentarily get passed through to the COM
outputs.
If the C1 pin = Logic “1” and C0 pin = Logic “0”, the part
will be in the Audio Mute mode provided that the last
state was the Audio state. In the Audio Mute mode, the
2D- and 2D+ USB switches, the L and R audio switches
and the 1D- and 1D+ USB switches will be OFF (high
impedance).
The 1kΩ COM shunt resistors will be connected (ON). The
1kΩ shunts provide 77dB of off-isolation when driving
10kΩ to 20kΩ amplifier inputs.
The 1kΩ COM shunt resistors are active (ON) only when
in the Audio Mute mode.
Logic Control Timing Between C1 and C0
The ISL54214 has a unique logic control architecture.
The part has five different logic states but only two
external logic control pins, C1 and C0. Refer to the “State
Diagram” on page 2 and “Truth Table” on page 2.
The following state transitions require both C1 and C0
logic control bits to change their logic levels in unison:
All OFF(C1 = 0, C0 = 0) -----> Audio (C1 = 1, C0 = 1)
Audio (C1 = 1, C0 = 1) -----> All OFF (C1 = 0, C0 = 0)
Audio Mute (C1 = 1, C0 = 0) -----> USB1 (C1 = 0, C0 = 1)
Typical Performance Curves
2.95
2.90
Delay time between C1 and C0 must be < 100ns and
should be controlled by logic control drivers with well
behaved monotonic transitions from High to Low and Low
to High and with typical logic family rise and fall times of
1ns to 6ns.
POWER
The power supply connected at VDD (pin 11) provides
power to the ISL54214 part. Its voltage should be kept in
the range of 2.7V to 4.6V. In a typical application, VDD
will be in the range of 2.7V to 4.3V and will be connected
to the battery or LDO of the MP3 player or cellphone.
A 0.01µF or 0.1µF decoupling capacitor should be
connected from the VDD pin to ground to filter out any
power supply noise from entering the part. The capacitor
should be located as close to the VDD pin as possible.
TA = +25°C, Unless Otherwise Specified.
2.60
ICOM = 60mA
ICOM = 60mA
2.58
2.85
2.75
2.70
2.65
VDD = 3.3V
2.54
VDD = 3.6V
2.52
2.60
VDD = 4.0V
VDD = 2.7V
2.55
2.50
VDD = 3.6V
2.50
2.45
-1.5
VDD = 3.0V
2.56
rON (Ω)
rON (Ω)
2.80
VDD = 4.6V
VDD = 4.6V
-1.0
-0.5
0
VCOM (V)
0.5
1.0
FIGURE 8. AUDIO ON-RESISTANCE vs SUPPLY
VOLTAGE vs SWITCH VOLTAGE
12
1.5
2.48
-1.5
-1.0
-0.5
0
VCOM (V)
0.5
1.0
1.5
FIGURE 9. AUDIO ON-RESISTANCE vs SUPPLY
VOLTAGE vs SWITCH VOLTAGE
FN6816.3
June 28, 2010
ISL54214
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified. (Continued)
4.0
18
+85°C
VDD = 3.0V
ICOM = 60mA
16
3.5
14
12
rON (Ω)
rON (Ω)
3.0
+25°C
2.5
2.0
10
8
6
-40°C
+85°C
4
1.5
1.0
+25°C
VDD = 3.0V
ICOM = 60mA
-1.0
-1.5
2
-0.5
0
VCOM (V)
0.5
1.0
1.5
FIGURE 10. AUDIO ON-RESISTANCE vs SWITCH
VOLTAGE vs TEMPERATURE
9
ICOM = 40mA
-1.0
-0.5
0
0.5
1.0
VCOM (V)
1.5
2.0
3.0
2.5
FIGURE 11. AUDIO ON-RESISTANCE vs SWITCH
VOLTAGE vs TEMPERATURE
6.7
6.6
-40°C
0
-1.5
VDD = 2.7V
ICOM = 40mA
VDD = 2.7V
+85°C
8
6.5
7
VDD = 3.3V
rON (Ω)
rON (Ω)
6.4
6.3
VDD = 3.0V
6.2
VDD = 3.3V
6.1
VDD = 4.6V
5.8
0
0.05
0.10
0.15 0.20 0.25
VCOM (V)
8
0.30
0.35
3
0.40
16
VDD = 3.3V
ICOM = 40mA
+85°C
14
0.05
0.10
0.15 0.20 0.25
VCOM (V)
0.30
0.35
0.40
VDD = 3.3V
ICOM = 40mA
12
+25°C
rON (Ω)
rON (Ω)
0
FIGURE 13. USB ON-RESISTANCE vs SWITCH VOLTAGE
vs TEMPERATURE
7
6
-40°C
5
+85°C
10
8
+25°C
6
4
3
0
-40°C
4
VDD = 4.0V
FIGURE 12. USB ON-RESISTANCE vs SUPPLY VOLTAGE
vs SWITCH VOLTAGE
9
6
5
6.0
5.9
+25°C
-40°C
4
0.05
0.10
0.15 0.20 0.25
VCOM (V)
0.30
0.35
0.40
FIGURE 14. USB ON-RESISTANCE vs SWITCH VOLTAGE
vs TEMPERATURE
13
2
0
0.5
1.0
1.5
2.0
VCOM (V)
2.5
3.0
3.3
FIGURE 15. USB ON-RESISTANCE vs SWITCH VOLTAGE
vs TEMPERATURE
FN6816.3
June 28, 2010
ISL54214
Typical Performance Curves
0.056
TA = +25°C, Unless Otherwise Specified. (Continued)
0.032
RLOAD = 32Ω
VLOAD = 0.707VRMS
0.055
0.054
RLOAD = 32Ω
PLOAD = 5mW
0.031
VDD = 3.0V
0.030
VDD = 3.6V
0.029
VDD = 2.7V
0.052
0.051
THD+N (%)
THD+N (%)
0.053
VDD = 4V
0.050
0.049
VDD = 4.6V
20
50
100 200 500 1k
2k
FREQUENCY (Hz)
5k
10k
0.070
RLOAD = 32Ω
0.065 VDD = 3V
0.065
0.060
0.055
2.5VP-P
THD+N (%)
THD+N (%)
1.5VP-P
0.040
0.035
1.13VP-P
0.030
200 500 1k
2k
FREQUENCY (Hz)
5k
10k
20k
RLOAD = 32Ω
FREQ = 1kHz
VDD = 3V
0.045
2VP-P
0.045
100
0.050
0.055
0.050
50
FIGURE 17. THD+N vs SUPPLY VOLTAGE vs FREQUENCY
PEAK-TO PEAK VOLTAGES AT LOAD
0.060
0.040
0.035
0.030
0.025
0.020
0.025
0.015
1VP-P
0.020
0.010
510mVP-P
0.015
20
100
0.005
1k
FREQUENCY (Hz)
0
0.5
10k 20k
FIGURE 18. THD+N vs SIGNAL LEVELS vs FREQUENCY
1.0
1.5
2.0
OUTPUT VOLTAGE (VP-P)
2.5
FIGURE 19. THD+N vs OUTPUT VOLTAGE
0.09
-60
RLOAD = 32Ω
0.08 FREQ = 1kHz
VDD = 3V
-70
-80
0.07
CROSSTALK (dB)
-90
0.06
THD+N (%)
VDD = 4.6V
0.024
20
20k
FIGURE 16. THD+N vs SUPPLY VOLTAGE vs FREQUENCY
0.05
0.04
0.03
VDD = 3V
RLOAD = 32Ω
VSIGNAL = 0.707VRMS
-100
-110
-120
-130
-140
-150
0.02
-160
0.01
0
VDD = 4.0V
0.027
0.025
0.047
0.010
VDD = 3.6V
0.028
0.026
0.048
0.046
VDD = 3.3V
-170
0
5
10
15
20
OUTPUT POWER (mW)
25
FIGURE 20. THD+N vs OUTPUT POWER
14
30
-180
20
100
1k
FREQUENCY (Hz)
10k 20k
FIGURE 21. AUDIO CHANNEL-TO-CHANNEL CROSSTALK
FN6816.3
June 28, 2010
ISL54214
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified. (Continued)
-60
-65
-70
RL = 20kΩ
OFF- ISOLATION (dB)
-75
-80
RL = 1kΩ
-85
-90
-95
-100
-105
RL = 32Ω
-110
-115
-120
-125
-130
20
VDD = 3.3V
VSIGNAL = 0.707VRMS
AUDIO MUTE MODE
100
1k
FREQUENCY (Hz)
10k 20k
FIGURE 22. OFF-ISOLATION AUDIO SWITCH vs LOADING vs FREQUENCY
15
FN6816.3
June 28, 2010
ISL54214
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified. (Continued)
VDD = 2.7V
VOLTAGE SCALE (0.1V/DIV)
USB NEAR END MASK
TIME SCALE (0.2ns/DIV)
FIGURE 23. EYE PATTERN: 480Mbps WITH USB SWITCHES IN THE SIGNAL PATH
16
FN6816.3
June 28, 2010
ISL54214
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified. (Continued)
VDD = 2.7V
VOLTAGE SCALE (0.1V/DIV)
USB FAR END MASK
TIME SCALE (0.2ns/DIV)
FIGURE 24. EYE PATTERN: 480Mbps WITH USB SWITCHES IN THE SIGNAL PATH
17
FN6816.3
June 28, 2010
ISL54214
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified. (Continued)
VOLTAGE SCALE (0.5V/DIV)
VDD = 2.7V
TIME SCALE (10ns/DIV)
FIGURE 25. EYE PATTERN: 12Mbps USB SIGNAL WITH USB SWITCHES IN THE SIGNAL PATH
18
FN6816.3
June 28, 2010
ISL54214
Typical Performance Curves
-20
TA = +25°C, Unless Otherwise Specified. (Continued)
-10
RL = 50Ω
VIN = 0.2VP-P to 2VP-P
RL = 50Ω
VIN = 0.2VP-P to 2VP-P
-30
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
-40
-60
-80
-100
-120
-50
-70
-90
-110
-140
0.001
0.01
0.1
1
10
100
500
-130
0.001
0.01
FREQUENCY (MHz)
FIGURE 26. OFF-ISOLATION USB SWITCHES
1
10
100
500
FIGURE 27. OFF-ISOLATION AUDIO SWITCHES
Die Characteristics
1
USB SWITCH
SUBSTRATE AND TQFN THERMAL PAD
POTENTIAL (POWERED UP):
0
NORMALIZED GAIN (dB)
0.1
FREQUENCY (MHz)
GND
-1
TRANSISTOR COUNT:
837
-2
PROCESS:
Submicron CMOS
-3
-4
-5
RL = 50Ω
VIN = 0.2VP-P to 2VP-P
1M
10M
100M
FREQUENCY (Hz)
1G
FIGURE 28. FREQUENCY RESPONSE
19
FN6816.3
June 28, 2010
ISL54214
Revision History
DATE
REVISION
CHANGE
6/1/10
FN6816.3
Converted to new Intersil template.
Added Revision History table and Products sections.
On page 3 , added separate pin configuration diagrams for the uTQFN and TQFN parts.
On page 3, updated the pin description table to show the thermal pad.
On page 5, in ABS section added latch-up level.
On page 7, Changed ICOMx current limit for 25°C from: 1µA, to: 4µA.
Under “Thermal Information” on page 5 for the µTQFN, added theta JC TOP value of 90C/W,
along with appropriate foot note for theta JC as measured on top of package.
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The
Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones,
handheld products, and notebooks. Intersil's product families address power management and analog signal
processing functions. Go to www.intersil.com/products for a complete list of Intersil product families.
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device
information page on intersil.com: ISL54214
To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff
FITs are available from our website at http://rel.intersil.com/reports/search.php
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
20
FN6816.3
June 28, 2010
ISL54214
Package Outline Drawing
L12.3x3A
12 LEAD THIN QUAD FLAT NO LEAD PLASTIC PACKAGE
Rev 0, 09/07
3.00
0.5
BSC
A
B
6
12
10
PIN #1 INDEX AREA
6
PIN 1
INDEX AREA
1
4X 1.45
3.00
9
7
3
0.10 M C A B
(4X)
0.15
4
6
0.25 +0.05 / -0.07
4
12X 0 . 4 ± 0 . 1
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X"
0.10 C
0 . 75
C
BASE PLANE
( 2 . 8 TYP )
1.45 )
SEATING PLANE
0.08 C
(
SIDE VIEW
0.6
C
0 . 50
0 . 2 REF
5
0 . 00 MIN.
0 . 05 MAX.
0 . 25
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.18mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
21
FN6816.3
June 28, 2010
ISL54214
Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)
D
6
INDEX AREA
2X
A
N
L12.2.2x1.4A
B
12 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC
PACKAGE
MILLIMETERS
E
0.10C
1
2X
2
0.10C
MIN
NOMINAL
A
0.45
A1
-
A3
TOP VIEW
0.10C
C
A1
A
SYMBOL
0.05C
LEADS COPLANARITY
SIDE VIEW
MAX
NOTES
0.50
0.55
-
-
0.05
-
0.127 REF
-
b
0.15
0.20
0.25
5
D
2.15
2.20
2.25
-
E
1.35
1.40
1.45
-
e
0.40 BSC
-
k
0.20
-
-
-
L
0.35
0.40
0.45
-
N
12
2
Nd
3
3
Ne
3
3
θ
0
-
12
4
Rev. 0 12/06
NOTES:
(DATUM A)
PIN #1 ID
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
NX L
1 2
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on D and E side, respectively.
e
Ne
(DATUM B)
NX b
5
0.10 MC A B
0.05 MC
Nd
3
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be either a mold or mark feature.
7. Maximum package warpage is 0.05mm.
8. Maximum allowable burrs is 0.076mm in all directions.
BOTTOM VIEW
9. Same as JEDEC MO-255UABD except:
No lead-pull-back, "A" MIN dimension = 0.45 not 0.50mm
"L" MAX dimension = 0.45 not 0.42mm.
CL
NX (b)
10. For additional information, to assist with the PCB Land Pattern
Design effort, see Intersil Technical Brief TB389.
(A1)
L
5
1.50
e
SECTION "C-C"
C C
TERMINAL TIP
2.30
1
2
0.40
3
0.45 (12x)
0.25 (12x)
0.40
TYPICAL RECOMMENDED LAND PATTERN
22
10
FN6816.3
June 28, 2010
Similar pages