DATASHEET

EL5624A
®
Data Sheet
February 14, 2005
6-Channel Buffer with High Power VCOM
Features
The EL5624A integrates six gamma reference buffers with a
single high power VCOM amplifier. Each gamma buffer has a
bandwidth of 12MHz and features a slew rate of 15V/µs. The
output current is rated at 30mA continuous, 140mA peak.
• 6 x gamma buffers
The VCOM amplifier is rated for 260mA peak output current
and also features higher slew rate (70V/µs) and bandwidth
(35MHz) for use in error cancellation circuits.
• Low power - just 8.5mA
The EL5624A is available in the 20-pin HTSSOP package
and is specified for operation over the -40°C to +85°C
temperature range.
Ordering Information
PART NUMBER
(See Note)
FN7506.0
• Single high power VCOM amplifier
• 260mA peak VCOM output current
• Pb-free available (RoHS compliant)
Applications
• TFT-LCD displays
• Flat panel monitors
• Notebook displays
• LCD-TVs
PACKAGE
(Pb-Free)
TAPE &
REEL
PKG. DWG. #
EL5624AIREZ
(See Note)
20-Pin HTSSOP
(Pb-free)
-
MDP0048
EL5624AIREZ-T7
(See Note)
20-Pin HTSSOP
(Pb-free)
7"
MDP0048
EL5624AIREZ-T13
(See Note)
20-Pin HTSSOP
(Pb-free)
13"
MDP0048
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pinout
EL5624A
(20-PIN HTSSOP)
TOP VIEW
VIN1 1
20 VOUT1
VIN2 2
19 VOUT2
VIN3 3
18 VOUT3
VIN4 4
17 VOUT4
VS+ 5
VS+ 6
THERMAL
PAD*
16 VS15 VS-
VIN5 7
14 VOUT5
VIN6 8
13 VOUT6
VINP 9
12 VOUT
VINN 10
11 NC
* THERMAL PAD CONNECTED TO PIN 15 or 16 (VS-)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
EL5624A
Absolute Maximum Ratings (TA = 25°C)
Supply Voltage between VS+ and VS- . . . . . . . . . . . . . . . . . . . .+18V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . VS- -0.5V, VS+ +0.5V
Maximum Continuous Output Current (Buffer) . . . . . . . . . . . . 30mA
Maximum Continuous Output Current (VCOM) . . . . . . . . . . . . 60mA
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VS+ = +15V, VS- = 0, RL = 10kΩ, CL = 10pF to 0V, Gain of VCOM = 1, RLVCM = 1kΩ and TA = 25°C,
unless otherwise specified
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
14
UNIT
INPUT CHARACTERISTICS (REFERENCE BUFFERS)
VOS
Input Offset Voltage
VCM = 0V
2
TCVOS
Average Offset Voltage Drift
(Note 1)
5
IB
Input Bias Current
VCM = 0V
2
RIN
Input Impedance
1
GΩ
CIN
Input Capacitance
1.35
pF
AV
Voltage Gain
1V ≤ VOUT ≤ 14V
0.992
mV
µV/°C
50
nA
1.008
V/V
15
mV
INPUT CHARACTERISTICS (VCOM AMPLIFIER)
VOS
Input Offset Voltage
VCM = 7.5V
1
TCVOS
Average Offset Voltage Drift
(Note 1)
5
IB
Input Bias Current
VCM = 7.5V
2
RIN
Input Impedance
1
GΩ
CIN
Input Capacitance
1.35
pF
VREG
Load Regulation
VCOM = 1.5V, -60mA < IL < 60mA
-20
AVOL
Open Loop Gain
RL = 1kΩ
55
75
dB
CMRR
Common Rejection Ratio
45
70
dB
µV/°C
50
+20
nA
mV
OUTPUT CHARACTERISTICS (REFERENCE BUFFERS)
VOL
Output Swing Low
IL = 7.5mA
VOH
Output Swing High
IL = 7.5mA
14.85
14.95
V
ISC
Short Circuit Current
RL = 10Ω
±200
±250
mA
50
150
mV
OUTPUT CHARACTERISTICS (VCOM AMPLIFIER)
VOL
Output Swing Low
IL = -7.5mA
VOH
Output Swing High
IL = +7.5mA
14.85
14.95
V
ISC
Short Circuit Current
RL = 10Ω
±220
±260
mA
Reference buffer VS from 4.5V to 15.5V
55
80
dB
VCOM buffer, VS from 4.5V to 15.5V
55
80
dB
50
150
mV
POWER SUPPLY PERFORMANCE
PSRR
IS
Power Supply Rejection Ratio
Total Supply Current
No load
8.5
10
mA
DYNAMIC PERFORMANCE (BUFFER AMPLIFIERS)
SR
Slew Rate (Note 2)
-4V ≤ VOUT ≤ 4V, 20% to 80%
tS
Settling to +0.1% (AV = +1)
BW
-3dB Bandwidth
2
50
70
V/µs
(AV = +1), VO = 2V step
250
ns
RL = 10kΩ, CL = 10pF
12
MHz
FN7506.0
February 14, 2005
EL5624A
Electrical Specifications
PARAMETER
VS+ = +15V, VS- = 0, RL = 10kΩ, CL = 10pF to 0V, Gain of VCOM = 1, RLVCM = 1kΩ and TA = 25°C,
unless otherwise specified (Continued)
DESCRIPTION
CONDITIONS
MIN
TYP
RL = 10kΩ, CL = 10pF
8
MAX
UNIT
GBWP
Gain-Bandwidth Product
MHz
PM
Phase Margin
RL = 10kΩ, CL = 10pF
50
°
CS
Channel Separation
f = 5MHz
75
dB
70
V/µs
DYNAMIC PERFORMANCE (VCOM AMPLIFIERS)
SR
Slew Rate (Note 2)
-4V ≤ VOUT ≤ 4V, 20% to 80%
tS
Settling to +0.1% (AV = +1)
(AV = +1), VO = 6V step
150
ns
BW
-3dB Bandwidth
RL = 1kΩ, CL = 2pF
35
MHz
GBWP
Gain-Bandwidth Product
RL = 1kΩ, CL = 2pF
20
MHz
PM
Phase Margin
RL = 1kΩ, CL = 2pF
50
°
60
NOTES:
1. Measured over operating temperature range
2. Slew rate is measured on rising and falling edges
Pin Descriptions
PIN NUMBER
PIN NAME
PIN FUNCTION
1
VIN1
Input
2
VIN2
Input
3
VIN3
Input
4
VIN4
Input
5, 6
VS+
Positive supply
9
VINP
Positive input - VCOM
10
VINN
Negative input - VCOM
11
NC
Not connected
12
VOUT
Output for VCOM
15, 16
VS-
Negative supply
17
VOUT4
Output
18
VOUT3
Output
19
VOUT2
Output
20
VOUT1
Output
7
VIN5
Input
8
VIN6
Input
14
VOUT5
Output
13
VOUT6
Output
Test Circuits
VOUT
VIN
10kΩ
50Ω
FOR BUFFERS
3
VIN
10pF
VOUT
+
50Ω
1kΩ
2pF
FOR VCOM
FN7506.0
February 14, 2005
EL5624A
Typical Performance Curves
20
VS=±7.5V
CL=10pF
NORMALIZED MAGNITUDE (dB)
NORMALIZED MAGNITUDE (dB)
20
10
10kΩ
1kΩ
0
150Ω
-10
562Ω
-20
-30
100K
1M
10M
VS=±7.5V
RL=10kΩ
0
47pF
-10
12pF
-20
1M
FREQUENCY (Hz)
600
OUTPUT IMPEDANCE (Ω)
PSRR (dB)
80
PSRR60
40
20
0
1K
10K
100K
100M
FIGURE 2. FREQUENCY RESPONSE FOR VARIOUS CL
(BUFFER)
VS=±7.5V
PSRR+
10M
FREQUENCY (Hz)
FIGURE 1. FREQUENCY RESPONSE FOR VARIOUS RL
(BUFFER)
100
100pF
10
-30
100K
100M
1000pF
1M
10M
VS=±7.5V
TA=25°C
480
360
240
120
0
100K
FREQUENCY (Hz)
1M
10M
100M
FREQUENCY (Hz)
FIGURE 3. PSRR vs FREQUENCY (BUFFER)
FIGURE 4. OUTPUT IMPEDANCE vs FREQUENCY (BUFFER)
80
OVERSHOOT (%)
VOLTAGE NOISE (nV/√Hz)
100
10
VS=±7.5V
70 RL=10kΩ
VIN=100mV
60
50
40
30
20
10
1
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 5. INPUT NOISE SPECIAL DENSITY vs FREQUENCY
(BUFFER)
4
0
10
100
1K
CAPACITANCE (pF)
FIGURE 6. OVERSHOOT vs LOAD CAPACITANCE (BUFFER)
FN7506.0
February 14, 2005
EL5624A
Typical Performance Curves (Continued)
10
0.018
VS=±5V
RL=10kΩ
0.016 V =2V
IN
P-P
THD + NOISE (%)
STEP SIZE (V)
VS=±7.5V
RL=10kΩ
6 CL=12pF
2
-2
0.014
0.012
0.01
-6
0.008
-10
200 250 300 350 400 450 500 550 600 650
0.006
1K
10K
SETTLING TIME (ns)
FIGURE 7. SETTLING TIME vs STEP SIZE (BUFFER)
12
VS=±5V
RL=10kΩ
10
VOP-P (V)
FIGURE 8. TOTAL HARMONIC DISTORTION + NOISE vs
FREQUENCY (BUFFER)
0mA
5mA
8
6
5mA/DIV
RS=0Ω
CL=200pF
0V
500mA/DIV
RS=10Ω
CL=4.7pF
4
RS=10Ω
CL=1nF
2
0
10K
100K
FREQUENCY (Hz)
100K
1M
M=1µs/DIV
VS=±7.5V
VIN=0V
10M
FREQUENCY (Hz)
FIGURE 9. OUTPUT SWING vs FREQUENCY (BUFFER)
FIGURE 10. TRANSIENT LOAD REGULATION - SOURCING
(BUFFER)
VS=±7.5V
RL=10kΩ
CL=12pF
50mV/DIV
200ns/DIV
FIGURE 11. TRANSIENT LOAD REGULATION -SINKING
(BUFFER)
5
FIGURE 12. SMALL SIGNAL TRANSIENT RESPONSE
(BUFFER)
FN7506.0
February 14, 2005
EL5624A
Typical Performance Curves (Continued)
NORMALIZED MAGNITUDE (dB)
VS=±7.5V
1V/DIV
VS=±7.5V
CL=1.5pF
4
1kΩ
500Ω
2
0
-2
150Ω
-4
100K
1µs/DIV
10M
1M
100M
FREQUENCY (Hz)
FIGURE 13. LARGE SIGNAL TRANSIENT RESPONSE
(BUFFER)
5mA/DIV
0mA
FIGURE 14. FREQUENCY RESPONSE FOR VARIOUS RL
(VCOM)
5mA
5mA/DIV
0mA
5mA
0V
500mV/DIV
0V
500mV/DIV
RS=100Ω
CL=8pF
M=200ns/DIV
VS=±7.5V
VIN=0V
FIGURE 15. TRANSIENT LOAD REGULATION - SOURCING
(VCOM)
RS=100Ω
CL=8pF
M=200ns/DIV
VS=±7.5V
VIN=0V
FIGURE 16. TRANSIENT LOAD REGULATION - SINKING
(VCOM)
VS=±7.5V, RL=1kΩ, CL=8pF
VS=±7.5V, RL=1kΩ, CL=8pF
VIN
VIN
50mV/DIV
2V/DIV
VOUT
VOUT
200ns/DIV
FIGURE 17. SMALL SIGNAL TRANSIENT RESPONSE (VCOM)
6
1µs/DIV
FIGURE 18. LARGE SIGNAL TRANSIENT RESPONSE (VCOM)
FN7506.0
February 14, 2005
EL5624A
Typical Performance Curves (Continued)
100
1
50
20
GAIN
-50
VS=±7.5V
RL=1kΩ
CL=1.5pF
-60
-150
10K
100K
1M
10M
100M
FREQUENCY (Hz)
0.7
θ
0.6
JA
0.5
0.4
HT
SS
=1 OP
2
25
°C 0
/W
0.3
0.2
0
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 19. OPEN LOOP GAIN AND PHASE vs FREQUENCY
POWER DISSIPATION (W)
800mW
0.8
0.1
-100
1K
3.5
POWER DISSIPATION (W)
150
PHASE
-20
0.9
PHASE (°)
GAIN (dB)
60
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
FIGURE 20. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD - HTSSOP EXPOSED
DIEPAD SOLDERED TO PCB PER JESD51-5
2.857W
3
2.5
θ
2
HT
JA
=3
1.5
SS
O
P2
5°
0
C/
W
1
0.5
0
0
25
75 85 100
50
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 21. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Description of Operation and Application
Information
Product Description
The EL5624A is fabricated using a high voltage CMOS
process. It exhibits rail to rail input and output capability and
has very low power consumption. When driving a load of
10K and 12pF, this buffer has a -3dB bandwidth of 12MHz
and exhibit 18V/µs slew rate. The VCOM amplifier has a
-3dB bandwidth of 35MHz and exhibit 70V/µs slew rate.
Input, Output, and Supply Voltage Range
The EL5624A is specified with a single nominal supply
voltage from 5V to 15V or a split supply with its total range
from 5V to 15V. Correct operation is guaranteed for a supply
range from 4.5V to 16.5V.
7
The input common-mode voltage range of the EL5624A
extends 500mV beyond the supply rails. The output swings
of the buffers and VCOM amplifier typically extend to within
100mV of the positive and negative supply rails with load
currents of 5mA. Decreasing load currents will extend the
output voltage even closer to each supply rails.
Output Phase Reversal
The EL5624A is immune to phase reversal as long as the
input voltage is limited from VS- -0.5V to VS+ +0.5V.
Although the device's output will not change phase, the
input's overvoltage should be avoided. If an input voltage
exceeds supply voltage by more than 0.6V, electrostatic
protection diode placed in the input stage of the device begin
to conduct and overvoltage damage could occur.
FN7506.0
February 14, 2005
EL5624A
Choice of Feedback Resistor and Gain Bandwidth
Product for VCOM Amplifier
The maximum power dissipation allowed in a package is
determined according to:
For applications that require a gain of +1, no feedback
resistor is required. Just short the output pin to the inverting
input pin. For gains greater than +1, the feedback resistor
forms a pole with the parasitic capacitance at the inverting
input. As this pole becomes smaller, the amplifier's phase
margin is reduced. This causes ringing in the time domain
and peaking in the frequency domain. Therefore, RF has
some maximum value that should not be exceeded for
optimum performance. If a large value of RF must be used, a
small capacitor in the few Pico farad range in parallel with RF
can help to reduce the ringing and peaking at the expense of
reducing the bandwidth.
T JMAX - T AMAX
P DMAX = -------------------------------------------Θ JA
As far as the output stage of the amplifier is concerned, the
output stage is also a gain stage with the load. RF and RG
appear in parallel with RL for gains other than +1. As this
combination gets smaller, the bandwidth falls off.
Consequently, RF also has a minimum value that should not
be exceeded for optimum performance. For gain of +1, RF =
0 is optimum. For the gains other than +1, optimum
response is obtained with RF between 1kΩ to 5kΩ.
The VCOM amplifier has a gain bandwidth product of
20MHz. For gains ≥5, its bandwidth can be predicted by the
following equation:
where:
• TJMAX = Maximum junction temperature
• TAMAX = Maximum ambient temperature
• θJA = Thermal resistance of the package
• PDMAX = Maximum power dissipation in the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the loads, or:
P DMAX = V S × I S + Σi × [ ( V S + – V OUT i ) × I LOAD i ] +
( V S + – V OUT ) × I LA
when sourcing, and:
P DMAX = V S × I S + Σi × [ ( V OUT i – V S - ) × I LOAD i ] +
( V OUT – V S - ) × I LA
when sinking.
where:
Gain × BW = 20MHz
• i = 1 to total number of buffers
Output Drive Capability
• VS = Total supply voltage of buffer and VCOM
The EL5624A does not have internal short-circuit protection
circuitry. The buffer will limit the short circuit current to over
250mA and the VCOM amplifier will limit the short circuit
current to ±200mA if the outputs are directly shorted to the
positive or the negative supply. If the output is shorted
indefinitely, the power dissipation could easily increase such
that the part will be destroyed. Maximum reliability is
maintained if the output continuous current never exceeds
±30mA for the buffers and ±60mA for the VCOM amplifier.
These limits are set by the design of the internal metal
interconnections.
• ISMAX = Total quiescent current
The Unused Buffers
It is recommended that any unused buffers should have their
inputs tied to ground plane.
Power Dissipation
With the high-output drive capability of the EL5624A, it is
possible to exceed the 125°C “absolute-maximum junction
temperature” under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for the application to determine if load
conditions need to be modified for the buffer to remain in the
safe operating area.
8
• VOUTi = Maximum output voltage of the application
• VOUT = Maximum output voltage of VCOM
• ILOADi = Load current of buffer
• ILA = Load current of VCOM
If we set the two PDMAX equations equal to each other, we
can solve for the RLOAD's to avoid device overheat. The
package power dissipation curves provide a convenient way
to see if the device will overheat. The maximum safe power
dissipation can be found graphically, based on the package
type and the ambient temperature. By using the previous
equation, it is a simple matter to see if PDMAX exceeds the
device's power derating curves.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Ground
plane construction is highly recommended, lead lengths
should be as short as possible, and the power supply pins
must be well bypassed to reduce the risk of oscillation. For
normal single supply operation, where the VS- pin is
connected to ground, one 0.1µF ceramic capacitor should be
FN7506.0
February 14, 2005
EL5624A
placed from the VS+ pin to ground. A 4.7µF tantalum
capacitor should then be connected from the VS+ pin to
ground. One 4.7µF capacitor may be used for multiple
devices. This same capacitor combination should be placed
at each supply pin to ground if split supplies are to be used.
Important Note: The metal plane used for heat sinking of
the device is electrically connected to the negative
supply potential (VS-). If VS- is tied to ground, the
thermal pad can be connected to ground. Otherwise, the
thermal pad must be isolated from any other power
planes.
Package Outline Drawing
NOTE: The package drawings shown here may not be the latest versions. For the latest revisions, please refer to the Intersil website at
www.intersil.com/design/packages/elantec
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
9
FN7506.0
February 14, 2005
Similar pages