TSM080N03PQ56_C1602.pdf

TSM080N03PQ56
Taiwan Semiconductor
N-Channel Power MOSFET
30V, 73A, 8mΩ
FEATURES
PRODUCT SUMMARY
● Low RDS(ON) to minimize conductive Losses
PARAMETER
VALUE
UNIT
VDS
30
V
● Low gate charge for fast power switching
● 100% UIS and Rg tested
● Compliant to RoHS Directive 2011/65/EU and in
RDS(on) (max)
accordance to WEEE 2002/96/EC
● Halogen-free according to IEC 61249-2-21 definition
VGS = 10V
8
VGS = 4.5V
12.5
Qg
mΩ
7.2
nC
APPLICATIONS
● DC-DC Converters
● Battery Power Management
● ORing FET/Load Switch
PDFN56
Notes: MSL 3 (Moisture Sensitivity Level) per J-STD-020
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
VDS
30
V
Gate-Source Voltage
VGS
±20
V
Continuous Drain Current
Pulsed Drain Current
TC = 25°C
(Note 1)
TA = 25°C
(Note 1)
ID
73
14
A
IDM
292
A
Single Pulse Avalanche Current
(Note 2)
IAS
23
A
Single Pulse Avalanche Energy
(Note 2)
EAS
26
mJ
Total Power Dissipation
Total Power Dissipation
TC = 25°C
TC = 125°C
TA = 25°C
TA = 125°C
Operating Junction and Storage Temperature Range
PD
PD
69
14
2.6
0.5
W
W
TJ, TSTG
- 55 to +150
°C
SYMBOL
LIMIT
UNIT
Thermal Resistance – Junction to Case
RӨJC
1.8
°C/W
Thermal Resistance – Junction to Ambient
RӨJA
48
°C/W
THERMAL RESISTANCE
PARAMETER
Thermal Performance Note: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The casethermal reference is defined at the solder mounting surface of the drain pins. RӨJA is guaranteed by design while RӨCA is
determined by the user’s board design.
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Version: C1602
TSM080N03PQ56
Taiwan Semiconductor
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
PARAMETER
Static
CONDITIONS
SYMBOL
MIN.
TYP.
MAX.
UNIT
(Note 3)
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250µA
BVDSS
30
--
--
V
Gate Threshold Voltage
VGS = VDS, ID = 250µA
VGS(TH)
1
1.6
2.5
V
Gate-Source Leakage Current
VGS = ±20V, VDS = 0V
IGSS
--
--
±100
nA
Drain-Source Leakage Current
VGS = 0V, VDS = 30V
IDSS
--
--
1
µA
--
6.5
8
--
9.5
12.5
gfs
--
30
--
Qg
--
14.4
--
VGS = 10V, ID = 14A
Drain-Source On-State Resistance
VGS = 4.5V, ID = 14A
VDS = 5V, ID = 14A
Forward Transconductance
Dynamic
RDS(on)
mΩ
S
(Note 4)
VGS = 10V, VDS = 15V,
Total Gate Charge
ID = 14A
Total Gate Charge
Qg
VGS = 4.5V, VDS = 15V,
Gate-Source Charge
ID = 14A
Gate-Drain Charge
Input Capacitance
VGS = 0V, VDS = 15V,
Output Capacitance
f = 1.0MHz
Reverse Transfer Capacitance
Gate Resistance
Switching
f = 1.0MHz, open drain
7.2
nC
Qgs
--
2.6
--
Qgd
--
3.3
--
Ciss
--
843
--
Coss
--
157
--
Crss
--
95
--
Rg
0.9
3
6
td(on)
--
4.8
--
tr
--
12.5
--
td(off)
--
27.6
--
tf
--
8.2
--
VSD
--
--
1
V
pF
Ω
(Note 4)
Turn-On Delay Time
Rise Time
VGS = 10V, VDS = 15V,
Turn-Off Delay Time
ID = 14A, RG = 3.3Ω,
Fall Time
Source-Drain Diode
ns
(Note 3)
Diode Forward Voltage
VGS = 0V, IS = 15A
Reverse Recovery Time
IS = 14A,
trr
--
16
--
ns
Reverse Recovery Charge
di/dt = 100A/μs
Qrr
--
8.3
--
nC
Notes:
1. Current limited by package.
2. L = 0.1mH, VGS = 10V, VDS = 25V, RG = 25Ω, IAS = 23A, Starting TJ = 25°C
3. Pulse test: Pulse Width ≤ 300µs, duty cycle ≤ 2%.
4. Switching time is essentially independent of operating temperature.
ORDERING INFORMATION
PART NO.
TSM080N03PQ56 RLG
PACKAGE
PACKING
PDFN56
2,500pcs / 13” Reel
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Version: C1602
TSM080N03PQ56
Taiwan Semiconductor
CHARACTERISTICS CURVES
(TA = 25°C unless otherwise noted)
Normalized Vth vs. TJ
On-Resistance vs. Junction Temperature
1.6
1.1
1
0.9
0.8
0.7
0.6
-50
0
50
100
150
RDS(on), Drain-Source On-Resistance
(Normalized)
Normalized Gate Threshold
1.2
1.4
1.2
1
0.8
0.6
-50
Capacitance vs. Drain-Source Voltage
100
150
Gate-Source Voltage vs. Gate Charge
VGS, Gate to Source Voltage (V)
1000
C, Capacitance (pF)
50
10
1200
CISS
800
600
400
COSS
200
CRSS
0
0
5
10
VDS=15V
ID=14A
8
6
4
2
0
15
20
25
30
0
VDS, Drain to Source Voltage (V)
3
6
9
12
15
Qg, Gate Charge (nC)
On-Resistance vs. Gate-Source Voltage
Maximum Safe Operating Area, Junction-to-Case
0.04
1000
0.035
0.03
ID, Drain Current (A)
RDS(on), Drain-Source On-Resistance (Ω)
0
TJ, Junction Temperature (°C)
TJ, Junction Temperature (℃)
0.025
0.02
0.015
ID=14A
0.01
RDS(ON)
100
10
SINGLE PULSE
RӨJC=1.8°C/W
TC=25°C
0.005
0
3
4
5
6
7
8
9
1
10
0
1
10
100
VDS, Drain to Source Voltage (V)
VGS, Gate to Source Voltage (V)
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Version: C1602
TSM080N03PQ56
Taiwan Semiconductor
CHARACTERISTICS CURVES
(TA = 25°C unless otherwise noted)
Normalized Thermal Transient Impedance, Junction-to-Case
Normalized Effective Transient
Thermal Impedance, ZӨJC
10
SINGLE PULSE
RӨJC=1.8°C/W
1
Duty=0.5
Duty=0.2
Duty=0.1
Duty=0.05
Duty=0.02
Duty=0.01
Single
0.1
0.01
0.0001
0.001
Notes:
Duty = t1 / t2
TJ = TC + PDM x ZӨJC x RӨJC
0.01
0.1
t, Square Wave Pulse Duration (sec)
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Version: C1602
TSM080N03PQ56
Taiwan Semiconductor
PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters)
PDFN56
SUGGESTED PAD LAYOUT (Unit: Millimeters)
MARKING DIAGRAM
Y = Year Code
M = Month Code for Halogen Free Product
O =Jan P =Feb Q =Mar R =Apr
S =May T =Jun U =Jul
V =Aug
W =Sep X =Oct
Y =Nov Z =Dec
L = Lot Code (1~9, A~Z)
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Version: C1602
TSM080N03PQ56
Taiwan Semiconductor
Notice
Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,
assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, to
any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of
sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty,
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merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify TSC for any damages resulting from such improper use or sale.
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Version: C1602