Application Notes

AN11225
Demonstration of a 1GHz discrete VCO based on the BFR92A
Rev. 1.0 — 26 June 2012
Application note
Document information
Info
Content
Keywords
Discrete, VCO, BFR92A, EVB, Design, Evaluation, Measurements
Abstract
This document provides an example of a discrete Voltage Controlled
Oscillator based on the BFR92A NPN wideband transistor. The device is
oscillating on 1GHz and has a tuning range of about 100MHz. The VCO
is implemented on an NXP VCO evaluation board which can be used to
evaluate multiple oscillator types and configurations.
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
Revision history
Rev
Date
Description
1.0
Initial version
20120626
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
2 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
1. Introduction
The VCO demonstrated by this application note is a low-power single transistor commoncollector Colpitts VCO with a center frequency of 1GHz and a tuning range of 100MHz. A
VCO evaluation board is designed which can be used for evaluation of other VCO
devices as well.
The VCO evaluation board can be used to evaluate the performance of different types of
discrete LC-tank VCOs. Special attention is paid to the circuit’s flexibility. The board
allows the VCO to be configured either as a Colpitts oscillator or as a Clapp oscillator.
Frequency tuning possibility is obtained using a varicap diode, which may be a device in
a SOT323 (SC-76) package or in a SOT523 (SC-79) package. Furthermore, the board
can be configured with or without an output buffer and BJT devices in both SOT23
package as well as in SOT323 package can be mounted. Also, an external bias pin is
available to be able to tweak the DC bias setting of the oscillator’s active device
somewhat. The output of the oscillator can either be taken directly from the emitter or
collector of T1 or from the emitter of the buffer stage, both ways providing enough
positions for filter and impedance matching components. Even though not strictly
required, all three connectors are SMA type connectors, allowing for coaxial cables to be
used for the DC inputs as well, in order to reduce ambient noise coupling. Additionally,
bias-T positions are available at the DC inputs for noise filtering and RF-DC isolation.
Fig 1.
AN11225
Application note
VCO evaluation board with NXP’s BFR92A NPN wideband transistor
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
3 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
2. General board schematic
Fig 2.
Schematic of VCO EVB
3. Board layout
Fig 3.
AN11225
Application note
Board layout
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
4 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
Fig 4.
Board layout with components
4. PCB stack
The material that has been used for the EVB is FR4 using the stack shown in Fig 5.
Fig 5.
AN11225
Application note
PCB stack
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
5 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
5. Example board configurations
5.1 Configuration 1 - Colpitts emitter out
(1) Simple output coupling through capacitor
Fig 6.
Colpitts emitter out
5.2 Configuration 2 – Colpitts Collector out
(1) Output coupling with LC-filter positions for harmonic suppression
Fig 7.
AN11225
Application note
Colpitts collector out
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
6 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
5.3 Configuration 3 – Colpitts emitter out with buffer stage
(1) Coupling from emitter of sustaining stage to base of buffer stage
Fig 8.
Colpitts emitter out with buffer stage
5.4 Configuration 4- Clapp emitter out with buffer stage
(1) Coupling from emitter of sustaining stage to base of buffer stage
Fig 9.
AN11225
Application note
Gouriet-Clapp emitter out with buffer stage
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
7 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
Table 1.
Example of mounted components and functions
Mounted component types: C=capacitor, L=inductor, R=resistor, T=transistor, VC=varicap diode, NM= not mounted
ID
Configuration 1
Configuration 2
Configuration 3
Configuration 4
Type
Function
Type
Function
Type Function
Type Function
C1
C
Decoupling
C
Decoupling
C
Decoupling
C
Decoupling
C2
C
Decoupling
C
Decoupling
C
Decoupling
C
Decoupling
C3
C
Varactor scaling
C
Varactor scaling
C
Varactor scaling
C
Varactor scaling
C4
C
Varactor scaling
C
Varactor scaling
C
Varactor scaling
C
Varactor scaling
C5
C
DC block
C
DC block
C
DC block
R
Short
C6
C
Decoupling
NM
Open
C
Decoupling
C
Decoupling
C7
C
Feedback
C
Feedback
C
Feedback
C
Feedback
C8
C
Feedback
C
Feedback
C
Feedback
C
Feedback
C9
C
Decoupling
C
Decoupling
C
Decoupling
C
Decoupling
C10
C
Decoupling
NM
Open
C
Decoupling
C
Decoupling
C11
C
Output coupling
C
Output coupling
C
Output coupling
C
Output coupling
L1
R
Short
L
DC feed
R
Short
R
Short
L2
L
DC feed
L
DC feed
L
DC feed
L
DC feed
L3
L
Tank inductance
L
Tank inductance
L
Tank inductance
L
Tank inductance
L4
R
Short
R
Short
R
Short
R
Short
L5
R
Short
R
Short
R
Short
R
Short
L6
L
RF block
L
RF block
L
RF block
L
RF block
L7
NM
Open
NM
Open
R
Short
R
Short
R1
R
Transistor bias
R
Transistor bias
R
Transistor bias
R
Transistor bias
R2
R
Transistor bias
R
Transistor bias
R
Transistor bias
R
Transistor bias
R3
R
Bias tweak
R
Bias tweak
R
Bias tweak
R
Bias tweak
R4
R
Transistor bias
R
Transistor bias
R
Transistor bias
R
Transistor bias
PH1
R
Short
R
Short
R
Short
NM
Open
PH2
R
Short
R
Short
R
Short
NM
Open
PH3
NM
Open
NM
Open
NM
Open
R
Short
PH4
R
Short
R
Short
R
Short
NM
Open
PH5
L
Low-pass filter
NM
Open
C
DC block/coupling
C
DC block/coupling
PH6
NM
Open
R
Short
R
Short
R
Short
PH7
NM
Open
L
Low-pass filter
R
Transistor bias
R
Transistor bias
PH8
C
Low-pass filter
C
Low-pass filter
R
Transistor bias
R
Transistor bias
PH9
R
Short
R
Short
NM
Open
NM
Open
PH10 R
Short
R
Short
NM
Open
NM
Open
PH11 NM
Open
NM
Open
R
Transistor bias
R
Transistor bias
T1
T
Sustaining stage
T
Sustaining stage
T
Sustaining stage
T
Sustaining stage
T2
NM
Open
NM
Open
T
Buffer stage
T
Buffer stage
VC1
VC
Frequency tuning
VC
Frequency tuning
VC
Frequency tuning
VC
Frequency tuning
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
8 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
6. Design and evaluation
6.1 Design recommendations
 A higher C/L ratio of the tank results in a higher loaded quality factor and
consequently to better phase noise, load pulling and supply pushing performance.
 Use a high unloaded quality factor resonator inductor (L3) such as a wire-wound-type
inductor.
 The loop gain can be controlled by for example changing the C7/C8 ratio. Smaller
ratios result in higher loop gain. Make sure that the loop gain is well above the
critical loop gain to compensate for component spread and temperature variation.
Take into account though that a too high loop gain results in bad harmonic
performance.
 Use C3 to scale down the capacitance tuning range and use C4 to increase the tank
capacitance to center the frequency of oscillation in the desired range.
 Mounting of capacitor C3 is always required for it serves as a DC blocking capacitor
as well. If scaling of the capacitance tuning range is not required, choose C3>>CVC1.
 Generally the system has sufficient loop gain if the oscillator starts oscillating for
supply voltages well below the nominal operating voltage.
 Be aware that the more power is fed back to the resonator the less power is available
for the load, and vice versa.
 Use a high reactance inductor (L6) in series with the emitter resistor to limit the RF
power dissipated in the emitter resistor.
 Higher output power generally results in better phase noise performance.
 To increase the output power one might increase the collector current. Be aware that
this action also increases the flicker corner frequency which increases the 1/f noise
contribution to phase noise. An optimum collector current for best phase noise
performance might be found by using the bias tweaking pin.
 A high reactance output coupling capacitor (C11) results in better load pulling
performance but might also decrease the output power.
 A low reactance output coupling capacitor (C11) generally enhances the harmonics.
Notice that capacitive output coupling already behaves like a high-pass filter.
 Use an LC-type filter at the oscillator’s output for better harmonic performance.
 Make sure that the tank’s voltage swing does not exceed a value for which the
varicap diode will enter forward conduction mode.
 Investigate the contribution of the varicap diode to the phase noise performance by
replacing the device with a fixed capacitor.
 Use an amplifier with high gain, a low flicker corner frequency and low noise-figure.
 A too high transition frequency of the amplifier might result in spurious oscillations
and degraded performance. Choose the transition frequency about 5 times the
maximum frequency of oscillation.
 This board is designed for evaluation purposes and is designed for flexibility, not for
optimal performance. Design a smaller dedicated VCO board for best performance.
 Board characteristics strongly influence the oscillator characteristics. Make sure to
characterize the board for simulation by for example EM-simulation of the board.
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
9 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
6.2 Using the bias tweaking pin
The bias tweaking pin can be used to tweak the collector current by varying the base
voltage.
 Use a high impedance resistor (R3), for example 50K.
 Decouple the supply line using a capacitor (C9), for example 47nF.
 Change the bias tweaking pin voltage in the positive and negative direction to tweak
the current in both directions. Make sure that the power dissipated by R3 stays well
below 60mW.
 For larger collector current sweeping, remove resistors R1 and R2 and replace R3 by
a high reactance inductor, for example 100nH. Make sure that the transistor’s
junction voltages stay below the maximum ratings.
 Set the transistor using the R1-R2 voltage divider in the DC operating point found by
optimization.
 Notice that the frequency of oscillation might shift for different DC operating points.
Change the tank components after optimization accordingly.
7. BFR92A 10mA VCO implementation
7.1 BFR92A model
The used model for the BFR92A is a Mextram 504 model of the BFR92A die and is
expanded with the parasitic capacitances and inductances of the package as shown in
Fig 10.
Fig 10. Mextram 504 model of BFR92A die expanded with package characteristics
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
10 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
7.2 PCB characterization
The VCO EVB layout was characterized by performing a 2D EM simulation with the
Momentum RF simulator of Agilent Advanced Design System (ADS 2009). A layout-looka-like symbol was created from the resulting S-parameter file allowing for co-simulation
of the board. The components were connected to the simulation component of the PCB
and the values are those shown in chapter 8. The zero ohm resistors are modeled as
150pH inductors with 5mOhm series resistance (estimation) for a better approximation to
the reality.
Fig 11. Layout-look-a-like co-simulation component
7.3 Simulation of oscillation frequency
By inserting the ADS OscTest component into the feedback path of the oscillator the
small-signal loop can be calculated and plotted as shown in Fig 12 and Fig 13. The
OscTest component is connected in series with the transistor’s emitter with the arrow
pointed away from the emitter. The default settings of OscTest are used and the
frequency is swept from 1MHz to 5GHz. Notice that the small-signal loop gain is plotted.
Steady-state oscillations occur when the active device is limiting the output amplitude
and the device is then operating in non-linear mode. The characteristics of the active
device will change somewhat and the frequency of oscillation will be a little lower than
according to the small-signal loop gain prediction.
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
11 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
Fig 12. Polar plot of small-signal loop gain at VTUNE = 5V
Fig 13. Polar plot of small-signal loop gain at VTUNE = 0V
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
12 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
8. Bill of materials
Table 2.
Bill of materials
Designator
Description
Package Value
Supplier name / type
Comment
C1
Ceramic chip capacitor 0402
47nF
Murata / GRM15
Decoupling
C2
Ceramic chip capacitor 0402
47nF
Murata / GRM15
Decoupling
C3
Ceramic chip capacitor 0402
4.3pF
Murata / GRM15
Varactor scaling
C4
Ceramic chip capacitor 0402
0.6pF
Murata / GRM15
Varactor scaling
C5
Ceramic chip capacitor 0402
100pF
Murata / GRM15
DC block
C6
Ceramic chip capacitor 0402
47pF
Murata / GRM15
Decoupling
C7
Ceramic chip capacitor 0402
1pF
Murata / GRM15
Feedback
C8
Ceramic chip capacitor 0402
3pF
Murata / GRM15
Feedback
C9
Not mounted
-
-
Not mounted
C10
Ceramic chip capacitor 0402
47pF
Murata / GRM15
Decoupling
C11
Ceramic chip capacitor 0402
33pF
Murata / GRM15
Output coupling
L1
Zero Ohm resistor
0402
0Ω
Yageo
Short
L2
Multi-layer inductor
0402
100nH
Murata / LQG15
Bias-T
L3
Wire-wound inductor
0402
2.4nH
Murata / LQW15
Tank inductor
L4
Zero Ohm resistor
0402
0Ω
Yageo
Short
L5
Zero Ohm resistor
0402
0Ω
Yageo
Short
L6
Zero Ohm resistor
0402
0Ω
Yageo
Short
L7
Zero Ohm resistor
0402
0Ω
Yageo
Short
R1
Film resistor
0402
1K5
Yageo
Biasing network
R2
Film resistor
0402
2K7
Yageo
Biasing network
R3
Not mounted
-
-
-
Not mounted
R4
Film resistor
0402
220
Yageo
Biasing network
PH1
Zero Ohm resistor
0402
0Ω
Yageo
Short
PH2
Zero Ohm resistor
0402
0Ω
Yageo
Short
PH3
Not mounted
-
-
-
Not mounted
PH4
Zero Ohm resistor
0402
0Ω
Yageo
Short
PH5
Zero Ohm resistor
0402
0Ω
Yageo
Short
PH6
Not mounted
-
-
-
Not mounted
PH7
Not mounted
-
-
-
Not mounted
PH8
Not mounted
-
-
-
Not mounted
PH9
Zero Ohm resistor
0402
0Ω
Yageo
Short
PH10
Zero Ohm resistor
0402
0Ω
Yageo
Short
PH11
Not mounted
-
-
-
Not mounted
T1
NPN BJT
0402
NXP Semiconductors / BFR92A
Sustaining stage
T2
Not mounted
-
-
Not mounted
VC1
Varicap diode
0402
NXP Semiconductors / BB145
Tuning
BIAS header
Bias tweaking
-
-
Bias tweaking
Vcc, Vtune, RFout
SMA RF connector
Johnson / 142-0701-841
VCO ports
AN11225
Application note
-
-
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
13 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
9. Measurements
9.1 Required equipment
In order to measure the evaluation board the following equipment is required:

DC Power Supply Unit for VCC capable of sourcing 30mA at 5V

DC Power Supply Unit for VTUNE capable of sourcing 500nA at 5V

If possible both DC PSUs are battery power supplies to minimize the
contribution of supply noise/ripple to the phase noise performance

Digital Multimeter for supply current measurement and supply voltage
verification (optional)

RF Spectrum Analyzer covering the frequency range up to about 9GHz

RF SSB Phase Noise Analyzer for phase noise measurement with a sensitivity
of at least -150dBc at 1MHz offset

Proper RF cables

A banana-plugs-to-BNC-connector can be used when the power supply has
banana plug outputs
9.2 Connections and setup
9.2.1 Current measurements
1. Set the DMM in DC current measuring mode and connect the meter in series with the
DC power supply for VCC.
2. Set the DC power supply to 5V and verify this voltage using a DMM
3. Connect the output of the DMM and the ground terminal to a shielded RF cable with
an SMA-connector to connect it to the VCO’s VCC port
4. Connect the VTUNE PSU with a shielded RF cable with an SMA-connector to the
VCO’s VTUNE port
5. Connect the VCO’s RFOUT port to a 50Ohm load
6. Turn on both DC power supplies and sweep the VTUNE voltage while noting the
measured currents
9.2.2 Frequency and power measurements
1. Connect both the VCC and the VTUNE port to the power supply (preferably a battery
supply) with short shielded cables
2. Connect the RFOUT port to the spectrum analyzer using the shortest possible
connector
3. Verify the voltages for the VCC and VTUNE using a DMM, then disconnect the DMM
and turn on both DC power supplies
4. Use the marker function of the spectrum analyzer to measure the frequencies and
corresponding powers. Make sure to measure with the narrowest bandwidth as
possible for most accurate results
5. Setting the spectrum analyzer in averaging mode makes readout more easy and
accurate
6. Perform frequency and power measurements for multiple values of VTUNE and make
sure to verify this tuning voltage every time it is changed
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
14 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
7. Pushing measurements can be performed by varying the VCC voltage by for example
0.5V in both directions from the nominal supply voltage while measuring the
frequency deviation
9.2.3 Phase noise measurements
1. Connect both the VCC and the VTUNE port to the power supply (a battery supply is
required for a valid phase noise measurement) with short shielded cables
2. Connect the RFOUT port to the phase noise analyzer using the shortest possible
connector
3. Some phase noise analyzers switch the load at the start of the measurement causing
the oscillators frequency to be pulled somewhat and consequently the analyzer will
not be able to capture the carrier. In this case it would help to connect for example a
10dB attenuator in between RFOUT and the RF input of the spectrum analyzer to
provide some isolation
4. Set the measurement range of the phase noise analyzer to run from 1KHz to 1MHz
5. For most accurate results, make sure to perform a highly correlated measurement
and preferably also to average multiple curves
10. Typical results
Table 3.
Typical results
VTUNE ICC
POUT
F1
[V]
[mA] [dBm] [MHz]
PF2
[dBc]
PF3
[dBc]
PF4
[dBc]
Phase noise @ 1MHz Pushing
[dBc/Hz]
[MHz/V]
0.0
11.69 1.51
950.78
-10.2
-24.55
-35.47
-127.25
1.79
0.5
11.73 1.45
966.90
-10.1
-24.96
-34.72
-127.49
1.40
1.0
11.75 1.39
980.34
-10.1
-25.39
-33.02
-127.55
1.02
1.5
11.77 1.35
992.17
-9.97
-25.76
-31.35
-127.20
0.563
2.0
11.79 1.31
1003.1
-9.81
-26.19
-30.11
-127.48
0.236
2.5
11.82 1.26
1012.8
-9.65
-26.42
-29.43
-127.71
0.324
3.0
11.84 1.19
1022.6
-9.48
-26.60
-28.93
-127.68
0.770
3.5
11.85 1.12
1032.2
-9.44
-26.80
-28.72
-127.61
1.36
4.0
11.85 1.08
1041.2
-9.41
-27.04
-28.70
-127.20
2.00
4.5
11.85 1.06
1048.8
-9.61
-27.38
-28.85
-126.70
2.58
5.0
11.85 1.05
1054.4
-9.70
-27.69
-28.94
-126.33
3.01
[1]
Frequency and power measurements performed with spectrum analyzer set to 50KHz bandwidth
[2]
Phase noise measurements performed with phase noise analyzer set to correlation =25 and averaging =
50
The characteristics of this VCO are shown below.
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
15 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
ICC [mA]
ICC vs. VTUNE
11.88
11.86
11.84
11.82
11.8
11.78
11.76
11.74
11.72
11.7
11.68
0
1
2
3
4
5
4
5
VTUNE [V]
Fig 14. ICC vs. VTUNE for VCC = 5V
Pushing vs. VTUNE
3.5
Pushing [MHz/V]
3
2.5
2
1.5
1
0.5
0
0
1
2
3
VTUNE [V]
Fig 15. Pushing vs. VTUNE
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
16 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
Output power vs. VTUNE
1.6
Power [dBm]
1.5
1.4
1.3
1.2
1.1
1
0
1
2
3
4
5
4
5
VTUNE [V]
Fig 16. Output power vs. VTUNE
F1 vs. VTUNE
1060
Frequency [MHz)
1040
1020
1000
980
960
940
0
1
2
3
VTUNE [V]
Fig 17. F1 vs. VTUNE
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
17 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
Tuning sensitivity [MHz/V]
Tuning sensitivity vs. VTUNE
30
25
20
15
10
0
1
2
3
4
5
VTUNE [V]
Fig 18. Tuning sensitivity vs. VTUNE
Harmonics
-5
Power [dBc]
-10
-15
-20
F2
-25
F3
-30
F4
-35
-40
0
1
2
3
4
5
VTUNE [V]
Fig 19. Power of harmonics
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
18 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
Typical SSB phase noise
SSB phase noise [dBc/Hz]
-60
-70
-80
-90
-100
-110
-120
-130
1.0E+03
1.0E+04
1.0E+05
1.0E+06
Offset from carrier [Hz]
(1) The phase noise shown in this graph is the typical value of the phase noise averaged across the
tuning range
Fig 20. Average SSB phase noise
SSB phase noise vs. Vtune
-50
SSB phase noise [dBc/Hz]
-60
-70
-80
1KHz
-90
10KHz
-100
100KHz
-110
1MHz
-120
-130
0
1
2
3
4
5
VTUNE [V]
Fig 21. SSB phase noise vs. VTUNE
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
19 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
11. Legal information
11.1 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
11.2 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability
towards customer for the products described herein shall be limited in
accordance with the Terms and conditions of commercial sale of NXP
Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
whether the NXP Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Evaluation products — This product is provided on an “as is” and “with all
faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates
and their suppliers expressly disclaim all warranties, whether express,
implied or statutory, including but not limited to the implied warranties of noninfringement, merchantability and fitness for a particular purpose. The entire
risk as to the quality, or arising out of the use or performance, of this product
remains with customer.
In no event shall NXP Semiconductors, its affiliates or their suppliers be
liable to customer for any special, indirect, consequential, punitive or
incidental damages (including without limitation damages for loss of
business, business interruption, loss of use, loss of data or information, and
the like) arising out the use of or inability to use the product, whether or not
based on tort (including negligence), strict liability, breach of contract, breach
of warranty or any other theory, even if advised of the possibility of such
damages.
Notwithstanding any damages that customer might incur for any reason
whatsoever (including without limitation, all damages referenced above and
all direct or general damages), the entire liability of NXP Semiconductors, its
affiliates and their suppliers and customer’s exclusive remedy for all of the
foregoing shall be limited to actual damages incurred by customer based on
reasonable reliance up to the greater of the amount actually paid by
customer for the product or five dollars (US$5.00). The foregoing limitations,
exclusions and disclaimers shall apply to the maximum extent permitted by
applicable law, even if any remedy fails of its essential purpose.
11.3 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are property of their respective owners.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
20 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
12. List of figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10.
Fig 11.
Fig 12.
Fig 13.
Fig 14.
Fig 15.
Fig 16.
Fig 17.
Fig 18.
Fig 19.
Fig 20.
Fig 21.
VCO evaluation board with NXP’s BFR92A NPN
wideband transistor ........................................... 3
Schematic of VCO EVB .................................... 4
Board layout ...................................................... 4
Board layout with components .......................... 5
PCB stack ......................................................... 5
Colpitts emitter out ............................................ 6
Colpitts collector out .......................................... 6
Colpitts emitter out with buffer stage ................. 7
Gouriet-Clapp emitter out with buffer stage....... 7
Mextram 504 model of BFR92A die expanded
with package characteristics ........................... 10
Layout-look-a-like co-simulation component ... 11
Polar plot of small-signal loop gain at VTUNE = 5V
........................................................................ 12
Polar plot of small-signal loop gain at VTUNE = 0V
........................................................................ 12
ICC vs. VTUNE for VCC = 5V............................... 16
Pushing vs. VTUNE ........................................... 16
Output power vs. VTUNE ................................... 17
F1 vs. VTUNE .................................................... 17
Tuning sensitivity vs. VTUNE ............................. 18
Power of harmonics ........................................ 18
Average SSB phase noise .............................. 19
SSB phase noise vs. VTUNE ............................. 19
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
21 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
13. List of tables
Table 1.
Table 2.
Table 3.
Example of mounted components and functions
.......................................................................... 8
Bill of materials................................................ 13
Typical results ................................................. 15
AN11225
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 26 June 2012
© NXP B.V. 2012. All rights reserved.
22 of 23
AN11225
NXP Semiconductors
Demonstration of a 1GHz discrete VCO based on the BFR92A
14. Contents
1.
2.
3.
4.
5.
5.1
5.2
5.3
5.4
6.
6.1
6.2
7.
7.1
7.2
7.3
8.
9.
9.1
9.2
9.2.1
9.2.2
9.2.3
10.
11.
11.1
11.2
11.3
12.
13.
14.
Introduction ......................................................... 3
General board schematic.................................... 4
Board layout ........................................................ 4
PCB stack............................................................. 5
Example board configurations ........................... 6
Configuration 1 - Colpitts emitter out .................. 6
Configuration 2 – Colpitts Collector out .............. 6
Configuration 3 – Colpitts emitter out with buffer
stage .................................................................. 7
Configuration 4- Clapp emitter out with buffer
stage .................................................................. 7
Design and evaluation ........................................ 9
Design recommendations................................... 9
Using the bias tweaking pin.............................. 10
BFR92A 10mA VCO implementation ............... 10
BFR92A model ................................................. 10
PCB characterization ....................................... 11
Simulation of oscillation frequency ................... 11
Bill of materials.................................................. 13
Measurements ................................................... 14
Required equipment ......................................... 14
Connections and setup .................................... 14
Current measurements .................................... 14
Frequency and power measurements .............. 14
Phase noise measurements ............................. 15
Typical results ................................................... 15
Legal information .............................................. 20
Definitions ........................................................ 20
Disclaimers....................................................... 20
Trademarks ...................................................... 20
List of figures..................................................... 21
List of tables ...................................................... 22
Contents ............................................................. 23
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in the section 'Legal information'.
© NXP B.V. 2012.
All rights reserved.
For more information, visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 26 June 2012
Document identifier: AN11225
Similar pages