tb410

Using the EL4511 Demo Board
®
Technical Brief
July 10, 2003
TB410.1
General Description
Driver Section
The EL4511 demo board is designed
for demonstrating the operation of
Elantec's super sync separator. The
user can evaluate the demo board with or without the
software interface. For a detailed description, please refer to
the data sheet.
The SN74ACT1284 chip is used to increase the logic signals
from the parallel port and the EL4511 chip. R1, R2, an R3 are
the pull-up resistors. R5, R6, and R7 are 1kΩ resistors to
protect the inputs of EL4511's serial interface pins. R4 is
499Ω from the PC ground to the demo board ground.
On the board, the power pins VCCD, VCCA1, and VCCA2 are
connected together as VCC. C1 and C2 are 0.1µF ceramic
small signal bypass capacitors for those pins. C6 is a 4.7µF
Tantalum power bypass capacitor.
The EL4511 demo board uses the supplied Visual Basic
executable file and the parallel port to write and read the
data stream for serial interface. Please refer to the data
sheet for a detailed description of the logic table and the
timing diagram. From the EL4511 Driver disk, copy the
EL4511.exe to your window desktop. If your operating
system is Win98, copy the files "ntport.dll" and "zntport.sys"
to C:\windows\system. If your operating system is Win2000,
Windows XP, or Windows NT, just copy the files "ntport.dll"
and "zntport.sys" to C:\winnt|system32. To open the
program, just double-click the EL4511.exe icon. A control
panel appears (see Figure 1.) From the panel, the user can
write data to register 1, 2, 3, 4, 5, 6, 9, and 10 and read data
from register 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 13, 14, 15, and 16
individually.
HIN, SYNCIN, and VIN are the three line sync signal inputs.
For YUV or RGB applications, Y or G should be connected
to SYNCIN input. For applications with separate horizontal
and vertical sync inputs, these should be connected to the
HIN and VIN pins. Composite video input signals should be
connected to SYNCIN pin. R8 is 75Ω termination resistor
and C3 is 0.1µF AC coupling capacitor. R11 is 10kΩ pull up
resistor to enable the chip when the switch is close.
The LEVEL pin indicates 2X the amplitude of the sync tip vs
back porch. Logic high at the SYNCLOCK pin indicates the
sync has locked to the line rate. SYNCOUT, BACKPORCH,
VOUT, HOUT, ODD/EVEN, and VBLANK are the logic
outputs for the sync separator.
X1 is a 32.768kHz crystal. The XTAL and XTALN pins are
the crystal input and output pins. By default setting, the
crystal oscillator is disabled (Reg9, bit6 is 0). The Mode
control bits in Reg1 and the sample cut-off mode in Reg2 are
overridden by the values on XTAL pin and XTALN pin. See
Table 1 for operation details. Switches S2, S3 can be used to
change the states at those two pins.
SDENB, SCL, and SDA are the three line serial interface
pins.
Software Control
Evaluation Instructions
Evaluate with the crystal oscillator is disabled.
1. Apply 5V to VCC, PC_VCC.
2. Set the states for XTAL and XTALN pins, which depends
on the test signals. See Table 1.
3. Apply the test video signal to the inputs: SYNCIN for
composite video signal; for separate horizontal and
vertical sync inputs, these should be connected to HIN
and VIN respectively.
4. Check that SYNCLOCK pin is held high continuously.
5. Measure the DC level at the LEVEL. It should be ~2X the
sync tip amplitude (~560mV for NTSC/PAL).
6. Confirm operations of all sync separator outputs.
7. Load the EL4511.exe program and connect the parallel
port from your computer to the demo board. Write data to
or read data from the registers.
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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TB410
Evaluate with the crystal oscillator is enabled.
1. Apply 5V to VCC, PC_VCC.
2. Apply the test video signal to the inputs: SYNCIN for
composite video signal; for separate horizontal and
vertical sync inputs, these should be connected to HIN
and VIN respectively.
3. Load the EL4511.exe program and connect the parallel
port from your computer to the demo board. Set bit6 in
Reg9 to high to enable the crystal oscillator. Program the
registers.
4. Check that SYNCLOCK pin is held high continuously.
5. Measure the DC level at the LEVEL. It should be ~2X the
sync tip amplitude (~560mV for NTSC/PAL).
6. Confirm operations of all sync separator outputs.
TABLE 1. MODE DECODE
ENXTAL REG9
(BIT 6)
XTAL PIN 1
XTALN PIN 24
MODE CONTROL
REG1 (BIT 5:3)
SAMPLE CUT-OFF
REG2 (BIT 0)
1
X
X
Reg1 (5:3)
Reg2 (0)
0
0
0
000
0
Disabled, all signal types
allowed
0
0
1
011
0
Disabled, tri-level only
0
1
0
101
1
Disabled, bi-level only
0
1
1
111
1
Disabled, HIN only
2
DESCRIPTION
(CRYSTAL OSCILLATOR)
Enabled, normal operation
TB410
EL4511 Demo Board
S2
R12
VCC
10K
JP1
XTAL
RB
X1
10K
JP2
S3
32.768kHz 0
0
VBLANK
1 XTAL
XTALN 24
XTALN
SYNCLOCK
2 V_BLANK
ODD/ 23
EVEN
ODD/EVEN
3 SYNC_
LOCK
VOUT 22
VOUT
4 PDWN
HOUT 21
HOUT
CHIPEN
R11
VCC
S1
10kΩ
5 SDENB
BACK_ 20
PORCH
BACKPORCH
SCL
6 SCL
SYNC_ 19
OUT
SYNCOUT
SDA
7 SDA
VCCD 18
SDENB
HIN
8 GNDD1
GNDD2 17
9 HIN
GNDA2 16
R10
75Ω
RF C3
SYNCIN
R8
75Ω
0.1µF
10 SYNC_IN VCCA2 15
0
CF, OPEN
VCCA1 14
11 VIN
12 LEVEL
VIN
GNDA1 13
C1
C2
0.1µF
0.1µF
+
VCC
C6
4.7µF
R9
75Ω
EL4511
LEVEL
DRIVER SECTION
12
PARALLEL
PORT
1 A1
B1 20
2 A2
B2 19
3 A3
B3 18
4 A4
B4 17
5 GND
VCC 16
6 GND
VCC 15
C5
4.7µF
C4
0.1µF
PC_VCC
4
3
2
7 A5
B5 14
8 A6
B6 13
9 A7
B7 12
10 DIR
HD 11
SN74ACT1284
R4
0Ω
3
R5
1kΩ
R7
1kΩ
R6
1kΩ
R1
10kΩ
R2
10kΩ
R3
10kΩ
SDA
SCL
SDENB
VCC
R14
0Ω
TB410
FIGURE 1. WINDOWS CONTROL PANEL
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