an1252

ISL59446EVAL1 Evaluation Board User’s Guide
®
Application Note
May 8, 2005
AN1252.0
Introduction
High Frequency Layout Considerations
The ISL59446EVAL1 evaluation board contains all the
circuitry needed to characterize critical performance
parameters of the ISL59446 500MHz triple 4:1
MUX-amplifiers over a variety of applications.
At frequencies of 500MHz and higher, circuit board layout
may limit performance. The following layout guidelines are
implemented on the evaluation board:
The ISL59446 contains 3 separate 4:1 high impedance input
multiplexers, each followed by a non-inverting output
current-feed amplifier set to a fixed gain of 2. A common set
of logic inputs is provided (Figure 1, Table 1). Control
features include a high speed (20ns) HIZ output control for
individual selection of MUX amps that share a common
video output line. The ENABLE control can be used to save
power by powering the device down.
The evaluation board circuit and layout is optimized for
either 50Ω or 75Ω terminations, and implements a basic
R-G-B video 4 input MUX-amp. The board is supplied with
75Ω input signal terminations and a 75Ω back-termination
resistor on each of the 3 outputs. The internally set gain of 2
compensates for the output termination gain reduction when
terminated into a 75Ω load. The user has the option of
replacing the 75Ω resistors with 50Ω resistors for other
applications. The control lines contain 50Ω resistors to
match the 50Ω output impedance of high speed pulse
generators. Control line termination resistors are
recommended for rise and fall times under 10ns to minimize
unwanted transients. If DC is used for the control logic, the
resistors may be removed; or the applied DC voltage can
reduced to 2.5V to reduce the dissipation in the termination
resistor.
The layout contains component options to include an output
series resistor (RS) followed by a parallel resistor (RL)
capacitor (CL) network to ground. This option allows the user
to select several different output configurations. Examples
are shown in Figures 2A, 2B, and 2C. The evaluation board
is supplied with the 75Ω back termination resistors shown in
Figure 2C.
Amplifier Performance and Output Configurations
The EL4342 output amplifiers are designed for maximum
gain-bandwidth performance when loaded with ~500Ω (RL)
in parallel with ~5pF (CL) to ground, directly at the output pin
(Figure 2A). They are ideally suited for driving high
impedance high speed selectable-gain buffers when gain
compensation is needed. In these applications, output trace
capacitance to 5pF actually optimizes AC performance. For
trace capacitance below 5pF, an additional capacitor
between the output pin to ground may be added to achieve
the 5pF optimum. GBW decreases slightly at the lower
output load impedances typical of back-terminated cable
driving applications. Additional performance data can be
found in the data sheet references.
1
• Signal I/O lines are the same lengths and widths to match
propagation delay and trace parasitics.
• No series connected vias are used in signal I/O lines, as
they can add unwanted inductance.
• Signal trace lengths are minimized to reduce transmission
line effects and the need for strip-line tuning of the signal
traces.
• High frequency decoupling caps are placed as close to the
device power supply pin as possible - without series vias
between the capacitor and the device pin.
Power Sequencing
Proper power supply sequencing is -V first, then +V. In
addition, the +V and -V supply pin voltage rate-of-rise must
be limited to ±1V/µs or less. The evaluation board contains
parallel-connected low Von Schottky diodes on each supply
terminal to minimize the risk of latch up due to incorrect
sequencing. In addition, extra 10µF decoupling capacitors
are added to each supply to aid in reducing the applied
voltage rate-of-rise.
Reference Documents
1. ISL59446 Data Sheet, FN6261
EN0
S0
EN1
S1
IN0(A, B, C)
IN1(A, B, C)
DECODE
EN2
+
OUT
IN2(A, B, C)
IN3(A, B, C)
EN3
AMPLIFIER BIAS
HIZ
ENABLE
FIGURE 1. ISL59446 FUNCTIONAL BLOCK DIAGRAM
(1 OF 3 CHANNELS)
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Application Note 1252
TABLE 1. LOGIC TABLE
S0
S1
HIZ
ENABLE
OUTA, B, C
0
0
0
0
IN0A, B, C
1
0
0
0
IN1A, B, C
0
1
0
0
IN2A, B, C
1
1
0
0
IN3A, B, C
-
-
1
0
HIZ
-
-
-
1
Power-Down
RS
x2
50Ω
475Ω
*CL
0.6pF
56.2Ω
RS, 0Ω
*Cb1
~0.6pF
50Ω
or
75Ω
*Cb2
~3pF
CL
RL
500Ω 1.5pF
* Cb1, Cb2 are approximate PCB trace capacitances
FIGURE 2A. TEST CIRCUIT FOR INTER-STAGE APPLICATION
WITH OPTIMAL OUTPUT LOAD
ISL59446
TEST
EQUIPMENT
ISL59446
VIN
ISL59446
VIN
VIN
50Ω
or
75Ω
50Ω
*CL Includes PCB trace capacitance
x2
RS
50Ω or 75Ω
*CL
0.6pF
TEST
EQUIPMENT
50Ω or 75Ω
*CL is approximate PCB trace capacitance
FIGURE 2B. TEST CIRCUIT FOR 500Ω LOAD USING 50Ω
TERMINATIONS
FIGURE 2C. BACK-TERMINATED TEST CIRCUIT FOR CABLE
APPLICATION
ISL59446EVAL1
TOP VIEW
ISL59446
ISL59446EVAL1
2
AN1252.0
May 8, 2005
Application Note 1252
IN1A
1 IN1A
R2-75Ω
IN1B
ISL59446
GNDA 32
2 NIC
3 IN1B
R10-75Ω
IN1C
R11-75Ω
IN2A
R1-75Ω
IN2B
IN2C
R4-75Ω
IN3A
NIC 30
4 NIC
IN0B 29
5 IN1C
NIC 28
6 GNDB
HIZ 26
8 GND
EN 25
NIC 24
R9-75Ω
IN0B
R8-75Ω
JHIZ
IN0C
R7-75Ω
HIZ
R12 - 49.9Ω
ENBAR
R14 - 49.90Ω
JENBAR
10 IN2C
11 GDNC
V+ 23
RSA - 75Ω
OUTA 22
12 IN3A
R5-75Ω
IN0A
IN0C 27
7 IN2A
9 IN2B
R3-75Ω
IN0A 31
OUTA
C11
R22
V- 21
RSB - 75Ω
13 NIC
OUTB 20
OUTB
RSC - 75Ω
14 IN3B
IN3B
R6-75Ω
15 NIC
OUTC 19
S0 R20
S0 18
S1
IN3C
16 IN3C
S1 17
R18
49.9Ω
R13-75Ω
D1
C3
10µF
C2
C1
0.1µF 10nF
C7
1nF
C10
OUTC
R21
R19
49.9Ω JSO
JSO
+
C5
C4
C8
C6
10µF 0.1µF 10nF 1nF
D2
GND V-
C9
V+
FIGURE 3. ISL59446EVAL1 SCHEMATIC DIAGRAM
TABLE 2. COMPONENTS PARTS LIST
DEVICE #
DESCRIPTION
COMMENTS
C7, C8
Cap, SMD, 0603, 1000pF, 25V, 10%, X7R
Power Supply Decoupling
C1, C4
Cap, SMD, 0603, 0.01µF, 25V, 10%, X7R
Power Supply Decoupling
C2, C5
Cap, SMD, 0603, 0.1µF, 25V, 10%, X7R
Power Supply Decoupling
C3, C6
Cap, SMD, 0805, 10µF, 6.3V, 10%, X5R
Power Supply Decoupling
D1, D2
Diode-Schottky, 2 Pin, 45V, 7.5A
MBR0550T (Motorola) reverse polarity protection
R1-R11, R13, RSA, RSB, RSC Resistor, SMD, 0603, 75Ω, 1/10W, 1%
R12, R14, R18, R19
C9, C10, C11
R20, R21, R22
U1
Signal input/output termination
Resistor, SMD, 0603, 49.9Ω, 1/16W, 1%
Logic input termination
Capacitor, SMD, 0603
Optional, not populated
Resistor, SMD, 0603
Optional, not populated
ISL59446IR -500MHz Multiplexing Amplifier, 32P, QFN
Device under test
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to
verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
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AN1252.0
May 8, 2005
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