LSIs for Video Camera MN673273 Signal-Processing LSI for Multimedia Camera ■ Overview The MN673273 is a signal processing LSI for digital cameras inputting to computer. In addition to the basic functions of luminance signal and chrominance signal processing, the MN673273 integrates microcontroller functions (ALC, AWB, and AGC), SSG, and CG on a single chip. ■ Features • Input: Analog signal (A/D converter input) • Outputs: Digital outputs 8-bit Y signal 8-bit C signal Analog outputs Y signal C signal • Operating supply voltage: 3.3 V ±0.3 V • Operating clock frequency: 9.5 to 20 MHz • Main functions — 10-bit A/D converter — Two-channel 8-bit D/A converter — Analog Y and C outputs — Digital Y and C outputs — ALC (supports both electronic and mechanical iris), AWB, AGC. Can be used with either a hardware control system or a microcontroller based control system. — 50 Hz fluorescent lamp flicker correction — Supports analog AGC (AN2108) — On-chip CG and SSG — Supports both 510 and 360 horizontal lines (However, 360 horizontal line output is only provided for the digital outputs.) — Supports pseudo-VGA (digital rate conversion) — Supports both NTSC and PAL ■ Applications • PC cameras, multimedia cameras 1 VIN 2 CG/SSG circuit Microcontroller interface 10 bit A/D AGC 1H DLY Low-pass filter line switching Y LPF Y LPF ALC control calculation Center-weighted screen averaging brightness data calculation Full-screen average white balance data calculation (high and low brightness sections are excluded.) Horizontal and vertical aperture processing Flicker gain calculation White balance gain calculation White balance gain control Color suppression calculation Color difference matrix Flicker correction Flicker correction Encoder high-brightness area color suppression High-brightness data detection Gamma correction Digital rate conversion 8 bit D/A UVSEL COUTD (7 : 0) YOUTD (7 : 0) YOUT COUT MN673273 LSIs for Video CameraI ■ Block Diagram LSIs for Video Camera MN673273 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 YOUTD7 YOUTD6 YOUTD5 YOUTD4 YOUTD3 YOUTD2 YOUTD1 YOUTD0 VSS3 VDD3 BLCSW CSYNC COUTD7 COUTD6 COUTD5 COUTD4 COUTD3 COUTD2 COUTD1 COUTD0 ■ Pin Arrangement 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 FCK43 FCKO CH1 CH2 SUB V1 V2 V3 V4 VSS2 VDD2 OSCO OSCI DS1 DS2 VSSTG VDDTG R H1 H2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 TEST1 TEST2 TEST3 TEST4 TEST5 HSSFIX CLKRST VDD1 VSS1 MS CS DI DO SCLK LOAD ADTOPADJ CPOB VD HD HCLR UVSEL RESET YCLEVEL MINTEST TESTSCAN VREF IREF COMP COUT DAAVDD2 DAAVSS2 YOUT VRT VREFHM VREFM ADVDD1 ADVSS1 VREFML VRB VIN (TOP VIEW) 3 MN673273 LSIs for Video CameraI ■ Pin Descriptions Pin No. Pin Name I/O 1 TEST1 I Test pin (Must be hold low during normal operation.) 2 TEST2 I Test pin (Must be hold low during normal operation.) 3 TEST3 I Test pin (Must be hold low during normal operation.) 4 TEST4 I Test pin (Must be hold low during normal operation.) 5 TEST5 I Test pin (Must be hold low during normal operation.) 6 HSSFIX I Shutter lock (1: On, 0: Off)/Flicker correction (1: Off, 0: On)/ External synchronization input 7 CLKRST I Clock reset 8 VDD1 VDD Digital system power supply (3.3 V) 9 VSS1 VSS Digital system ground 10 MS I Master/slave switching 11 CS I/O FCK EPROM chip select 12 DI I/O FCK Serial data input and output 13 DO I 14 SCLK I/O FCK Serial clock input and output 15 LOAD O FCK Load pulse for AN2108/Analog AGC control signal (PWM) 16 ADTOPADJ O FCK A/D converter input clamp voltage adjustment (PWM) 17 CPOB O FCK A/D converter input clamp pulse or D/A converter output clamp pulse (CP2) 18 VD O FCK, 4/3FCK Vertical drive signal/External synchronization VP 19 HD O FCK, 4/3FCK Horizontal drive signal 20 HCLR O FCK, 4/3FCK Horizontal reference signal/External synchronization output 21 H2 O φH2 transfer pulse 22 HI O φH1 transfer pulse 23 R O φR pulse 24 VDDTG VDD φH power supply (3.3 V) 25 VSSTG VSS φH ground 26 DS2 O CDS pulse 2 27 DS1 O CDS pulse 1 28 OSCI I Oscillator input (2FCK) 29 OSCO O Oscillator output (2FCK) 30 VDD2 VDD Digital system power supply (3.3 V) 31 VSS2 VSS Digital system ground 32 V4 O FCK φV4 charge pulse 33 V3 O FCK φV3 charge pulse 34 V2 O FCK φV2 charge pulse 35 V1 O FCK φV1 charge pulse 36 SUB O FCK Vertical exclusion pulse 4 CLOCK Function Serial data input LSIs for Video Camera MN673273 ■ Pin Descriptions (continued) Pin No. Pin Name I/O CLOCK Function 37 CH2 O FCK V3 charge pulse 38 CH1 O FCK V1 charge pulse 39 FCKO O FCK output 40 FCK43 O 4/3 FCK output 41 COUTD0 O FCK, 4/3FCK Digital chrominance-signal output (LSB) 42 COUTD1 O FCK, 4/3FCK Digital chrominance-signal output 43 COUTD2 O FCK, 4/3FCK Digital chrominance-signal output 44 COUTD3 O FCK, 4/3FCK Digital chrominance-signal output 45 COUTD4 O FCK, 4/3FCK Digital chrominance-signal output 46 COUTD5 O FCK, 4/3FCK Digital chrominance-signal output 47 COUTD6 O FCK, 4/3FCK Digital chrominance-signal output 48 COUTD7 O FCK, 4/3FCK Digital chrominance-signal output (MSB) 49 CSYNC O FCK, 4/3FCK Composite sync output 50 BLCSW I FCK, 4/3FCK Backlighting correction switching (1: On, 0: Off) 51 VDD3 VDD Digital system power supply (3.3 V) 52 VSS3 VSS Digital system ground 53 YOUTD0 O FCK, 4/3FCK Digital luminance-signal output (LSB) 54 YOUTD1 O FCK, 4/3FCK Digital luminance-signal output 55 YOUTD2 O FCK, 4/3FCK Digital luminance-signal output 56 YOUTD3 O FCK, 4/3FCK Digital luminance-signal output 57 YOUTD4 O FCK, 4/3FCK Digital luminance-signal output 58 YOUTD5 O FCK, 4/3FCK Digital luminance-signal output 59 YOUTD6 O FCK, 4/3FCK Digital luminance-signal output 60 YOUTD7 O FCK, 4/3FCK Digital luminance-signal output (MSB) 61 UVSEL O FCK, 4/3FCK Color difference discrimination signal (High: R-Y, Low: B-Y) 62 RESET I FCK Power on reset 63 YCLEVEL O FCK D/A converter reference adjustment voltage 64 MINTEST I Test pin (Must be hold low during normal operation.) 65 TESTSCAN I Test pin (Must be hold low during normal operation.) 66 VREF I D/A converter reference voltage input 67 IREF I D/A converter bias current setting 68 COMP I D/A converter phase compensation capacitor connection 69 COUT O Clock signal output 70 DAAVDD2 AVDD D/A converter power supply 71 DAAVSS2 AVSS D/A converter ground 72 YOUT O Luminance signal output 73 VRT I A/D converter high-level reference voltage input 5 MN673273 LSIs for Video CameraI ■ Pin Descriptions (continued) Pin No. Pin Name I/O CLOCK Function 74 VREFHM I A/D converter intermediate reference voltage 75 VREFM I A/D converter intermediate reference voltage 76 ADVDD1 AVDD A/D converter power supply 77 ADVSS1 AVSS A/D converter ground 78 VREFML I A/D converter intermediate reference voltage 79 VRB I A/D converter low-level reference voltage input 80 VIN I A/D converter input signal ■ Shared Function Pins Pin No. Pin Name I/O Function Switch settings 6 HSSFIX I HSSFIX: Electronic shutter speed lock (1: On, 0: Off) WE34 upper (1) = 0 and WE04 upper (2) =0 FLICOFF: Flicker correction (1: Off, 0: On) WE34 upper (1) = 0 and WE04 upper (2) =1 VRSTI: External synchronization vertical reset pulse WE34 upper (1) = 1 LOAD: AN2108 load pulse WE3D upper (3) = 0 15 LOAD O 17 CPOB O ANAGC: Analog AGC control signal WE3D upper (3) = 1 CPOB: A/D converter input signal clamp pulse WE3C upper (3) = 0 CP2: D/A converter output clamp pulse WE3C upper (3) = 1 18 20 6 VD HCLR O O VD: Vertical drive signal WE34 upper (1) = 0 and WE11 upper (6) =0 VP: External synchronization VP signal WE34 upper (1) = 0 and WE11 upper (6) =0 HCLR: Horizontal reference signal WE34 upper (1) = 0 VRSTM: External synchronization vertical reset mask signal WE34 upper (1) = 0 and WE34 upper (6) =0 LSIs for Video Camera MN673273 ■ Electrical Characteristics 1. Absoluste Maximum Ratings Parameter Symbol Rating Unit Supply voltage(digital) VDD − 0.3 to +4.6 V Supply voltage(analog) AVDD − 0.3 to +4.6 V Input voltage VI − 0.3 to VDD+0.3 V Output voltage VO − 0.3 to VDD+0.3 V ±3 Average output 1 mA cell IO voltages 2 mA cell ±6 4 mA cell ±12 16 mA cell ±48 mA Operating temperature Topr −20 to +85 °C Storage temperature Tstg −55 to +150 °C Notes: 1. The absolute maximum ratings are limiting values under which the chip will not be destroyed. Operation is not guaranteed within these ranges. 2. The VDD1, VDD2, VDD3, VDDTG, ADVDD1, and DAAVDD2 pins must always be held at the same voltage. The VSS1, VSS2, VSS3, VSSTG, ADVSS1, and DAAVSS2 pins must always be held at the same voltage. 2. Operating Conditions VSS = AVSS = 0 V Parameter Symbol Conditions Min Typ Max Unit Supply voltage(digital) VDD Digital system power supply 3.0 3.3 3.6 V Supply voltage(analog) AVDD A/D and D/A converter power supply 3.0 3.3 3.6 V Supply voltage(R, H1, H2) VDDH Drive power supply for the R, H1, 3.0 3.3 3.6 V 9.5 20.0 MHz and H2 output pins Operating frequency fCLK duty 50 % 3. DC Characteristics VDDH = 3.0 V to 3.6 V, VDD = AVDD = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = −20 °C to +85 °C Parameter Operating supply current Symbol Conditions Min Typ Max Unit IDD VDD = AVDD = VDDH = 3.6 V, fCLK = 20.0 MHz, Ta = 25 °C 100 180 mA V Input pins1-1 TEST5, CLKRST, BLCSW, RESET, MINTEST, TESTSCAN Input voltage High-level VIH VDD × 0.8 VDD Low-level VIL 0 VDD × 0.2 −5 5 µA V Input leakage current ILI VI = VDD or VSS Input pins1-2 Pull-down Input pins TEST1 to TEST4, HSSFIX, MS, DO Input voltage High-level VIH VDD × 0.8 VDD Low-level VIL 0 VDD × 0.2 Input leakage current ILIPD VI = VSS −10 10 µA Pull-down resistor RPD VI = VDD 10 30 90 kΩ 7 MN673273 LSIs for Video CameraI ■ Electrical Characteristics (continued) 3. DC Characteristics (continued) at VDDH = 3.0 V to 3.6 V, VDD = AVDD = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = −20 °C to +85 °C Parameter Symbol Conditions Min Typ Max Unit Output pins1-1 LOAD, ADTOPADJ, CPOB, HCLR, YOUTD0 to YOUTD7, UVSEL, YCLEVEL Output voltage High-level VOH IO = −1 mA VDD − 0.6 Low-level VOL IO = 1 mA 0.4 V Output pins1-2 V4 to V1, SUB, CH2, CH1, COUTD0 to COUTD7, CSYNC Output voltage High-level VOH IO = −2 mA VDD − 0.6 Low-level VOL IO = 2 mA 0.4 V Output pins1-3 VD, HD, DS2, DS1, FCKO, FCK43 Output voltage High-level VOH IO = −4 mA VDD − 0.6 Low-level VOL IO = 4 mA 0.4 High-level VOH IO = −16 mA VDD − 0.6 Low-level VOL IO = 16 mA 0.4 V Output pins1-4 H2, H1, R Output voltage V I/O pins 1: CS, DI, and SCLK Input/Output High-level VIH VDD × 0.8 VDD voltage Low-level VIL 0 VDD × 0.2 Output voltage High-level VOH IO = −4 mA VDD − 0.6 Low-level VOL IO = 4 mA 0.4 ILO VO = VDD or VSS −5 5 µA Standard oscillator frequency fOSC VDD = 3.3 V, Xtal 9.5 20.0 MHz Internal feedback resistors RFB VDD = 3.3 V VI(XI) = VDD or VSS 313 940 2820 kΩ Output voltage High-level IOH VDD = 3.3 V VI = VSS, VO = VSS −11.5 −4.6 −1.84 mA Low-level IOL VDD = 3.3 V VI = VDD, VO = VDD 1.92 4.8 12 Output leakage current V V Oscillator pins 1: OSCI and OSCO 8 LSIs for Video Camera MN673273 ■ Electrical Characteristics (continued) 4. AC Characteristics Parameter Symbol Conditions Min Typ Max Unit 50.0 105.3 ns Input pins2-1 OSCI Clock waveform Period tcyc See figure 1 Clock duty dclk See figure 1 dclk = thi/tcyc 48 50 52 % ns Input pins2-2 HSSFIX, MS, DO, BLCSW Input timing Setup tsu See figure 1 10 Hold thd See figure 1 15 Output pins2 LOAD, ADTOPADJ, CPOB, VD, HD, HCLR, H2, H1, R, DS2, DS1, V4 to V1, SUB, CH2, CH1, FCKO, FCK43, COUTD0 to COUTD7, CSYNC, YOUTD0 to YOUTD7, UVSEL, and YCLEVEL Output timing Delay tod Load: 60 pF, output level: 50% See figure 1 45 ns Min Typ Max Unit 5. A/D converter at VDD = AVDD = 3.3 V, VSS = AVSS = 0 V, Ta = +25 °C Parameter Symbol Conditions Recommended A/D converter operating conditions VIN, VRT, VRB Analog input voltage VAIN VIN VRB VRT V Analog input pin capacitance CAI VIN 15 pF High-level reference voltage VRT VRT 2.5 V Low-level reference voltage VRB VRB 0.5 V Reference resistance (VRB−VRT) RREF 440 Ω Resolution RES 10 Bit Nonlinearity error EL fCLK = 9.5 MHz, VRT = 2.5 V ±5.0 ±7.5 LSB Differential nonlinearity error ED VRB = 0.5 V, CVREFM = CVREFHM = CVREFML = 10 µF ±2.0 ±6.5 Analog input dynamic range DR A/D Converter Characteristics VRT− V[P-P] VRB 9 MN673273 LSIs for Video CameraI ■ Electrical Characteristics (continued) 6. Converter at VDD = AVDD = 3.3 V, VSS = AVSS = 0 V, Ta = +25 °C Parameter Symbol Conditions Min Typ Max Unit 1.38 V Inserted between the COMP pin and AVDD 1.0 µF RL Inserted between AVSS and the YOUT and COUT pins, respectively 200 Ω RIREF Inserted between the IREF pin and AVSS 2.2 kΩ 8 Bit LSB Recommended D/A converter operating conditions VREF, IREF, COMP, YOUT, COUT Reference voltage VREF External phase compensation capacitor CCOMP External output resistor External bias current setting resistor D/A Converter Characteristics Resolution RES Nonlinearity error EL fCLK = 20.0 MHz, VDD = 3.3 V ±2.0 ED RL = 200 Ω, RIREF = 2.2 kΩ, VREF = 1.38 V, CCOMP = 1.0 µF ±2.0 Differential nonlinearity error Full-scale voltage VOFS 1.0 V Zero-scale voltage VOZS 0 V tcyc thi Clock CLK Vclk Vclk/2 tsu thd VDD /2 Input tod VDD /2 Output Figure 1. Input and Output Timing 10 UVSEL COUTD YOUTD CPOB 6T −7T −1T −16 −8 −6 −4 −2 −17 −7 −5 −3 −1 0 1 2 3 4 5 6 7 −17T CCD output* HCLR HD 171819 42 43 44 43T 59 60 61 60T 63 64 65 66 67 68 69 70 71 72 CG YM CG YM CG 2 3 4 OB OB 0 1 R-Y B-Y R-Y B-Y 0 0 2 2 127T Y0 Y1 Y2 Y3 Y4 127T 127 • Input and Output Timing Note) *: This signal is not output from the LSI MN673273. 62 DDDD LSIs for Video Camera MN673273 ■ Timing Charts 11 MN673273 LSIs for Video CameraI ■ Package Dimensions (Units: mm) • QFH080-P-1212 14.0±0.2 12.0±0.2 60 41 40 21 0.1 12 Seating plane 1.0±0.2 +0.10 5 0.15 –0.0 20 0.2±0.1 2.9±0.3 0.5 2.8±0.2 1 0.1±0.1 80 14.0±0.2 12.0±0.2 (1.25) 61 0° to 10° 0.5±0.2 Request for your special attention and precautions in using the technical information and semiconductors described in this material (1) An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. 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Panasonic is endeavoring to continually improve the quality and reliability of these materials but there is always the possibility that further rectifications will be required in the future. Therefore, Panasonic will not assume any liability for any damages arising from any errors etc. that may appear in this material. C. These materials are solely intended for a customer's individual use. Therefore, without the prior written approval of Panasonic, any other use such as reproducing, selling, or distributing this material to a third party, via the Internet or in any other way, is prohibited. 2001 MAR