PANASONIC AN8771NFH

ICs for MD System
AN8771NFH
Pre-amplifier IC for MD
■ Overview
Unit: mm
The AN8771NFH is an MD pre-amplifier IC of wide
range of supply voltage (VCC = 2.7 V to 5.5 V). This IC
can form an MD system using 3-beam pick-up in combination with the MN66614 digital signal processing LSI.
12.00±0.20
10.00±0.20
48
33
32
(1.25)
10.00±0.20
12.00±0.20
49
■ Features
64
■ Applications
1
16
0.50
+0.1
0.18–0.05
+0.10
0.10±0.10
(1.25)
17
0.15–0.05
1.95±0.20
• Applicable for 3-beam pick-up
• RF signal processing
• Error signal generating function for servo
• Various status detection function
• Laser power control circuit
Seating plane
• MD
(1.00)
0° to 10°
0.50±0.20
QFP064-P-1010
Note) The package of this product will be changed
to lead-free type (QFP064-P-1010A). See the
new package dimensions section later of this
datasheet.
Publication date: February 2002
SDD00018CEB
1
AN8771NFH
33
34
35
36
VCC2
37
38
39
40
41
42
43
44
45
46
47
48
GND2
■ Block Diagram
49
32
EQ
DSL
Mode control
31
50
51
RF amp.
Pin 20
3TENV
Pin 21
AGC
30
OFT amp.
52
28
IV
ASOF set
54
VCA
27
IV
55
VREF
Pin 18
VREF
IV
BPF
56
RFBDO
VCA
OFTR
IV
VREF
57
IV
58
GND1
29
NRF det.
53
IV
IV
FBAL
/FOF set
59
ASBDO
VCA
25
23
22
IV
VREF
60
IV
61
26
24
VREF
IV
IV
VCC3
VCC1
TBAL
/TOFSET
IV
GND4
21
20
VCA
62
19
Mirror
63 circuit
VREF
18
17
64
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
GND3
1
TRCRS
■ Pin Descriptions
Pin No.
Symbol
1
REFO
2
Description
Pin No.
Symbol
APC reference voltage buffer
9
TE
output pin
10
N.C.
APC circuit GND pin
11
CCRS
Description
Tracking error signal output pin
2
GND3
3
APCREF
APC reference voltage input pin
4
TEMPIN+
Temperature sensor amp. + input pin
12
TRCRS
5
TEMPIN−
Temperature sensor amp. − input pin
13
FBAL
Focus balance adjustment pin
6
TEMP
Temperature sensor amp. output pin
14
FE
Focus error signal output pin
7
TOFS
Tracking offset adjustment pin
15
TGAIN
TE amp. gain adjustment pin
8
TBAL
Tracking balance adjustment pin
16
FOFS
Focus offset adjustment pin
Capacitor connection pin for
track cross circuit
SDD00018CEB
Track cross output pin
AN8771NFH
■ Pin Descriptions (continued)
Pin No.
Symbol
17
AS
18
ASOFS
19
ASGAIN
Description
Pin No.
Symbol
Description
Main beam light quantity sum
38
PEFMS
Data slice output pin
signal output pin
39
GND2
Data slice circuit GND pin
AS offset adjustment pin
40
PEFM
Data slice level setting pin
Amp. gain adjustment pin for
41
EFMIND
Data slice signal input pin
main beam system
42
EFMINS
EFM detection input pin
20
MON3T
3T envelope detection output pin
43
OUTRF
EFM output pin
21
CEA
Capacitor connection pin for 3T
44
CRFAGC
RFAGC capacitor connection pin
envelope detection
45
EQADJ
EQ setting pin
22
GND4
GND for FE/TE system
46
EQIN
EQ input pin
23
BDO
AS drop-out detection signal
47
ARFO
RF amp. output pin
output pin
48
SVREF
Reference signal input pin
BDO detection capacitor
49
VREF
Reference signal output pin
connection pin
50
RF1
RF1 signal input pin
RF2 signal input pin
24
CBDOG
25
OFTR
Off-track signal output pin
51
RF2
26
CBDOP
RFBDO detection capacitor
52
SWMS
connection pin
53
B
Main beam B signal input pin
Pit RF amp. polarity setting pin
27
OFTIN
Off-track detection signal input pin
54
A
Main beam A signal input pin
28
OFTO
Off-track detection signal output pin
55
D
Main beam D signal input pin
29
ADIP
ADIP FM signal output pin
56
C
Main beam C signal input pin
30
GND1
GND pin
57
F
Side beam F signal input pin
31
NRFDET
RF detection signal output pin
58
E
Side beam E signal input pin
32
VCC1
VCC pin
59
VCC3
33
RFSWHL
Reflection factor changeover
60
LDON
signal input pin
34
35
RFSWPG
NREC
37
Pit/group changeover signal
61
LDO
input pin
62
APCPD+
LD amp. output pin
Photo diode light quantity
detection pin
Recording/playback change over
NRFSTBY Standby control signal input pin
VCC2
LD amp. on/off control signal
input pin
signal input pin
36
APC circuit VCC pin
63
APCPD−
PD polarity reversing current input pin
64
REFIN
APC amp. reference voltage input
pin
Data slice circuit VCC pin
SDD00018CEB
3
AN8771NFH
■ Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply voltage
VCC
6.0
V
Supply current
ICC
35
mA
Power dissipation *
PD
210
mW
Operating ambient temperature *
Topr
−30 to +85
°C
Storage temperature *
Tstg
−55 to +125
°C
Note) 1. Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25°C.
2. *: VCC1 , VCC2 , VCC3 are of same voltage.
■ Recommended Operating Range
Parameter
Supply voltage
Symbol
Range
Unit
VCC1
VCC2
VCC3
2.7 to 5.5
V
■ Electrical Characteristics at Ta = 25°C
Parameter
Conditions
Min
Typ
Max
Unit
No load current consumption 1
ITOTAL1
Normal mode
19.6
24.5
29.4
mA
No load current consumption 2
(Power saving mode)
ITOTAL2
Power saving mode
1.0
1.7
2.5
mA
VREF offset
∆VOVB
V48 = V32 / 2
−7
0
7
mV
VREF output impedance
ZVB
I49 = ±3 mA


5
Ω
LD amp. off operation
VLDOFF
LD amp. off mode


0.4
V
V62: 1 kHz sine wave (50 mV[p-p],
DC offset voltage = VREF − 25 mV)
18
20
22
dB
LD amp. gain
GLD
FE offset + adjustment
∆VOFO+
V16 = VREF − 0.5 V
V19 = VREF − 0.5 V
100


mV
FE offset − adjustment
∆VOFO−
V16 = VREF + 0.5 V
V19 = VREF − 0.5 V


−100
mV
FE gain 1
GFEA1
V54: 5 kHz sine wave (40 mV[p-p],
DC offset voltage = VREF − 25 mV)
V19 = VREF − 0.5 V
20
23
26
dB
FE relative gain 2
GFEA2
V54: 5 kHz sine wave (300 mV[p-p],
DC offset voltage = VREF − 160 mV)
V19 = VREF + 0.5 V


−18
dB
−6
−3
0
dB

−12
−9.6
dB
FE frequency characteristics A
FBAL adjustment range 12
4
Symbol
∆GFEACA V54: 50 kHz sine wave (300 mV[p-p],
DC offset voltage = VREF − 160 mV)
V19 = VREF − 0.5 V
∆GFB12
V13 = VREF ± 0.5 V
V19 = VREF + 0.5 V
SDD00018CEB
AN8771NFH
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
FBAL adjustment range 34
∆GFB34
V13 = VREF ± 0.5 V
V19 = VREF + 0.5 V
9.6
12

dB
TE offset + adjustment
∆VOTO+
V7 = VREF − 0.5 V
V15 = VREF − 0.5 V
Pit mode
100


mV
TE offset − adjustment
∆VOTO−
V7 = VREF + 0.5 V
V15 = VREF − 0.5 V
Pit mode


−100
mV
TE gain 1
GTEE1
V58: 5 kHz sine wave (4 mV[p-p],
DC offset voltage = VREF − 3 mV)
V15 = VREF − 0.5 V, Pit mode
37.5
42.5
47.5
dB
TE relative gain 2
GTEE2
V58: 5 kHz sine wave (40 mV[p-p],
DC offset voltage = VREF − 25 mV)
V15 = VREF + 0.5 V, Pit mode


−18
dB
∆GTEACE V58: 100 kHz sine wave (40 mV[p-p],
DC offset voltage = VREF − 25 mV)
V15 = VREF + 0.5 V, Pit mode
−6
−3
0
dB
TE frequency characteristics E
TBAL adjustment range 12
∆GTB12
V8 = VREF ± 0.5 V
V15 = VREF + 0.5 V, Pit mode

−3
−2.3
dB
TBAL adjustment range 34
∆GTB34
V8 = VREF ± 0.5 V
V15 = VREF + 0.5 V, Pit mode
2.3
3

dB
AS offset + adjustment
∆VOASO+ V18 = VREF − 0.5 V
V19 = VREF − 0.5 V
100


mV
AS offset − adjustment
∆VOASO− V18 = VREF + 0.5 V
V19 = VREF − 0.5 V


−100
mV
13.6
15.6
dB
AS gain 1
GAS1
V54: 5 kHz sine wave (50 mV[p-p],
10.6
DC offset voltage = VREF − 30 mV)
V19 = VREF − 0.5 V
AS relative gain 2
GAS2
V54: 5 kHz sine wave (300 mV[p-p],
DC offset voltage = VREF − 160 mV)
V19 = VREF + 0.5 V


−18
dB
AS OFTO amp. relative gain
∆GASOF
V54: 5 kHz sine wave (300 mV[p-p],
DC offset voltage = VREF − 160 mV)
V19 = VREF + 0.5 V, Group mode
5.8
6.8
7.8
dB
AS frequency characteristics
∆GASAC
V54: 50 kHz sine wave (300 mV[p-p],
DC offset voltage = VREF − 160 mV)
V19 = VREF + 0.5 V
−6
−3
0
dB
GAD1
V54: 21.6 kHz sine wave (12 mV[p-p],
DC offset voltage = VREF − 7 mV)
V19 = VREF − 0.5 V
31
37
40
dB
GADVCA2 V54: 21.6 kHz sine wave (150 mV[p-p],
DC offset voltage = VREF − 80 mV)
V19 = VREF + 0.5 V


−18
dB
ADIP gain 1
ADIP relative gain 2
SDD00018CEB
5
AN8771NFH
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
6
Symbol
Conditions
Min
Typ
Max
Unit
ADIP frequency characteristics 1
∆GADf1
V54: 18 kHz sine wave (150 mV[p-p],
DC offset voltage = VREF − 80 mV)
V19 = VREF + 0.5 V

−3
0
dB
ADIP frequency characteristics 2
∆GADf2
V54: 26 kHz sine wave (150 mV[p-p],
DC offset voltage = VREF − 80 mV)
V19 = VREF + 0.5 V

−3
0
dB
RF amp. gain in group mode
(playback)
GRFG
V54: 100 kHz sine wave (18 mV[p-p])
Group mode
18.8
20.8
22.8
dB
RF amp. gain in low reflection factor
(playback)
GRFPL
V54: 100 kHz sine wave (120 mV[p-p])
Pit low reflection factor mode
1.5
3.5
5.5
dB
RF amp. gain in high reflection factor
(playback)
GRFPH
V54: 100 kHz sine wave (300 mV[p-p])
Pit high reflection factor mode
−8
−6
−4
dB
RF amp. frequency characteristics
in group mode
(playback)
∆GRFG
V54: 4 MHz sine wave (18 mV[p-p])
Group mode
−3


dB
RF amp. frequency characteristics
in low reflection factor
(playback)
∆GRFPL
V54: 4 MHz sine wave (120 mV[p-p])
Pit low reflection factor mode
−3


dB
RF amp. frequency characteristics
in high reflection factor
(playback)
∆GRFPH
V54: 4 MHz sine wave (300 mV[p-p])
Pit high reflection factor mode
−3


dB
EQ gain adjustment 1
∆GEQ1
V54: 200 Hz, 720 kHz sine wave
(100 mV[p-p])
V45 = GND, V44 = VREF − 0.2 V

1.5
3.0
dB
EQ gain adjustment 2
∆GEQ2
V54: 200 Hz, 720 kHz sine wave
(100 mV[p-p])
V45 = 400 mV, V44 = VREF − 0.2 V
3.5
5.0

dB
AGC operation
VOMRFV
V46: 500 kHz sine wave (200 mV[p-p])
420
520
620
mV
DSL pulse output duty
TDSL
V41: 720 kHz sine wave (500 mV[p-p])
47
50
53
%
NRF detection operation
VRFD
V46: 500 kHz sine wave (Amplitude sweep)
58
83
108
mV
NRF detection high-level voltage
VRFDH
V46: 500 kHz sine wave (Amplitude sweep)
2.1

3.0
V
NRF detection low-level voltage
VRFDL
V46 : 500 kHz sine wave (Amplitude sweep)
0

0.4
V
TRCRS detection voltage 1
VH1TCR
V7: Sweep + 0 to max. +150 mV
in DC refering to V6 as reference
63
90
120
mV
TRCRS detection voltage 2
VH2TCR
V7: Sweep + 0 to max. −150 mV
in DC refering to V6 as reference
−120
−90
−63
mV
TRCRS high-level voltage
VTCRH
V7 = V6 + 100 mV
2.1

3.0
V
TRCRS low-level voltage
VTCRL
V7 = V6 − 100 mV
0

0.4
V
ASBDO detection current 1
ICBDO1
Apply to the pin 24 DC voltage which
is 200 mV higher than that at open
0.7
1.0
1.5
µA
ASBDO detection current 2
ICBDO2
Apply to the pin 24 DC voltage which
is 1.1 V higher than that at open
17
26
39
µA
SDD00018CEB
AN8771NFH
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
BDO high-level voltage
VBDOH
V17 < VREF + 50 mV
BDO low-level voltage
VBDOL
V54: Apply voltage so as to get
V17 = VREF + 200 mV
Min
Typ
Max
Unit
2.1

3.0
V
0

0.4
V
RFBDO detection current 1
ICRFBDO1 V26: Apply voltage 100 mV higher
than that of at open
0.33
0.50
0.75
µA
RFBDO detection current 2
ICRFBDO2 V26 = VREF + 0.3 V
6.7
10
15
µA
15
30
60
µs
18.5
21.5
dB
RFBDO detection operation
V46: 500 kHz sine wave
(200 mV[p-p] → 0 mV[p-p])
V26: Fix to DC voltage at which
200 mV[p-p] is inputted to V46
tRFB
3T component envelope
extracting gain
G3TMON
V41: 720 kHz AM sine wave modulation 15.5
(500 mV[p-p])
AM sine wave: 5.3 kHz 20%
OFTO
EFM detection gain
GEFMOF
V41: 720 kHz AM sine wave modulation
(500 mV[p-p])
AM modulation: 5.3 kHz 20%
EFM detection output mode
−6
−3
0
dB
OFTIN detection level
∆VOFTI
V27: Sweep VREF − 100 mV to
VREF + 100 mV in DC
35
50
65
mV
OFTR high-level voltage
VOFTH
V27 = VREF − 100 mV
2.1

3.0
V
OFTR low-level voltage
VOFTL
V27 = VREF + 100 mV
0

0.4
V
V5 = VREF ± 0.5 V
−2
0
2
dB
V3: 20 kHz sine wave (0.5 V[p-p])
−2
0
2
dB
TEMP amp. gain
GTM
REFO gain
GREFO
■ Technical Data
1. Operation mode set by mode setting
<RF amp. gain> <IV amp.>
Setting pin
Operation mode
NREC
RFSWPG
RFSWHL
Pit high reflection factor mode
Pit mode
High-level
High-level
High-level
Pit low reflection factor mode
MO pit playback mode
High-level
High-level
Low-level
Group mode
MO group playback mode
High-level
Low-level
Low-level
Operation off mode
MO recording mode
Low-level


<OFTO output signal>
Setting pin
Operation mode
RFSWPG
EFM detection output mode
High-level
AS output mode
Low-level
SDD00018CEB
7
AN8771NFH
■ Technical Data (continued)
1. Operation mode set by mode setting (continued)
<TE polarity changeover>
Setting pin
Operation mode
RFSWPG
Pit mode
High-level
Group mode
Low-level
<LD amp. operation>
Setting pin
Operation mode
LDON
Operation on mode
High-level
Operation off mode
Low-level
<Total operation>
Setting pin
Operation mode
NREC
Normal mode
High-level
Power saving mode
Low-level
2. Voltage to be applied to setting pin
Setting
Pin name
Lower limit
Upper limit
Condition
VCC1 − 0.5 V
VCC1
SVREF = VCC1 / 2
RFSWHL
RFSWPG
High-level
NREC

NRFSTBY
LDON
VCC3 − 0.5 V
VCC3
RFSWHL
SVREF = VCC1 / 2
RFSWPG
Low-level
NREC
0V
0.5 V

NRFSTBY
LDON
3. For SWMS (pin 52) setting
In the pit high reflection factor mode and low reflection factor mode, the polarity of ARFO (pin 47) through RF1
(pin 50)·RF2 (pin 51) is shown below by setting of SWMS:
8
SWMS
Polarity
High-level
Reverse
Low-level
Normal
SDD00018CEB
AN8771NFH
■ Technical Data (continued)
4. Internal circuit of APCPD− (pin 63)
REFIN 64
APCPD+ 62
61 LDO
VCC3
APCPD− 63
A current mirror circuit of which primary side is APCPD− is built-in. In case where output of secondary side is
connected to APCPD+ and PD current for laser monitor is sunk to PD, the direction of current can be reversed by
connecting the PD output to APCPD− .
Mirror ratio is 1 to 1 as the hFE = ∞
When using no current mirror, connect APCPD− to VCC3 .
■ Application Circuit Example
Microcomputer
PD
PD
Head
amp.
Optical pick-up
PD
PD
PD
PD
PD
VCC3
PD
33
34
35
36
37
38
39
40
41
42
43
44
45
46
48
VREF
47
VCC2
PWM signal
49
32
50
31
51
30
52
29
53
28
54
27
55
26
56
25
57
24
58
23
59
22
60
21
61
20
62
19
63
18
64
17
VCC1
16
15
14
13
12
9
8
7
6
5
4
3
2
1
VREF
11
Laser
diode
10
PD
VREF
Laser drive reference voltage
Temperature sensor
SDD00018CEB
Survo-LSI
9
AN8771NFH
■ New Package Dimensions (Unit: mm)
• QFP064-P-1010A (Lead-free package)
12.00±0.20
10.00±0.20
48
33
1
16
0.18±0.05
0.50
0.10
Seating plane
0.15±0.05
(1.00)
0° to 10°
0.50±0.20
10
SDD00018CEB
0.10 M
1.95±0.20
17
0.10±0.10
(1.25)
12.00±0.20
(1.25)
64
10.00±0.20
32
49
Request for your special attention and precautions in using the technical information
and semiconductors described in this material
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"Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan.
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Consult our sales staff in advance for information on the following applications:
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(4) The products and product specifications described in this material are subject to change without
notice for reasons of modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to
make sure that the latest specifications satisfy your requirements.
(5) When designing your equipment, comply with the guaranteed values, in particular those of maximum rating, the range of operating power supply voltage and heat radiation characteristics. Otherwise, we will not be liable for any defect which may arise later in your equipment.
Even when the products are used within the guaranteed values, redundant design is recommended,
so that such equipment may not violate relevant laws or regulations because of the function of our
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Due to modification or other reasons, any information contained in this material, such as available
product types, technical data, and so on, is subject to change without notice.
Customers are advised to contact our semiconductor sales office and obtain the latest information
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2001 MAR