SPLC780D 16COM/40SEG Controller/Driver Preliminary AUG. 06, 2003 Version 0.1 SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO. is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document. Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus. Preliminary SPLC780D Table of Contents PAGE 1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3 2. FEATURES .................................................................................................................................................................................................. 3 3. BLOCK DIAGRAM ...................................................................................................................................................................................... 3 4. SIGNAL DESCRIPTIONS ........................................................................................................................................................................... 4 4.1. ORDERING INFORMATION ....................................................................................................................................................................... 4 5. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 5 l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F 5.1. OSCILLATOR .......................................................................................................................................................................................... 5 5.2. CONTROL AND DISPLAY INSTRUCTIONS ................................................................................................................................................... 5 5.3. INSTRUCTION TABLE............................................................................................................................................................................... 7 5.4. 8-BIT OPERATION AND 8-DIGIT 1-LINE DISPLAY (USING INTERNAL RESET)................................................................................................ 8 5.5. 4-BIT OPERATION AND 8-DIGIT 1-LINE DISPLAY (USING INTERNAL RESET)................................................................................................ 9 5.6. 8-BIT OPERATION AND 8-DIGIT 2-LINE DISPLAY (USING INTERNAL RESET)................................................................................................ 9 5.7. RESET FUNCTION ................................................................................................................................................................................ 10 5.8. DISPLAY DATA RAM (DD RAM) ........................................................................................................................................................... 12 5.9. TIMING GENERATION CIRCUIT............................................................................................................................................................... 12 5.10. LCD DRIVER CIRCUIT ....................................................................................................................................................................... 12 5.11. CHARACTER GENERATOR ROM (CG ROM) ...................................................................................................................................... 12 5.12. CHARACTER GENERATOR RAM (CG RAM) ....................................................................................................................................... 12 5.13. CURSOR/BLINK CONTROL CIRCUIT .................................................................................................................................................... 16 5.14. INTERFACING TO MPU....................................................................................................................................................................... 16 5.15. SUPPLY VOLTAGE FOR LCD DRIVE .................................................................................................................................................... 16 5.16. REGISTER --- IR (INSTRUCTION REGISTER) AND DR (DATA REGISTER) ............................................................................................ 19 5.17. BUSY FLAG (BF) ............................................................................................................................................................................... 19 5.18. ADDRESS COUNTER (AC).................................................................................................................................................................. 19 5.19. I/O PORT CONFIGURATION ................................................................................................................................................................ 19 6. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................. 20 6.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................. 20 6.2. DC CHARACTERISTICS (VDD = 2.7V TO 4.5V, TA = 25℃) .................................................................................................................... 20 6.3. AC CHARACTERISTICS (VDD = 2.7V TO 4.5V, TA = 25℃) .................................................................................................................... 21 6.4. DC CHARACTERISTICS (VDD = 4.5V TO 5.5V, TA = 25℃) .................................................................................................................... 22 6.5. AC CHARACTERISTICS (VDD = 4.5V TO 5.5V, TA = 25℃) .................................................................................................................... 22 7. APPLICATION CIRCUITS......................................................................................................................................................................... 25 7.1. R-OSCILLATOR .................................................................................................................................................................................... 25 7.2. INTERFACE TO MPU............................................................................................................................................................................. 25 7.3. SPLC780D APPLICATION CIRCUIT ....................................................................................................................................................... 26 7.4. APPLICATIONS FOR LCD ...................................................................................................................................................................... 27 8. CHARACTER GENERATOR ROM ........................................................................................................................................................... 29 8.1. SPLC780D - 001................................................................................................................................................................................ 29 9. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 30 9.1. PAD ASSIGNMENT AND LOCATIONS...................................................................................................................................................... 30 9.2. PACKAGE CONFIGURATION ................................................................................................................................................................... 31 9.3. PACKAGE INFORMATION ....................................................................................................................................................................... 32 10. DISCLAIMER............................................................................................................................................................................................. 33 11. REVISION HISTORY ................................................................................................................................................................................. 34 © Sunplus Technology Co., Ltd. Proprietary & Confidential 2 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 16COM/40SEG CONTROLLER/DRIVER 1. GENERAL DESCRIPTION 2. FEATURES The SPLC780D, a dot-matrix LCD controller and driver from Character generator ROM: 10880 bits ─ Character font 5 x 8 dots: 192 characters SUNPLUS, is a unique design for displaying alpha-numeric, Japanese-Kana characters and symbols. ─ Character font 5 x 10 dots: 64 characters The SPLC780D provides two types of interfaces to MPU: 4-bit and 8-bit interfaces. The transferring speed of 8-bit is twice faster than 4-bit. Character generator RAM: 512 bits ─ Character font 5 x 8 dots: 8 characters A single l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F SPLC780D is able to display up to two 8-character lines. ─ Character font 5 x 10 dots: 4 characters By cascading with SPLC100 or SPLC063, the display capability can 4-bit or 8-bit MPU interfaces be extended. Direct driver for LCD: 16 COMs x 40 SEGs The CMOS technology ensures the power saves in the most efficient way and the performance keeps in the highest Duty factor (selected by program): ─ 1/8 duty: 1 line of 5 x 8 dots rank. ─ 1/11 duty: 1 line of 5 x 10 dots ─ 1/16 duty: 2 lines of 5 x 8 dots / line Built-in power on automatic reset circuit Built-in oscillator circuit (with external resistor) Support external clock operation Low Power Consumption Package form: 80 QFP or bare chip available 3. BLOCK DIAGRAM OSC1 OSC2 VDD Parallel to Serial Data Conversion Circuit 5 VSS DB0-DB3 Busy Flag 8 DB4-DB7 RS R/W I/O 5 Character Generator ROM Data Register Character Generator RAM Cursor Blink Control Circuit 8 8 40-bit Shift Register D 40 Latch Circuit 40 8 7 7 Buffer E Power Supply for LCD Drive : (V1-V5) © Sunplus Technology Co., Ltd. Proprietary & Confidential CL1,CL2 M Timing Generation Circuit 8 Instruction Register 8 Instruction Decorder 7 Display Data RAM 80 Bytes 7 16-bit 16 Shift Register 40 Segments x 16 Commons LCD Driver COM1COM16 SEG1SEG40 Address Counter 3 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 4. SIGNAL DESCRIPTIONS PIN No. Type VDD Mnemonic 33 I Power input VSS 23 I Ground OSC1 24 - OSC2 25 V1 - V5 R/W Both OSC1 and OSC2 are connected to resistor for internal oscillator circuit. For external clock operation, the clock is input to OSC1. 26 - 30 E Description I 38 I Supply voltage for LCD driving. A start signal for reading or writing data. l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F 37 I A signal for selecting read or write actions. 1: Read, 0: Write. RS 36 I A signal for selecting registers. 1: Data Register (for read and write) 0: Instruction Register (for write), Busy flag - Address Counter (for read). DB0 - DB3 DB4 - DB7 CL1 CL2 M D 39 - 42 I/O Low 4-bit data 43 - 46 I/O High 4-bit data 31 O Clock to latch serial data D. 32 O Clock to shift serial data D. 34 O Switch signal to convert LCD waveform to AC. 35 O Sends character pattern data corresponding to each common signal serially. 22 - 1 O Segment signals for LCD. O Common signals for LCD. 1: Selection, 0: Non-selection. SEG1 - SEG22 SEG23 - SEG40 COM1 - COM16 80 - 63 47 - 62 4.1. Ordering Information Product Number Package Type SPLC780D-NnnV-C Chip form SPLC780D-NnnV-PQ05 Package form - QFP 80L Note1: Code number is assigned for customer. Note2: Code number (N = A - Z or 0 - 9, nn = 00 - 99); version (V = A - Z). © Sunplus Technology Co., Ltd. Proprietary & Confidential 4 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 5. FUNCTIONAL DESCRIPTIONS 5.1. Oscillator SPLC780D oscillator supports not only the internal oscillator operation, but also the external clock operation. S=1 I/D=1 It shifts the display to the left S=1 I/D=0 It shifts the display to the right 5.2. Control and Display Instructions 5.2.4. Display ON/OFF control Control and display instructions are described in details as follows: RS 5.2.1. Clear display RS Code 0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F Code 0 0 0 0 0 0 1 D C B R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 0 1 D = 1: Display on, D = 0: Display off C = 1: Cursor on, C = 0: Cursor off B = 1: Blinks on, B= 0: Blinks off It clears the entire display and sets Display Data RAM Address 0 in Address Counter. 5.2.2. Return home RS Code 0 5 x 8 dot 5 x 10 dot character font character font R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 1 X 8th line Cursor X: Do not care (0 or 1) It sets Display Data RAM Address 0 in Address Counter and the display returns to its original position. 11th line 5.2.5. Cursor or display shift The cursor or blink goes to the most-left side of the display (to the 1st line if 2 lines are Without changing DD RAM data, it moves cursor and shifts displayed). display. The contents of the Display Data RAM do not change. RS Code 5.2.3. Entry mode set 0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 1 S/C R/L X X During writing and reading data, it defines cursor moving direction and shifts the display. RS Code 0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 1 I/D S Blink display alternately I / D = 1: Increment, I / D = 0: Decrement. S = 1: The display shift, S = 0: The display does not shift. S/C R/L Description 0 0 Shift cursor to the left AC = AC - 1 0 1 Shift cursor to the right AC = AC + 1 1 0 Shift display to the left. 1 1 Shift display to the right. © Sunplus Technology Co., Ltd. Proprietary & Confidential Cursor follows the display shift Cursor follows the display shift 5 Address Counter AC = AC AC = AC AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 5.2.6. Function set Display data RAM can be read or written after this setting. RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 Code 0 0 0 1 DL N F X X In one-line display (N = 0), (aaaaaaa)2: (00)16 - (4F)16. X: Do not care (0 or 1) In two-line display (N = 1), DL: It sets interface data length. (aaaaaaa)2: (00)16 - (27)16 for the first line, DL = 1: Data transferred with 8-bit length (DB7 - 0). (aaaaaaa)2: (40)16 - (67)16 for the second line. l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F DL = 0: Data transferred with 4-bit length (DB7 - 4). It requires two times to accomplish data transferring. 5.2.9. Read busy flag and address N: It sets the number of the display line. N = 0: One-line display. RS N = 1: Two-line display. R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 Code 1 BF a a a a a a a F: It sets the character font. F = 0: 5 x 8 dots character font. F = 1: 5 x 10 dots character font. When BF = 1, it indicates the system is busy now and it will not accept any instruction until not busy (BF = 0). N F No. of Display Lines 0 0 1 0 1 1 1 X 2 Character Font Duty Factor 5 x 8 dots 1/8 5 x 10 dots 1 / 11 5 x 8 dots 1 / 16 At the same time, the content of Address Counter (aaaaaaa)2 is read. 5.2.10. Write data to character generator RAM or display data RAM RS It cannot display two lines with 5 x 10 dots character font. R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 Code 0 d d d d d d d d 5.2.7. Set character generator RAM address RS Code 0 It writes data (dddddddd)2 to character generator RAM or display R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 1 a a a a a a data RAM. 5.2.11. Read data from character generator RAM or display data RAM It sets Character Generator RAM Address (aaaaaa)2 to the Address Counter. RS Code Character Generator RAM data can be read or written after this R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 1 d d d d d d d d setting. It reads data (dddddddd)2 from character generator RAM or 5.2.8. Set display data RAM address display data RAM. RS Code 0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 1 a a a a a a a To read data correctly, do the following: 1). The address of the Character Generator RAM or Display Data RAM or shift the cursor instruction. It sets Display Data RAM Address (aaaaaaa)2 to the Address 2). The “ Read ” instruction. Counter. © Sunplus Technology Co., Ltd. Proprietary & Confidential 6 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 5.3. Instruction Table Instruction Instruction Code Clear Display 0 0 0 0 0 0 0 0 0 1 Return Home 0 0 0 0 0 0 0 0 1 - Execution time Description RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 (fosc=270KHz) Write "20H" to DDRAM and set DDRAM 1.52ms address to "00H" from AC Set DDRAM address to "00H" from AC and 1.52ms return cursor to its original position if shifted. The contents of DDRAM are not l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F changed. Entry Mode Set Display ON/ OFF Control Cursor or Display Shift 0 0 0 0 0 0 0 1 I/D S Assign cursor moving direction and enable 38µs the shift of entire display 0 0 0 0 0 0 1 D C B Set display(D), cursor(C), and blinking of 38µs cursor(B) on/off control bit. 0 0 0 0 0 1 S/C R/L - - Set cursor moving and display shift control 38µs bit, and the direction, without changing of DDRAM data. Function Set 0 0 0 0 1 DL N F - - Set interface data length (DL: 8-bit/4-bit), 38µs numbers of display line (N: 2-line/1-line) and, display font type (F:5x10 dots/5x8 dots) Set CGRAM Address Set DDRAM Address Read Busy Flag and Address Counter 0 0 0 0 0 1 0 1 1 AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address counter. AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in counter 38µs 38µs BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 Whether during internal operation or not can be known by reading BF. The contents of address counter can also be read. Write Data to RAM 1 0 D7 D6 D5 D4 D3 D2 D1 D0 Write data into internal RAM 38µs internal RAM 38µs (DDRAM/CGRAM). Read Data from RAM Note: "-": don't care 1 1 © Sunplus Technology Co., Ltd. Proprietary & Confidential D7 D6 D5 D4 D3 D2 D1 D0 Read data from (DDRAM/CGRAM). 7 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 5.4. 8-Bit Operation and 8-Digit 1-Line Display (Using Internal Reset) No. Instruction 1 Power on. (SPLC780D starts initializing) Display Power on reset. No display. Operation 2 Function set Set to 8-bit operation and select 1-line display line and character font. RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 3 0 0 1 1 0 0 X X 1 1 1 0 Display on / off control 0 4 0 0 0 0 0 Entry mode set 0 0 0 0 0 Display on. _ Cursor appear. l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F Increase address by one. 0 0 0 1 1 0 _ It will shift the cursor to the right when writing to the DD RAM/CG RAM. Now the display has no shift. 5 Write data to CG RAM / DD RAM 1 6 0 0 1 0 0 0 1 0 7 0 0 1 0 Entry mode set 0 0 0 0 0 0 0 1 0 0 1 0 12 0 1 0 1 0 0 1 1 1 0 0 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 X X 0 0 X X 0 1 1 0 20 1 1 0 1 1 X X 0 1 X X 0 0 0 0 0 : 0 0 The cursor is incremented by one and shifted to the right. WELCOME_ WELCOME_ ELCOME _ LCOME C_ COMPAMY_ COMPAMY_ COMPAMY_ COMPAMY_ COMPAMY_ 0 0 0 © Sunplus Technology Co., Ltd. Proprietary & Confidential The cursor is incremented by one and shifted to the right. Set mode for display shift when writing Write " "(space). The cursor is incremented by one and shifted to the right. Write " C ". The cursor is incremented by one and shifted to the right. Write " Y ". The cursor is incremented by one and shifted to the right. Only shift the cursor's position to the left (Y). Only shift the cursor's position to the left (M). Write " N ". Shift the display and the cursor's position to the right. Shift the display and the cursor's position to the right. Write " 0 1 " (space). The cursor is incremented by one and shifted to the right. : WELCOME_ 0 Write " E ". The display moves to the left. OMPANY_ Return home 0 Write " E ". WE_ OMPANY_ 1 Write data to CG RAM / DD RAM 0 The cursor is incremented by one and shifted to the right. : Cursor or display shift 1 21 0 Cursor or display shift 0 19 0 Write " W ". W_ : Write data to CG RAM / DD RAM 0 18 1 Cursor or display shift 1 17 0 Cursor or display shift 0 16 1 Write data to CG RAM / DD RAM 0 15 0 : 1 14 0 Write data to CG RAM / DD RAM 1 13 1 Write data to CG RAM / DD RAM 1 11 1 Write data to CG RAM / DD RAM 0 10 1 : 1 9 0 Write data to CG RAM / DD RAM 1 8 1 : Both the display and the cursor return to the original position (address 0). 0 8 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 5.5. 4-Bit Operation and 8-Digit 1-Line Display (Using Internal Reset) No. 1 Instruction Display Operation Power on reset. No display. Power on. (SPLC780D starts initializing) 2 Set to 4-bit operation. Function set RS R/W DB7 DB6 DB5 DB4 3 4 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 Set to 4-bit operation and select 1-line display line and character font. l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F X X 0 0 Display on. _ 5 0 0 1 1 0 0 0 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 1 0 0 1 1 1 Cursor appears. Increase address by one. _ It will shift the cursor to the right when writing to the DD RAM / CG RAM. Now the display has no shift. 6 Write " W ". W_ The cursor is incremented by one and shifted to the right. 5.6. 8-Bit Operation and 8-Digit 2-Line Display (Using Internal Reset) No. 1 Instruction Power on. Display Operation Power on reset. No display. (SPLC780D starts initializing) 2 Function set Set to 8-bit operation and select 2-line display line and 5 x 8 dot RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 3 0 0 1 1 1 0 1 0 X 0 0 0 Entry mode set 0 0 0 0 0 character font. X Display on / off control 0 4 0 Display on. _ 1 Cursor appear. 0 1 Increase address by one. 0 0 0 1 1 0 It will shift the cursor to the right when writing to the DD RAM / _ CG RAM. Now the display has no shift. 5 Write data to CG RAM / DD RAM 1 0 0 1 0 6 7 1 The cursor is incremented by one and shifted to the right. 1 : 0 0 1 0 0 1 1 0 WELCOME_ The cursor is incremented by one and shifted to the right. 0 1 0 1 0 0 0 0 WELCOME _ It sets DD RAM's address. 0 0 WELCOME T_ Write " T ". 0 Write data to CG RAM / DD RAM 0 0 1 0 10 1 0 1 : 0 0 1 0 1 © Sunplus Technology Co., Ltd. Proprietary & Confidential The cursor is moved to the beginning position of the 2nd line. The cursor is incremented by one and shifted to the right. : Write data to CG RAM / DD RAM 1 : Write " E ". 0 Set DD RAM address 1 11 1 : 0 9 0 Write data to CG RAM / DD RAM 1 8 1 Write " W ". W_ 0 1 0 0 : Write " T ". WELCOME TO PART_ The cursor is incremented by one and shifted to the right. 9 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D No. 12 Instruction Entry mode set 0 13 0 0 0 0 0 0 1 1 0 0 1 0 14 1 1 0 0 WELCOME TO PART_ When writing, it sets mode for the display shift. Write " Y ". 1 ELCOME O PARTY_ : 0 0 0 5.7. Reset Function 0 0 The cursor is incremented by one and shifted to the right. : Return home 0 Operation 1 Write data to CG RAM / DD RAM 1 15 Display 0 0 1 : Both the display and the cursor return to the original position WELCOME TO PARTY 0 (address 0). l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F At power on, SPLC780D starts the internal auto-reset circuit and executes the initial instructions. follows: The initial procedures are shown as [ 8-Bit Interface ] Power On W ait time > 40ms After VDD > 2.7V W ait time > 15 ms after VDD > 4.5V RS R/W DB7 DB6 DB5 DB4 DB3 DB3 DB1 DB0 0 0 0 0 1 1 X X X X BF cannot be checked before this instruction . Function set ( Interface is 8 bits length . ) W ait time > 4.1 ms RS R/W DB7 DB6 DB5 DB4 DB3 DB3 DB1 DB0 0 0 0 0 1 1 X X X X BF cannot be checked before this instruction . Function set ( Interface is 8 bits length . ) W ait time > 100 us RS R/W DB7 DB6 DB5 DB4 DB3 DB3 DB1 DB0 0 0 0 0 1 1 X X X X BF cannot be checked before this instruction . Function set ( Interface is 8 bits length . ) BF can be checked after the following instructions . RS R/W DB7 DB6 DB5 DB4 DB3 DB3 DB1 DB0 0 0 0 0 1 1 N F X X 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 I/D S Function set ( Interface is 8 bits length . Specify the number of display lines and character font . ) The number of display lines and character font cannot be changed afterwards . 0 Display off Display clear Initialization Ends © Sunplus Technology Co., Ltd. Proprietary & Confidential Entry mode set 10 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D [ 4-Bit Interface ] Power On W ait time > 40ms After VDD > 2.7V W ait time > 15 ms after VDD > 4.5V RS R/W DB7 DB6 DB5 DB4 0 0 0 0 1 1 BF cannot be checked before this instruction . Function set ( Interface is 8 bits length . ) l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F W ait time > 4.1 ms RS R/W DB7 DB6 DB5 DB4 0 0 0 0 1 1 BF cannot be checked before this instruction . Function set ( Interface is 8 bits length . ) W ait time > 100 us RS R/W DB7 DB6 DB5 DB4 0 0 0 0 1 1 RS R/W DB7 DB6 DB5 DB4 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 N F X X BF cannot be checked before this instruction . Function set ( Interface is 8 bits length . ) BF can be checked after the following instructions . Function set ( Set interface to be 4 bits length) Interface is 8 bits length . Function set ( Interface is 4 bits length . Specify the number of the display lines and character font . ) 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 The number of display lines and character font cannot be changed afterwards . 0 0 0 0 Display off 0 1 I/D S Display clear Initialization Ends © Sunplus Technology Co., Ltd. Proprietary & Confidential Entry mode set 11 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 5.8. Display Data RAM (DD RAM) The 80-bit DD RAM is normally used for storing display data. The relationships between Display Data RAM Address and LCD′s Those DD RAM not used for display data can be used as general position are depicted as follows. data RAM. Its address is configured in the Address Counter. 1-line display , 80 display characters 1 2 3 4 5 6 00 01 02 03 04 05 01 80 Display position 4E 4F Display data RAM address l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F ( Example ) 1-line display , 8 display characters 1 2 3 4 5 6 7 8 00 79 02 03 04 05 06 Display position Display data RAM address 07 When the display shift operation is performed , the display data RAM's address moves as : ( i ) Left shift 01 02 ( ii ) Right shift 03 04 05 06 06 07 08 4F 00 01 02 03 04 05 06 5.9. Timing Generation Circuit 5.11. Character Generator ROM (CG ROM) The timing generating circuit is able to generate timing signals to Using 8-bit character code, the character generator ROM the internal circuits. generates 5 x 8 dots or 5 x 10 dots character patterns. In order to prevent the internal timing It also interface, the MPU access timing and the RAM access timing are can generate 192’s 5 x 8 dots character patterns and 64’s 5 x 10 generated independently. dots character patterns. 5.10. LCD Driver Circuit 5.12. Character Generator RAM (CG RAM) Users can easily change the character patterns in the character Total of 16 commons and 40 segments signal drivers are valid in the LCD driver circuit. generator RAM through program. When a program specifies the character It can be written to 5 x 8 dots, 8-character patterns or 5 x 10 dots for 4-character patterns. fonts and line numbers, the corresponding common signals output drive-waveforms and the others still output unselected waveforms. © Sunplus Technology Co., Ltd. Proprietary & Confidential 12 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D The following diagram shows the SPLC780D character patterns: Correspondence between Character Codes and Character Patterns. Higher 4-bit (D4 to D7) of Character Code (Hexadecimal) Lower 4-bit (D0 to D3) of Character Code (Hexadecimal) 0 0 CG RAM (1) 1 CG RAM (2) 2 CG RAM (3) 3 CG RAM (4) 4 CG RAM (5) 5 CG RAM (6) 6 CG RAM (7) 7 CG RAM (8) 8 CG RAM (1) 9 CG RAM (2) A CG RAM (3) B CG RAM (4) C CG RAM (5) D CG RAM (6) E CG RAM (7) F CG RAM (8) 1 2 3 4 5 6 7 8 9 A B C D E F l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F © Sunplus Technology Co., Ltd. Proprietary & Confidential 13 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D The relationships between Character Generator RAM Addresses, Character Generator RAM Data (character patterns), and Character Codes are depicted as follows: 5.12.1. 5 x 8 dot character patterns Character Code ( DD RAM Data ) CG RAM Address Character Patterns ( CG RAM Data ) b7 b6 b5 b4 b3 b2 b1 b0 b5 b4 b3 b2 b1 b0 b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 1 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 0 0 1 0 0 1 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 0 0 0 1 0 0 1 1 1 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 0 0 1 0 0 1 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 0 0 1 1 1 0 1 1 1 0 0 0 0 0 l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F X X 0 0 0 0 0 1 0 0 0 0 0 1 X X X X X X Note1: It means that the bit0~2 of the character code correspond to the bit3~5 of the CG RAM address. Note2: These areas are not used for display, but can be used for the general data RAM. Character Pattern Example (1) Cursor Position Character Pattern Example (2) Note3: When all of the bit4-7 of the character code are 0, CG RAM character patterns are selected. Note4: " 1 ": Selected, " 0 " : No selected , " X " : Do not care (0 or 1). Note5: For example (1), set character code (b2 = b1 = b0 = 0, b3 = 0 or 1, b7-b4 = 0) to display “ T ”. That means character code (00) 16,and (08) 16 can display “ T ” character. Note6: The bits 0-2 of the character code RAM is the character pattern line position. The 8th line is the cursor position and display is formed by logical OR with the cursor. © Sunplus Technology Co., Ltd. Proprietary & Confidential 14 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 5.12.2. 5 X 10 dot character patterns Character Code ( DD RAM Data ) CG RAM Address Character Patterns ( CG RAM Data ) b7 b6 b5 b4 b3 b2 b1 b0 b5 b4 b3 b2 b1 b0 b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 1 1 0 0 0 1 0 0 1 0 1 0 0 0 1 Character Pattern Example (1) l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F X 0 0 X 0 0 0 0 1 1 1 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 1 0 0 0 1 0 1 1 0 1 0 0 0 1 0 1 1 1 1 0 0 0 1 1 0 0 0 1 0 0 0 1 1 0 0 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 1 0 1 1 1 1 0 0 1 1 0 1 X X X X X 1 1 1 0 1 1 1 1 X X X X X X Note1: It means that the bit1~2 of the character code correspond to the bit4~5 of the CG RAM address. Note2: These areas are not used for display, but can be used for the general data RAM. Cursor Position Note3: When all of the bit4-7 of the character code are 0, CG RAM character patterns are selected. Note4: " 1 “: Selected, " 0 “: No selected, " X “: Do not care (0 or 1). Note5: For example (1), set character code (b2 = b1 = 0, b3 = b0 = 0 or 1, b7-b4 = 0) to display “ U ”. That means all of the character codes (00) 16, (01) 16, (08) 16,and (09) 16 can display “ U ” character. Note6: The bits 0-3 of the character code RAM is the character pattern line position. The 11th line is the cursor position and display is formed by logical OR with the cursor. © Sunplus Technology Co., Ltd. Proprietary & Confidential 15 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 5.13. Cursor/Blink Control Circuit This circuit generates the cursor or blink in the cursor / blink When the Address Counter is (07) 16, the cursor position is shown control circuit. as belows: The cursor or the blink appears in the digit at the Display Data RAM Address defined in the Address Counter. b6 b5 b4 b3 b2 b1 b0 0 0 0 0 1 1 1 AC l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F In a 1-line display digit 1 2 3 4 5 6 7 8 9 10 Display position 00 01 02 03 04 05 06 07 08 09 Display data RAM address ( Hexadecimal ) the cursor position In a 2-line display digit 1 2 3 4 5 6 7 8 9 10 1st line 00 01 02 03 04 05 06 07 08 09 2nd line 40 41 42 43 44 45 46 47 48 49 Display position Display data RAM address ( Hexadecimal ) the cursor position 5.14. Interfacing to MPU 5.15. Supply Voltage for LCD Drive There are two types of data operations: 4-bit and 8-bit operations. Different voltages can be supplied to SPLC780D’s pins (V5 - 1) for Using 4-bit MPU, the interfacing 4-bit data is transferred by obtaining LCD drive-waveform. 4-busline (DB4 to DB7). duty factor and supply voltages are shown as belows: used. Thus, DB0 to DB3 bus lines are not Using 4-bit MPU to interface 8-bit data requires two times transferring. First, the higher 4-bit data is transferred by 4-busline (for 8-bit operation, DB7 to DB4). Duty Factor Secondly, the lower Supply 4-bit data is transferred by 4-busline (for 8-bit operation, DB3 to Voltage DB0). The relationships between bias, For 8-bit MPU, the 8-bit data is transferred by 8-buslines (DB0 to DB7). © Sunplus Technology Co., Ltd. Proprietary & Confidential 16 1/8, 1/11 1/16 1/4 1/5 V1 VDD – 1/4 VLCD VDD – 1/5 VLCD V2 VDD – 1/2 VLCD VDD – 2/5 VLCD V3 VDD – 1/2 VLCD VDD – 3/5 VLCD V4 VDD – 3/4 VLCD VDD – 4/5 VLCD V5 VDD – VLCD VDD – VLCD AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 5.15.1. The power connections for LCD (1/4 Bias, 1/5 Bias) are shown belows: VDD ( +5.0V ) VDD ( +5.0V ) VDD VDD R R V1 V1 R V2 R V2 l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F VLCD V3 VLCD V3 R V4 R V4 R R V5 V5 VR VR 1 / 4 Bias 1 / 5 Bias (1/8,1/11 Duty) (1/16 Duty) -V or Gnd -V or Gnd The bypass-capacitor improves the LCD display quality. VDD( +5.0V ) VDD( +5.0V ) VDD VDD R R C V2 R R V2 C R V3 C V1 V1 V3 R R C V4 C C C V4 R R C V5 C V5 VR 1 / 5 Bias 1 / 4 Bias (1/16 Duty) (1/8,1/11 Duty) -V or Gnd VR -V or Gnd The bias voltage must have the following relations: VDD > V1 > V2 ≧ V3 > V4 > V5. © Sunplus Technology Co., Ltd. Proprietary & Confidential 17 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 5.15.2. The relationship between LCD frame′s frequency and oscillator′s frequency. (Assume the oscillation frequency is 250KHz, 1 clock cycle time = 4.0µs) 5.15.2.1. 1/8 Duty, TYPE-B waveform 400 clocks 1 2 7 8 1 2 7 8 1 2 7 8 1 2 7 8 VPP V1 COM1 V2(V3) V4 VSS l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F 1 Frame 1 Frame 1 frame = 4(µs) x 400 x 8 = 12800(µs) = 12.8ms 1 Frame frequency = = 78.1(Hz) 12.8(ms) 5.15.2.2. 1/11 Duty, TYPE-B waveform 400 clocks 1 2 10 11 1 2 10 11 1 2 VPP V1 COM1 V2(V3) V4 VSS 1 Frame 1 Frame 1 frame = 4(µs) x 400 x 11 = 17600(µs) = 17.6ms Frame frequency = 1 17.6(ms) = 5 6 .8(Hz) 5.15.2.3. 1/16 Duty, TYPE-B waveform 200 clocks 1 2 15 16 1 2 15 16 1 2 VPP V1 COM1 V2 V3 V4 VSS 1 Frame 1 Frame 1 frame = 4(µs) x 200 x 16 = 12800(µs) = 12.8ms 1 Frame frequency = = 78.1(Hz) 12.8(ms) © Sunplus Technology Co., Ltd. Proprietary & Confidential 18 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 5.16. REGISTER --- IR (Instruction Register) and DR 5.19. I/O Port Configuration (Data Register) 5.19.1. Input port: E SPLC780D contains two 8-bit registers: Instruction Register (IR) and Data Register (DR). VDD Using combinations of the RS pin and the R/W pin selects the IR and DR, see below: RS R/W 0 0 0 1 PMOS Operation sch IR write (Display clear, etc.) NMOS Read busy flag (DB7) and Address Counter l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F (DB0 - DB6) 1 0 DR write (DR to Display data RAM or 5.19.2. Input port: R/W, RS Character generator RAM) 1 1 DR read (Display data RAM or Character VDD generator RAM to DR) VDD PMOS The IR can be written by MPU, but it cannot be read by MPU. PMOS sch NMOS 5.17. Busy Flag (BF) When RS = 0 and R/W = 1, the busy flag is output to DB7. As the busy flag =1, SPLC780D is in busy state and does not accept 5.19.3. Output port: CL1, CL2, M, D any instruction until the busy flag = 0. VDD 5.18. Address Counter (AC) PMOS The Address Counter assigns addresses to Display Data RAM and Character Generator RAM. When an instruction for address is written in IR, the address information is sent from IR to AC. After writing to/reading from Display Data RAM or Character NMOS Generator RAM, AC is automatically incremented by one (or decremented by one). The contents of AC are output to DB0 DB6 when RS = 0 and R/W = 1. 5.19.4. Input / Output port: DB7 - DB0 VDD VDD PMOS VDD Enable PMOS sch NMOS © Sunplus Technology Co., Ltd. Proprietary & Confidential 19 Data AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 6. ELECTRICAL SPECIFICATIONS 6.1. Absolute Maximum Ratings Characteristics Symbol Ratings Operating Voltage VDD -0.3V to +7.0V Driver Supply Voltage VLCD VDD - 12V to VDD + 0.3V Input Voltage Range VIN -0.3V to VDD + 0.3V Operating Temperature TA -30℃ to +80℃ TSTO -55℃ to +125℃ Storage Temperature l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or damage to the device. For normal operational conditions see AC/DC Electrical Characteristics. 6.2. DC Characteristics (VDD = 2.7V to 4.5V, TA = 25℃) Characteristics Operating Current Input High Voltage Input Low Voltage Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage (TTL) Output Low Voltage (TTL) Output High Voltage (CMOS) Output Low Voltage (CMOS) Driver ON Resistance (COM) Driver ON Resistance (SEG) LCD Voltage Symbol Limit Unit Test Condition Min. Typ. Max. IDD - 0.2 0.4 mA VIH1 0.7VDD - VDD V VIL1 -0.3 - 0.55 V VIH2 0.7VDD - VDD V VIL2 -0.2 - 0.2VDD V IIH -1.0 - 1.0 µA Pins: (RS, R/W, DB0 - DB7) IIL -5.0 -15 -30 µA VDD = 3.0V VOH1 0.75VDD - - V VOL1 - - 0.2VDD V VOH2 0.8VDD - - V VOL2 - - 0.2VDD V RCOM - - 20 KΩ RSEG - - 30 KΩ VLCD 3.0 - 9.0 V External clock (Note) Pins:(E, RS, R/W, DB0 - DB7) Pin OSC1 IOH = - 0.1mA Pins: DB0 - DB7 IOL = 0.1mA Pins: DB0 - DB7 IOH = - 40µA, Pins: CL1, CL2, M, D IOL = 40µA, Pins: CL1, CL2, M, D IO = ±50µA, VLCD = 4.0V Pins: COM1 - COM16 IO = ±50µA, VLCD = 4.0V Pins: SEG1 - SEG40 VDD-V5, 1/4 bias or 1/5 bias Note: FOSC = 250KHz, VDD = 3.0V, pin E = “L”, RS, R/W, DB0 - DB7 are open, all outputs are no loads. © Sunplus Technology Co., Ltd. Proprietary & Confidential 20 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 6.3. AC Characteristics (VDD = 2.7V to 4.5V, TA = 25℃) 6.3.1. Internal clock operation Characteristics Symbol OSC Frequency FOSC1 Limit Min. Typ. Max. 190 270 350 Unit KHz Test Condition VDD = 3.0V, Rf = 75KΩ±2% 6.3.2. External clock operation Characteristics l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F External Frequency Duty Cycle Rise/Fall Time Symbol FOSC2 t r, t f Limit Unit Min. Typ. Max. 125 250 350 KHz 45 50 55 % - - 0.2 µs Test Condition 6.3.3. Write mode (Writing data from MPU to SPLC780D) Characteristics E Cycle Time Symbol Limit Min. Typ. Max. tC 1000 - - Unit ns Test Condition Pin E tPW 450 - - ns Pin E tR, tF - - 25 ns Pin E Address Setup Time tSP1 60 - - ns Pins: RS, R/W, E Address Hold Time tHD1 20 - - ns Pins: RS, R/W, E Data Setup Time tSP2 195 - - ns Pins: DB0 - DB7 tHD2 10 - - ns Pins: DB0 - DB7 E Pulse Width E Rise/Fall Time Data Hold Time 6.3.4. Read mode (Reading data from SPLC780D to MPU) Characteristics E Cycle Time E Pulse Width E Rise/Fall Time Address Setup Time Address Hold Time Data Output Delay Time Data hold time © Sunplus Technology Co., Ltd. Proprietary & Confidential Symbol Limit Unit Test Condition Min. Typ. Max. tC 1000 - - ns Pin E tW 450 - - ns Pin E tR, tF - - 25 ns Pin E tSP1 60 - - ns Pins: RS, R/W, E tHD1 20 - - ns Pins: RS, R/W, E tD - - 360 ns Pins: DB0 - DB7 tHD2 5.0 - - ns Pin DB0 - DB7 21 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 6.4. DC Characteristics (VDD = 4.5V to 5.5V, TA = 25℃) Characteristics Symbol Limit Min. Typ. Max. Unit Operating Current IDD - 0.55 0.8 mA Input High Voltage VIH1 2.2 - VDD V Test Condition External clock (Note) Pins:(E, RS, R/W, DB0 - DB7) Input Low Voltage VIL1 -0.3 - 0.6 V Input High Voltage VIH2 VDD-1 - VDD V Pin OSC1 Input Low Voltage VIL2 -0.2 - 1.0 V Pin OSC1 IIH -2.0 - 2.0 µA IIL -20 -50 -100 µA VOH1 2.4 - VDD V VOL1 - - 0.4 V VOH2 0.9VDD - VDD V VOL2 - - 0.1VDD V RCOM - - 20 KΩ RSEG - - 30 KΩ VLCD 3.0 - 11 V Input High Current Input Low Current Output High Voltage (TTL) Output Low Voltage (TTL) Output High Voltage (CMOS) Output Low Voltage (CMOS) l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F Driver ON Resistance (COM) Driver ON Resistance (SEG) LCD Voltage Pins: (RS, R/W, DB0 - DB7) VDD = 5.0V IOH = - 0.1mA Pins: DB0 - DB7 IOL = 0.1mA Pins: DB0 - DB7 IOH = - 40µA, Pins: CL1, CL2, M, D IOL = 40µA, Pins: CL1, CL2, M, D IO = ±50µA, VLCD = 4.0V Pins: COM1 - COM16 IO = ±50µA, VLCD = 4.0V Pins: SEG1 - SEG40 VDD-V5, 1/4 bias or 1/5 bias Note: FOSC = 250KHz, VDD = 5.0V, pin E = “L”, RS, R/W, DB0 - DB7 are open, all outputs are no loads. 6.5. AC Characteristics (VDD = 4.5V to 5.5V, TA = 25℃) 6.5.1. Internal clock operation Characteristics OSC Frequency Symbol FOSC1 Limit Min. Typ. Max. 190 270 350 Unit KHz Test Condition VDD = 5.0V, Rf = 91KΩ±2% 6.5.2. External clock operation Characteristics External Frequency Symbol FOSC2 Duty Cycle Rise/Fall Time © Sunplus Technology Co., Ltd. Proprietary & Confidential t r, t f Limit Unit Min. Typ. Max. 125 250 350 KHz 45 50 55 % - - 0.2 µs 22 Test Condition AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 6.5.3. Write mode (Writing Data from MPU to SPLC780D) Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition E Cycle Time tC 500 - - ns Pin E E Pulse Width tPW 230 - - ns Pin E tR, tF - - 20 ns Pin E Address Setup Time tSP1 40 - - ns Pins: RS, R/W, E Address Hold Time tHD1 10 - - ns Pins: RS, R/W, E tSP2 80 - - ns Pins: DB0 - DB7 tHD2 10 - - ns Pins: DB0 - DB7 E Rise/Fall Time Data Setup Time Data Hold Time l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F 6.5.4. Read mode (Reading Data from SPLC780D to MPU) Characteristics E Cycle Time E Pulse Width Symbol Limit Unit Test Condition Min. Typ. Max. tC 500 - - ns Pin E tW 230 - - ns Pin E tR, tF - - 20 ns Pin E Address Setup Time tSP1 40 - - ns Pins: RS, R/W, E Address Hold Time tHD1 10 - - ns Pins: RS, R/W, E E Rise/Fall Time Data Output Delay Time Data hold time tD - - 120 ns Pins: DB0 - DB7 tHD2 5.0 - - ns Pin DB0 - DB7 6.5.5. Interface mode with LCD Driver (SPLC100A1) Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition Clock pulse width high tPWH 800 - - ns Pins: CL1, CL2 Clock pulse width low tPWL 800 - - ns Pins: CL1, CL2 Clock setup time Data setup time Data hold time M delay time © Sunplus Technology Co., Ltd. Proprietary & Confidential tCSP 500 - - ns Pins: CL1, CL2 tDSP 300 - - ns Pins: D tHD 300 - - ns Pins: D tD -1000 - 1000 ns Pins: M 23 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 6.5.6. Write mode timing diagram (Writing Data from MPU to SPLC780D) V IH1 V IL1 tSP1 RS R/W V IH1 V IL1 tHD1 V IL1 V IL1 tPW V IH1 V IL1 E l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F V IL1 tSP2 tR DB7 - 0 tF tHD1 V IH1 V IL1 V IH1 V IL1 tHD2 Valid Data V IH1 V IL1 tC 6.5.7. Read mode timing diagram (Reading Data from SPLC780D to MPU) RS R/W V IH1 V IL1 tSP1 V IH1 V IL1 tHD1 V IH1 V IH1 tPW E V IH1 V IL1 tR DB0 - DB7 V IH1 V IL1 tD V IH1 V IL1 tF tHD1 V IL1 tHD2 Valid Data V IH1 V IL1 tC 6.5.8. Interface mode with SPLC100A1 timing diagram CL1 0.9VDD tPWH 0.9VDD tPWH CL2 tCSP 0.1VDD 0.9VDD 0.1VDD tCSP tPWL D M 0.9VDD 0.1VDD 0.9VDD 0.1VDD tDSP tHD 0.1VDD tD © Sunplus Technology Co., Ltd. Proprietary & Confidential 24 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 7. APPLICATION CIRCUITS 7.1. R-Oscillator The oscillation resistor Rf is used only for the internal oscillator operation mode. OSC1 Rf : 75.0KΩ±2% ( when VDD = 3.0V) Rf : 91KΩ± 2% ( when VDD = 5.0V) OSC2 Since the oscillation frequency varies depending on the OSC1 and OSC2 pin capacitance, the wiring length to these pins should be minimized. l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F 600 270 Fosc ( KHz ) Fosc ( KHz ) 400 200 0 75 100 0 200 300 400 270 200 0 400 91 100 0 Rosc ( Kohms ) VDD = 3.0V 7.2. Interface to MPU 200 300 400 Rosc ( Kohms ) VDD = 5.0V 7.2.1. Interface to 8-bit MPU (6805) PA0 | PA7 COM1 | COM16 DB0 | DB7 8 6805 LCD PANEL 16 16 COMMONS SPLC780D PB0 E PB1 PB2 RS SEG1 | SEG40 R/W X 40 40 SEGMENTS 7.2.2. Interface to 8-bit MPU (Z80) D0 | D7 Z80 A1 | A7 A0 IORQ WR © Sunplus Technology Co., Ltd. Proprietary & Confidential 8 7 DB0 | DB7 E COM1 | COM16 16 LCD PANEL 16 COMMONS SPLC780D SEG1 | SEG40 RS X 40 40 SEGMENTS R/W 25 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 7.3. SPLC780D Application Circuit DOT MATRIX LCD PANEL 16 (8) 40 40 SEG40 | SEG1 COM16 (COM8) | COM1 Y1-Y40 DL1 VDD FCS SHL1 SHL2 GND VEE SPLC780D SPLC100A1 Y1-Y40 40 SPLC100A1 CL1 CL2 M Y1-Y40 DL1 DR2 VDD DL2 FCS DR1 SHL1 CL1 SHL2 CL2 GND M VEE V1V2V3V4V5V6 V1V2V3V4V5V6 l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F DR2 DL1 VDD FCS SHL1 SHL2 GND VEE DL2 DR1 CL1 CL2 M V1V2V3V4V5V6 VDD GND CL1 CL2 M V1 V2 V3 V4 V5 40 SPLC100A1 R VDD ( +5V ) © Sunplus Technology Co., Ltd. Proprietary & Confidential R C R C R C DR2 DL2 DR1 R C VR C 26 -V or Gnd AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 7.4. Applications for LCD SPLC780D COM1 LCD Panel 8 characters x 1 line COM8 SEG1 SEG40 l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F ( Example 1 ) : 5 x 8 dots , 8 characters x 1 line [ 1 / 4 Bias , 1 / 8 Duty ] SPLC780D COM1 LCD Panel 8 characters x 1 line COM11 SEG1 SEG40 ( Example 2 ) : 5 x 10 dots , 8 characters x 1 line [ 1 / 4 Bias , 1 / 11 Duty ] SPLC780D COM1 LCD Panel 8 characters x 2 lines COM8 COM9 COM16 SEG1 SEG40 ( Example 3 ) : 5 x 8 dots , 8 characters x 2 lines [ 1 / 5 Bias , 1 / 16 Duty ] © Sunplus Technology Co., Ltd. Proprietary & Confidential 27 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D SPLC780D COM1 COM8 SEG1 SEG40 COM9 COM16 l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F ( Example 4 ) : 5 x 8 dots , 16 characters x 1 line [ 1 / 5 Bias , 1 / 16 Duty ] SPLC780D SEG1 SEG20 COM1 LCD Panel COM8 4 characters x 2 lines SEG21 SEG40 ( Example 5 ) : 5 x 8 dots , 4 characters x 2 lines [ 1 / 4 Bias , 1 / 8 Duty ] © Sunplus Technology Co., Ltd. Proprietary & Confidential 28 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 8. CHARACTER GENERATOR ROM 8.1. SPLC780D - 001 l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F © Sunplus Technology Co., Ltd. Proprietary & Confidential 29 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 9. PACKAGE/PAD LOCATIONS 9.1. PAD Assignment and Locations Please contact Sunplus sales representatives for more information. l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F © Sunplus Technology Co., Ltd. Proprietary & Confidential 30 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 9.2. Package Configuration SEG06 17 SEG05 18 SEG04 19 SEG03 20 SEG02 21 SEG01 22 VSS 23 OSC1 24 © Sunplus Technology Co., Ltd. Proprietary & Confidential 65 SEG38 66 SEG37 67 SEG36 68 SEG35 69 SEG34 70 SEG33 71 SEG32 72 SEG31 73 SEG30 74 SEG29 75 SEG28 76 SEG27 77 SEG26 78 SEG25 40 16 39 SEG07 DB1 15 DB0 SEG08 38 14 E SEG09 37 13 R/W SEG10 36 12 RS SEG11 35 11 D SEG12 34 10 M SEG13 56 COM10 33 9 VDD SEG14 57 COM11 32 8 CL2 SEG15 58 COM12 31 7 CL1 SEG16 SEG40 59 COM13 30 6 V5 SEG17 63 60 COM14 29 5 V4 SEG18 SEG39 61 COM15 28 4 V3 SEG19 64 62 COM16 27 3 26 SEG20 l it a y n l e n if d O n e s o SPLC780DC U s XXX T u S l p E n U u S rG o F V2 2 V1 SEG21 25 1 OSC2 SEG22 79 SEG24 80 SEG23 QFP 80L Top View 31 55 COM9 54 COM8 53 COM7 52 COM6 51 COM5 50 COM4 49 COM3 48 COM2 47 COM1 46 DB7 45 DB6 44 DB5 43 DB4 42 DB3 41 DB2 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 9.3. Package Information QFP 80L Outline Dimensions Unit: Millimeter D D1 E l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F SUNPLUS SPLC780D YYWW E1 c L1 Symbol D D1 E E1 e Min. Nom. Max. Millimeter 20.00 REF Millimeter 17.20 REF Millimeter 14.00 REF Millimeter 0.30 0.35 0.45 Millimeter A - - 3.40 Millimeter A1 0.25 - - Millimeter A2 2.50 2.72 2.90 Millimeter c 0.11 0.15 0.23 Millimeter © Sunplus Technology Co., Ltd. Proprietary & Confidential 1.60 REF 32 A2 A A1 Millimeter b L1 b Unit 23.20 REF 0.80 REF e Millimeter AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 10. DISCLAIMER The information appearing in this publication is believed to be accurate. Integrated circuits sold by Sunplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. SUNPLUS makes no warranty, express, statutory implied or by description regarding the information in this publication or regarding the freedom of the described chip(s) from patent infringement. MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. prices at any time without notice. FURTHER, SUNPLUS MAKES NO WARRANTY OF SUNPLUS reserves the right to halt production or alter the specifications and Accordingly, the reader is cautioned to verify that the data sheets and other information in this publication are current before placing orders. Products described herein are intended for use in normal commercial applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F specifically not recommended without additional processing by SUNPLUS for such applications. Please note that application circuits illustrated in this document are for reference purposes only. © Sunplus Technology Co., Ltd. Proprietary & Confidential 33 AUG. 06, 2003 Preliminary Version: 0.1 Preliminary SPLC780D 11. REVISION HISTORY Date Revision # AUG. 06, 2003 0.1 Description Page Original 34 l it a y n l e n if d O n e s o C U s T u S l p E n U u S rG o F © Sunplus Technology Co., Ltd. Proprietary & Confidential 34 AUG. 06, 2003 Preliminary Version: 0.1