DATASHEET

ISL22511
Single Push Button Controlled Potentiometer (XDCP™)
Data Sheet
September 9, 2015
Low Noise, Low Power, 32 Taps, Push
Button Controlled Potentiometer
Features
• Solid-State Non-Volatile Potentiometer
The Intersil ISL22511 is a three-terminal digitally-controlled
potentiometer (XDCP) implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. The ISL22511 features a push button control, a
shutdown mode, as well as an industry-leading UTQFN
package.
The push button control has individual PU and PD inputs for
adjusting the wiper. To eliminate redundancy, the wiper
position will automatically increment or decrement if one of
these inputs is held longer than one second.
Forcing both PU and PD low for more than two seconds
activates shutdown mode. Shutdown mode disconnects the
top of the resistor chain and moves the wiper to the lowest
position, minimizing power consumption.
The three terminals accessing the resistor chain naturally
configure the ISL22511 as a voltage divider. A rheostat is
easily formed by floating an end terminal or connecting it to
the wiper.
CONTROL
BLOCK
RL
VSS (GROUND)
O
• Shutdown Mode
• 32 Wiper Tap Points
- Middle Scale Wiper Position on Power-Up
• Low Power CMOS
- VCC = 2.7V to 5.5V
- Terminal Voltage, 0 to VCC
- Standby Current, 3µA Max
• RTOTAL Value = 10k50k
• High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T  +55°C
• Pb-Free (RoHS Compliant)
RW
PU
PD
RH
VSS
• AUTOSTORE of Last Wiper Position or Manual Store of
Wiper Position
• Packages
- 8 Ld SOIC
- 10 Ld UTQFN (2.1mmx1.6mm)
PU 1
9 VCC
PD 2 UTQFN 8 ASE
RH 3 (Top View) 7 RL
VSS 4
6 RW
NC
ASE
• Single or Auto Increment/Decrement
- Fast Mode after 1s Button Press
10
RH
PU
PD
O
• Push Button Controlled
5
NC
VCC (SUPPLY VOLTAGE)
1
2 SOIC
3 (Top View)
4
8
7
6
5
FN6678.2
VCC
ASE
RL
RW
Applications
• Volume Control
• LED/LCD Brightness Control
• Contrast Control
• Programming Bias Voltages
• Ladder Networks
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas LLC
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas LLC 2008, 2009, 2015. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL22511
Ordering Information
PART
NUMBER
PART
MARKING
RTOTAL
(k)
TEMP.
RANGE(°C)
22511 WFBZ
10
-40 to +125
8 Ld SOIC
M8.15
ISL22511UFB8Z* (Note 1) (No longer 22511 UFBZ
available, recommended
replacement:ISL22511WFRU10Z-TK)
50
-40 to +125
8 Ld SOIC
M8.15
ISL22511WFRU10Z-TK (Note 2)
GD
10
-40 to +125
10 Ld UTQFN Tape and Reel
L10.2.1x1.6A
GC
ISL22511UFRU10Z-TK (Note 2) (No
longer available, recommended
replacement:ISL22511WFRU10Z-TK)
50
-40 to +125
10 Ld UTQFN Tape and Reel
L10.2.1x1.6A
ISL22511WFB8Z* (Note 1)
PACKAGE
(Pb-Free)
PKG.
DWG. #
*Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu
plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pinouts
ISL22511
(10 LD UTQFN)
TOP VIEW
ISL22511
(8 LD SOIC)
TOP VIEW
1
8
VCC
PD
2
7
ASE
RH
3
6
RL
VSS
4
5
RW
PU
1
9
VCC
PD
2
8
ASE
RH
3
7
RL
VSS
4
6
RW
5
PU
O
10
NC
O
NC
Pin Descriptions
SOIC
PIN
UTQFN
PIN
SYMBOL
BRIEF DESCRIPTION
1
1
PU
The PU is a falling-edge triggered input with internal pull-up. Toggling PU will move the wiper close to RH terminal.
2
2
PD
The PD is a falling-edge triggered input with internal pull-up. Toggling PD will move the wiper close to RL terminal.
3
3
RH
The RH and RL pins of the ISL22511 are equivalent to the fixed terminals of a mechanical potentiometer. The
minimum voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position
of the terminal in relation to wiper movement direction selected by the PU/PD input.
4
4
VSS
Ground
5
6
RW
The RW pin is the wiper terminal of the potentiometer which is equivalent to the movable terminal of a mechanical
potentiometer.
6
7
RL
The RH and RL pins of the ISL22511 are equivalent to the fixed terminals of a mechanical potentiometer. The
minimum voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position
of the terminal in relation to wiper movement direction selected by the PU/PD input.
7
8
ASE
Active low AUTOSTORE enable input or Manual Store active low input.
8
9
VCC
Supply Voltage.
-
5, 10
NC
No connection.
2
FN6678.2
September 9, 2015
ISL22511
Block Diagrams
VCC (SUPPLY VOLTAGE)
PU
PD
5-BIT
UP/DOWN
COUNTER
RH
31
30
29
RH
PU
PD
CONTROL
AND
MEMORY
5-BIT
NONVOLATILE
MEMORY
RW
ASE
RL
ASE
STORE AND
CONTROL
RECALL
CIRCUITRY
28
ONE
OF
THIRTY
TWO
DECODER
TRANSFER
GATES
RESISTOR
ARRAY
RW
2
1
VSS (GROUND)
0
RL
GENERAL
3
DETAILED
FN6678.2
September 9, 2015
ISL22511
Absolute Maximum Ratings
Thermal Information
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage at PU and PD Pin with Respect to GND -0.3V to VCC + 0.3V
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Voltage at any DCP Pin with Respect to GND. . . . . . . . -0.3V to VCC
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Latchup . . . . . . . . . . . . . . . . . . . . . . . . . Class II, Level A @ +125°C
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
Thermal Resistance (Typical)
JA (°C/W)
JC (°C/W)
8 Lead SOIC (Note 3) . . . . . . . . . . . . .
125
N/A
10 Lead UTQFN (Notes 3, 4) . . . . . . . .
150
48.3
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature Range (Extended Industrial). . . . . . . .-40°C to +125°C
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15mW
Wiper Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3.0mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
3. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
4. JC is for the location in the center of the exposed metal pad on the package underside.
Potentiometer Specifications Over recommended operating conditions, unless otherwise specified.
SYMBOL
RTOTAL
PARAMETER
RH to RL Resistance
TEST CONDITIONS
VRH, VRL
CH/CL/CW
(Note 17)
ILkgDCP
TYP
(Note 5)
MAX
(Note 18)
UNIT
W option
10
k
U option
50
k
RH to RL Resistance Tolerance
RW
MIN
(Note 18)
-20
+20
%
End-to-End Temperature Coefficient W option
±80
ppm/°C
(Note 16)
U option
±125
ppm/°C
(Note 16)
Wiper Resistance
VCC = 3.3V, wiper current IRW = VCC/RTOTAL
130
VRH and VRL Terminal Voltages
VRH and VRL to GND
Noise on Wiper Terminal
From 0Hz to 10MHz
0
Potentiometer Capacitance
Leakage on DCP Pins
Voltage at pin from GND to VCC

400
VCC
V
-80
dBV
10/10/25
pF
0.05
0.4
µA
-1
1
LSB
(Note 6)
-0.5
0.5
LSB
(Note 6)
LSB
(Note 6)
VOLTAGE DIVIDER MODE (0V @ RL; VCC @ RH; measured at RW unloaded)
INL
(Note 10)
Integral Non-Linearity
DNL
(Note 9)
Differential Non-Linearity
ZSerror
(Note 7)
Zero-Scale Error
FSerror
(Note 8)
Full-Scale Error
TCV
(Note 11)
fCUTOFF
Monotonic over all tap positions
W option
0
0.1
2
U option
0
0.1
1
W option
-2
-0.1
0
U option
-1
-0.1
0
LSB
(Note 6)
Ratiometric Temperature Coefficient Wiper from 5 hex to 1F hex for W and U
option
±25
ppm/°C
3dB Cut-Off Frequency
Wiper at the middle scale, W option
500
kHz
Wiper at the middle scale, U option
75
kHz
RESISTOR MODE (Measurements between RW and RL with RH not connected, or between RW and RH with RL not connected)
RINL
(Note 15)
RDNL
(Note 14)
Integral Non-Linearity
Differential Non-Linearity
4
DCP register set between 1 hex and 1F hex;
monotonic over all tap positions; W option
-1.5
1.5
MI
(Note 12)
DCP register set between 1 hex and 1F hex;
monotonic over all tap positions; U option
-1
1
MI
(Note 12)
-0.5
0.5
MI
(Note 12)
W and U option
FN6678.2
September 9, 2015
ISL22511
Potentiometer Specifications Over recommended operating conditions, unless otherwise specified. (Continued)
SYMBOL
Roffset
(Note 13)
MIN
(Note 18)
TYP
(Note 5)
MAX
(Note 18)
W option
0
1
2
MI
(Note 12)
U option
0
0.5
1
MI
(Note 12)
PARAMETER
Offset
DC Electrical Specifications
SYMBOL
TEST CONDITIONS
UNIT
Over recommended operating conditions unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
(Note 18)
TYP
(Note 5)
MAX
(Note 18)
UNIT
ICC
VCC Active Current
VCC = 5.5V, perform wiper move
operation
150
µA
ICC
VCC Current During Store Operation
VCC = 5.5V, perform non-volatile
store operation
2
mA
ISB
Standby Current
3
µA
ILkg
PU, PD Input Leakage Current
+2
µA
VIH
PU, PD Input HIGH Voltage
0.6
VIL
PU, PD input LOW Voltage
CIN
(Note 17)
PU, PD Input Capacitance
Rpull_up
(Note 17)
Pull-Up Resistor for PU and PD
VIN = VSS to VCC
-2
VCC x 0.7
V
VCC x 0.1
VCC = 3.3V, TA = +25°C, f = 1MHz
V
10
pF
1
M
EEPROM SPECIFICATIONS
EEPROM Endurance
EEPROM Retention
5
Temperature 55°C
1,000,000
Cycles
50
Years
FN6678.2
September 9, 2015
ISL22511
AC Electrical Specifications
SYMBOL
Over recommended operating conditions unless otherwise specified.
PARAMETER
tGAP
Time Between Two Separate Push Button Events
tDB
Debounce Time
MIN
(Note 18)
TYP
(Note 5)
MAX
(Note 18)
UNIT
15
28
ms
2
ms
tS SLOW
Wiper Change on a Slow Mode
100
250
390
ms
tS FAST
Wiper Change on a Fast Mode
25
50
78
ms
tstdn
(Note 17)
tPU
tR VCC
Time to Enter Shutdown Mode (keep PU and PD LOW)
2
Power-Up to Wiper Stable
VCC Power-Up Rate
0.2
s
500
µs
50
V/ms
NOTES:
5. Typical values are for TA = +25°C and 3.3V supply voltage.
6. LSB: [V(RW)31 – V(RW)0]/31. V(RW)31 and V(RW)0 are voltage on RW pin for the DCP register set to 1F hex and 00 hex respectively. LSB is
the incremental voltage when changing from one tap to an adjacent tap.
7. ZS error = V(RW)0/LSB.
8. FS error = [V(RW)31 – VCC]/LSB.
9. DNL = [V(RW)i – V(RW)i-1]/LSB -1, for i = 1 to 31; i is the DCP register setting.
10. INL = [V(RW)i – i • LSB – V(RW)]/LSB for i = 1 to 31
Max  V  RW  i  – Min  V  RW  i 
10 6 -for i = 5 to 31 decimal, T = -40°C to +125°C. Max( ) is the maximum value of the wiper
11. TC = ---------------------------------------------------------------------------------------------  -------------------V
 Max  V  RW  i  + Min  V  RW  i    2 +165°C voltage and Min ( ) is the minimum value of the wiper voltage over the temperature range.
12. MI = |RW31 – RW0|/31. MI is a minimum increment. RW31 and RW0 are the measured resistances for the DCP register set to 1F hex and 00
hex respectively.
13. Roffset = RW0/MI, when measuring between RW and RL.
Roffset = RW31/MI, when measuring between RW and RH.
14. RDNL = (RWi – RWi-1)/MI, for i = 1 to 31.
15. RINL = [RWi – (MI • i) – RW0]/MI, for i = 1 to 31.
6 for i = 5 to 31, T = -40°C to +125°C. Max( ) is the maximum value of the resistance and Min ( ) is the
 Max  Ri  – Min  Ri  
10
TC R = ----------------------------------------------------------------  --------------------- minimum value of the resistance over the temperature range.
 Max  Ri  + Min  Ri    2 +165°C
17. Limits should be considered typical and are not production tested.
16.
18. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
Slow Mode Timing
tDB
tGAP
PU
MI*
VW
*MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage.
6
FN6678.2
September 9, 2015
ISL22511
Fast Mode Timing
tDB
PU
tS FAST
tS SLOW
MI*
VW
1s
* MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage.
Shutdown Mode Timing
tDB
2s
SHUTDOWN MODE
PU
PD
VW
AUTOSTORE Mode Timing
TDB
250ms
2s
20ms
PU
MEMORY WRITE
CYCLE
PD
(HIGH)
ASE
(LOW)
WIPER
POSITION
N
N+1
7
N+2
FN6678.2
September 9, 2015
ISL22511
Typical Performance Curves
160
3.0
VCC = 5.5V
+125°C
2.5
120
2.0
+25°C
100
ICC (µA)
WIPER RESISTANCE ()
140
80
60
VCC = 5.5V
VCC = 2.7V
1.0
-40°C
40
0.5
20
0
1.5
0
5
10
15
20
25
0
-40
30
-15
10
TAP POSITION (DECIMAL)
35
60
85
110
TEMPERATURE (°C)
FIGURE 1. WIPER RESISTANCE vs TAP POSITION
[ I(RW) = VCC/RTOTAL ] FOR 10k (W)
FIGURE 2. STANDBY ICC vs TEMPERATURE
0.010
0.03
VCC = 2.7V
VCC = 2.7V
0.02
0.01
INL (LSB)
DNL (LSB)
0.005
0.000
0.00
-0.01
-0.005
VCC = 5.5V
-0.02
VCC = 5.5V
-0.010
0
5
10
15
20
25
-0.03
30
0
5
TAP POSITION (DECIMAL)
FIGURE 3. DNL vs TAP POSITION IN VOLTAGE DIVIDER
MODE FOR 10k (W)
20
25
30
0
0.005
0.004
VCC = 5.5V
0.003
VCC = 2.7V
0.002
0.001
-15
10
35
60
85
TEMPERATURE (°C)
FIGURE 5. ZS ERROR vs TEMPERATURE
8
110
FULL SCALE ERROR (LSB)
ZERO SCALE ERROR (LSB)
15
FIGURE 4. INL vs TAP POSITION IN VOLTAGE DIVIDER
MODE FOR 10k (W)
0.006
0
-40
10
TAP POSITION (DECIMAL)
VCC = 5.5V
-0.1
-0.2
-0.3
-0.4
VCC = 2.7V
-0.5
-40
-15
10
35
60
85
110
TEMPERATURE (°C)
FIGURE 6. FS ERROR vs TEMPERATURE
FN6678.2
September 9, 2015
ISL22511
Typical Performance Curves
(Continued)
0.2
0.8
VCC = 2.7V
VCC = 2.7V
0.6
RINL (LSB)
RDNL (LSB)
0.1
0.0
-0.1
-0.2
5
10
VCC = 5.5V
0.2
VCC = 5.5V
0
0.4
15
20
25
0.0
30
0
5
TAP POSITION (DECIMAL)
15
20
25
FIGURE 8. INL vs TAP POSITION IN RHEOSTAT MODE FOR
10k (W)
40
1.20
VCC = 5.5V
30
TCv (ppm/°C)
10k
0.00
VCC = 2.7V
25
VCC = 5.5V
15
50k
5
0
-15
VCC = 2.7V
20
10
50k
-1.20
-40
10k
35
0.60
-0.60
30
TAP POSITION (DECIMAL)
FIGURE 7. DNL vs TAP POSITION IN RHEOSTAT MODE FOR
10k (W)
RTOTAL CHANGE (%)
10
10
35
60
85
110
TEMPERATURE (°C)
5
10
15
20
25
30
TAP POSITION (DECIMAL)
FIGURE 10. TC FOR VOLTAGE DIVIDER MODE IN ppm
FIGURE 9. END TO END RTOTAL % CHANGE vs
TEMPERATURE
300
INPUT SINEWAVE
250
TCr (ppm/°C)
50k
200
VCC = 5.5V
150
10k
100
MIDSCALE
OUTPUT
VCC = 2.7V
50
0
5
10
3dB CUT-OFF = 500kHz
15
20
25
30
TAP POSITION (DECIMAL)
FIGURE 11. TC FOR RHEOSTAT MODE IN ppm
9
FIGURE 12. FREQUENCY RESPONSE (500kHz)
FN6678.2
September 9, 2015
ISL22511
Power-Up and Down Requirements
There are no restrictions on the power-up or power-down
conditions of VCC and the voltages applied to the
potentiometer pins provided that VCC is always more
positive than or equal to VRH and VRL, i.e., VCC  VRH,VRL.
The VCC ramp rate specification is always in effect.
Pin Descriptions
RH and RL
The RH and RL pins of the ISL22511 are equivalent to the
fixed terminals of a mechanical potentiometer. The minimum
voltage is VSS and the maximum is VCC. The terminology of
RH and RL references the relative position of the terminal in
relation to wiper movement direction.
RW
The RW pin is the wiper terminal of the potentiometer which
is equivalent to the movable terminal of a mechanical
potentiometer.
PU
The debounced PU input is used to increment the wiper
position. An on-chip pull-up holds the PU input HIGH. A
switch closure to ground or a LOW logic level will, after a
debounce time, move the wiper to the next adjacent higher
tap position.
PD
The debounced PD input is used to decrement the wiper
position. An on-chip pull-up holds the PD input HIGH. A
switch closure to ground or a LOW logic level will, after a
debounce time, move the wiper to the next adjacent lower
tap position.
ASE
The debounced ASE (AUTOSTORE enable) pin can be in
one of two states:
1. AUTOSTORE is enabled if ASE is held LOW during
power up.
2. AUTOSTORE is disabled if ASE is held HIGH during
power-up. A LOW to HIGH transition will initiate a manual
store operation. This is for the user who wishes to
connect a push button switch to this pin. For every valid
push, the ISL22511 will store the current wiper position to
the EEPROM.
Device Operation
There are three sections of the ISL22511: the input control,
counter and decode section; the EEPROM memory; and the
resistor array. The input control section operates just like an
up/down counter. The output of this counter is decoded to
turn on a single electronic switch, connecting a point on the
resistor array to the wiper output. Under the proper
conditions, the contents of the counter can be stored in
EEPROM memory and retained for future use. The resistor
10
array is comprised of 31 individual resistors connected in
series. At either end of the array and between each resistor
is an electronic switch that transfers the potential at that
point to the wiper.
The ISL22511 is designed to interface directly to two push
button switches for effectively moving the wiper up or down.
The PU and PD inputs increment or decrement a 5-bit
counter respectively. The output of this counter is decoded to
select one of the thirty-two wiper positions along the resistive
array. The wiper increment input, PU and the wiper
decrement input, PD are both connected to an internal
pull-up so that they normally remain HIGH. When pulled
LOW by an external push button switch or a logic LOW level
input, the wiper will be switched to the next adjacent tap
position.
Internal debounce circuitry prevents inadvertent switching of
the wiper position if PU or PD remain LOW for less than
15ms, typical. Each of the buttons can be pushed either
once for a single increment/decrement or continuously for a
multiple increments/decrements. The number of
increments/decrements of the wiper position depends on
how long the button is being pushed. When making a
continuous push, after the first second, the
increment/decrement speed increases. For the first second,
the device will be in the slow scan mode. Then, if the button
is held for longer than 1 second, the device will go into the
fast scan mode. As soon as the button is released, the
ISL22511 will return to a standby condition.
If two or more buttons are pressed simultaneously, all
commands are ignored upon release of ALL buttons, except
Shutdown Mode condition.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
AUTOSTORE
The value of the counter is stored in EEPROM memory after
2 seconds of no activity on PU or PD inputs while ASE is
enabled (held LOW). When power is restored, the content of
the memory is recalled and the counter resets to the last
value stored.
If AUTOSTORE is to be implemented, ASE is typically hard
wired to VSS. If ASE is held HIGH during power-up and then
taken LOW, the wiper will not respond to the PU or PD inputs
until ASE is brought HIGH and held HIGH.
Manual (Push Button) Store
When ASE is not enabled (held HIGH), a push button switch
may be used to pull ASE LOW for more than 15ms and
released to perform a manual store of the wiper position.
During memory write cycle all inputs will be ignored.
FN6678.2
September 9, 2015
ISL22511
Shutdown Mode
The ISL22511 enters into Shutdown Mode if both PU and PD
inputs are kept LOW for 2 seconds. In this mode, the
resistors array is totally disconnected from its RH pin and the
wiper is moved to position closest to RL pin, as shown in
Figure 13. Note, that PU and PD inputs must be pulled LOW
within tDB time window of 15ms, see “Shutdown Mode
Timing” on page 7. Otherwise all command will be ignored till
both inputs will be released.
Holding either PU, PD or ASE input LOW for more than
15ms will exit shutdown mode and return wiper to prior
shutdown position. If PU or PD will be held LOW for more
than 250ms, the ISL22511 will start auto-increment or
auto-decrement of wiper position.
RTOTAL with VCC Removed
The end to end resistance of the array will fluctuate once
VCC is removed.
RH
RW
RL
FIGURE 13. DCP CONNECTION IN SHUTDOWN MODE
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make
sure that you have the latest revision.
DATE
REVISION
CHANGE
September 9, 2015
FN6678.1
- Ordering Information Table on page 2.
- Added About Intersil Verbiage.
- Updated POD L10.2.1X1.6A to latest revision changes are as follow:
Updated to new POD format by removing table listing dimensions and moving dimensions onto drawing.
Added Typical Recommended Land Pattern. Removed package option.
- Updated POD M8.15 to latest revision changes are as follow:
Changed Note 1 "1982" to "1994"
Changed in Typical Recommended Land Pattern the following:
2.41(0.095) to 2.20(0.087)
0.76 (0.030) to 0.60(0.023)
0.200 to 5.20(0.205)
Updated to new POD format by removing table and moving dimensions onto drawing and adding land
pattern.
07/06/09
FN6678.1
Added reliability information on page 1 under Features and EEPROM Specifications in DC Electrical Spec
Table.
03/24/08
FN6678.0
Initial Release to web
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11
FN6678.2
September 9, 2015
ISL22511
Package Outline Drawing
L10.2.1x1.6A
10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 5, 3/10
8.
PIN 1
INDEX AREA
2.10
A
B
PIN #1 ID
1
0.05 MIN.
1
8.
4
4X 0.20 MIN.
1.60
0.10 MIN.
10
5
0.80
10X 0.40
0.10
6
9
2X
6X 0.50
10 X 0.20 4
TOP VIEW
0.10 M C A B
M C
BOTTOM VIEW
(10 X 0.20)
SEE DETAIL "X"
(0.05 MIN)
PACKAGE
OUTLINE
1
MAX. 0.55
0.10 C
(10X 0.60)
C
(0.10 MIN.)
(2.00)
SEATING PLANE
0.08 C
SIDE VIEW
(0.80)
(1.30)
C
0 . 125 REF
(6X 0.50 )
(2.50)
0-0.05
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
12
1.
Dimensioning and tolerancing conform to ASME Y14.5M-1994.
2.
All Dimensions are in millimeters. Angles are in degrees.
Dimensions in ( ) for Reference Only.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Lead width dimension applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5.
Maximum package warpage is 0.05mm.
6.
Maximum allowable burrs is 0.076mm in all directions.
7.
Same as JEDEC MO-255UABD except:
No lead-pull-back, MIN. Package thickness = 0.45 not 0.50mm
Lead Length dim. = 0.45mm max. not 0.42mm.
8.
The configuration of the pin #1 identifier is optional, but must be located within
the zone indicated. The pin #1 identifier may be either a mold or mark feature.
FN6678.2
September 9, 2015
ISL22511
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 1/12
DETAIL "A"
1.27 (0.050)
0.40 (0.016)
INDEX
6.20 (0.244)
5.80 (0.228)
AREA
0.50 (0.20)
x 45°
0.25 (0.01)
4.00 (0.157)
3.80 (0.150)
1
2
8°
0°
3
0.25 (0.010)
0.19 (0.008)
SIDE VIEW “B”
TOP VIEW
2.20 (0.087)
SEATING PLANE
5.00 (0.197)
4.80 (0.189)
1.75 (0.069)
1.35 (0.053)
1
8
2
7
0.60 (0.023)
1.27 (0.050)
3
6
4
5
-C-
1.27 (0.050)
0.51(0.020)
0.33(0.013)
SIDE VIEW “A
0.25(0.010)
0.10(0.004)
5.20(0.205)
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1994.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the
seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
13
FN6678.2
September 9, 2015
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