DATASHEET

X9116
®
Low Noise, Low Power, Low Cost
Data Sheet
February 3, 2011
Digitally Controlled Potentiometer
(XDCP™)
Features
The Intersil X9116 is a digitally controlled nonvolatile
potentiometer designed to be used in trimmer applications.
The pot consists of 15 equal resistor segments that connect
to the wiper pin through programmable CMOS switches. The
tap position is programmed through a 3-wire up/down serial
port. The last position of the wiper is stored in a nonvolatile
memory location which is recalled at the time of power up of
the device.
• 16 wiper taps
FN8160.3
• Solid-state nonvolatile
• 3-wire up/down serial interface
• VCC = 2.7V and 5V
• Active current < 50µA max.
• Standby current < 5µA max.
• RTOTAL = 10kΩ
The wiper moves through sequential tap positions with
inputs on the serial port. A falling edge on INC (bar) causes
the tap position to increment one position up or down based
on whether the U/D (bar) pin is held high or low.
• Packages: 8 Ld MSOP, 8 Ld SOIC
• Pb-free plus anneal available (RoHS compliant)
Pinout
SOIC/MSOP
The X9116 can be used in many applications requiring a
variable resistance. In many cases it can replace a
mechanical trimmer and offers many advantages such as
temperature and time stability as well as the reliability of a
solid state solution.
INC
1
U/D
2
VH/RH
3
V SS
4
X9116
8
VCC
7
CS
6
VL/RL
5
VW/RW
Block Diagram
VCC (Supply Voltage)
RH/VH
Up/Down
(U/D)
Increment
(INC)
Control
and
Memory
RW/VW
Device Select
(CS)
RL/VL
RW-RL Resistance
VSS (Ground)
15
RH
General
14
13
*
3
2
1
RL
1
0
10kΩ
9.34kΩ
8.68kΩ
* kΩ
2.08kΩ
1.42kΩ
760Ω
100Ω
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2005-2006, 2011. All Rights Reserved
Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
X9116
Ordering Information
PART NUMBER
(BRAND) (Notes 1, 2, 3)
PART MARKING
VCC LIMITS
(V)
RTOTAL
(kΩ)
TEMP. RANGE
(°C)
5V ±10%
10
0 to +70
8 Ld MSOP
M8.118
-40 to +85
8 Ld MSOP
M8.118
PACKAGE
(Pb-free)
PKG.
DWG. #
X9116WM8Z
AKY
X9116WM8IZ
DCG
X9116WS8Z
X9116W Z
0 to +70
8 Ld SOIC
M8.15
X9116WS8IZ
X9116W ZI
-40 to +85
8 Ld SOIC
M8.15
X9116WM8Z-2.7
AOJ
0 to +70
8 Ld MSOP
M8.118
X9116WM8IZ-2.7
AKS
-40 to +85
8 Ld MSOP
M8.118
X9116WS8Z-2.7
X9116W ZF
0 to +70
8 Ld SOIC
M8.15
X9116WS8IZ-2.7
X9116W G
-40 to +85
8 Ld SOIC
M8.15
2.7-5.5
NOTES:
1. Add “T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for X9116. For more information on MSL please see techbrief TB363.
Pin Descriptions
Pin Descriptions
VH /RH and VL /RL
SYMBOL
The high (VH/RH) and low (VL/RL) terminals of the X9116
are equivalent to the fixed terminals of a mechanical
potentiometer. The minimum voltage is VSS and the
maximum is VCC.
DESCRIPTION
VH/RH
High Terminal
VW/RW
Wiper Terminal
VL/RL
Low Terminal
VW/RW
VSS
Ground
Rw/Rw is the wiper terminal and is equivalent to the movable
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the control inputs.
The wiper terminal series resistance is typically 200Ω to
400Ω depending upon VCC.
VCC
Supply Voltage
U/D
Up/Down Control Input
INC
Increment Control Input
CS
Chip Select Input
Up/Down (U/D)
The U/D input controls the direction of the wiper movement
and whether the counter is incremented (up) or decremented
(down).
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
counter in the direction indicated by the logic level on the
U/D input.
Chip Select (CS)
The device is selected when the CS input is LOW. The
current counter value is stored in nonvolatile memory when
CS is returned HIGH while the INC input is also HIGH. After
the store operation is complete the X9116 will be placed in
the low power standby mode until the device is selected
once again.
2
FN8160.3
February 3, 2011
X9116
Principles of Operation
There are three sections of the X9116: the input control,
counter and decode section; the nonvolatile memory; and
the resistor array. The input control section operates just like
an up/down counter. The output of this counter is decoded to
turn on a single electronic switch connecting a point on the
resistor array to the wiper output. Under the proper
conditions the contents of the counter can be stored in
nonvolatile memory and retained for future use. The resistor
array is comprised of 15 individual resistors connected in
series. At either end of the array and between each resistor
is an electronic switch that transfers the potential at that
point to the wiper pin.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
The electronic switches on the device operate in a “make
before break” mode when the wiper changes tap positions. If
the wiper is moved several positions, multiple taps are
connected to the wiper for tIW (INC to VW change). The
RTOTAL value for the device can temporarily be reduced by
a significant amount if the wiper is moved several positions.
When the device is powered-down, the last wiper position
stored will be maintained in the nonvolatile memory. When
power is restored, the contents of the memory are recalled
and the wiper is set to the value last stored.
Instructions and Programming
The INC, U/D and CS inputs control the movement of the
wiper along the resistor array. With CS set LOW, the device
is selected and enabled to respond to the U/D and INC
inputs. HIGH to LOW transitions on INC will increment or
decrement (depending on the state of the U/D input) a four
bit counter. The output of this counter is decoded to select
one of 16 wiper positions along the resistive array.
This procedure allows the system to always power-up to a
preset value stored in nonvolatile memory; then during
system operation, minor adjustments could be made. The
adjustments might be based on user preference, system
parameter changes due to temperature drift, etc.
The state of U/D may be changed while CS remains LOW.
This allows the host system to enable the device and then
move the wiper up and down until the proper trim is attained.
Mode Selection
CS
INC
U/D
MODE
L
H
Wiper Up
L
L
Wiper Down
H
X
Store Wiper Position
X
X
Standby Current
L
X
No Store, Return to Standby
H
Symbol Table
WAVEFORM
INPUTS
OUTPUTS
Must be
steady
Will be
steady
May change
from Low to
High
Will change
from Low to
High
May change
from High to
Low
Will change
from High to
Low
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A
Center Line
is High
Impedance
The value of the counter is stored in nonvolatile memory
whenever CS transitions HIGH while the INC input is also
HIGH.
The system may select the X9116, move the wiper, and
deselect the device without having to store the latest wiper
position in nonvolatile memory. After the wiper movement is
performed as described above and once the new position is
reached, the system must keep INC LOW while taking CS
HIGH. The new wiper position will be maintained until
changed by the system or until a power-up/down cycle
recalls the previously stored data.
3
FN8160.3
February 3, 2011
X9116
Absolute Maximum Ratings
Recommended Operating Conditions
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on CS, INC, U/D, VH/RH, VL/RL
and VCC with Respect to VSS . . . . . . . . . . . . . . . . . . . -1V to +7V
ΔV = |VH/RH-VL/RL| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
IW (10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±10.0mA
Temperature Range
Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage (VCC) Limits
X9116 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ± 10%
X9116-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
Potentiometer Specifications Over recommended operating conditions unless otherwise stated. Boldface limits apply over the operating
temperature range, -40°C to +85°C or 0°C to +70°C.
SYMBOL
RTOTAL
PARAMETER
TEST CONDITIONS/NOTES
End to end resistance variation
MIN
(Note 10)
MAX
(Note 10)
UNIT
-20
+20
%
TYP
VVH
VH/RH terminal voltage
VSS = 0V
VSS
VCC
V
VVL
VL/RL terminal voltage
VSS = 0V
VSS
VCC
V
Power rating
RTOTAL = 10kΩ
10
mW
RW
Wiper resistance
IW = 1mA, VCC = 5V
200
400
Ω
RW
Wiper resistance
IW = 1mA, VCC = 2.7V
400
1000
Ω
IW
Wiper current
+5.0
mA
-5.0
Noise
Ref: 1kHz
Resolution
CH/CL/CW
Absolute linearity (Note 4)
Vw(n)(actual) - Vw(n)(expected)
Relative linearity (Note 5)
Vw(n+1) - [Vw(n) + MI]
-120
dBV
6
%
-1
+1
MI (Note 6)
-0.2
+0.2
MI (Note 6)
RTOTAL temperature coefficient
±300
ppm/°C
Ratiometric temperature coefficient
±20
ppm/°C
10/10/25
pF
Potentiometer capacitances
See “Circuit #3 SPICE Macro Model”
on page 5
NOTES:
4. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (Vw(n)(actual) - Vw(n)(expected)) = ±1 Ml Maximum.
5. Relative linearity is a measure of the error in step size between taps = VW(n+1 ) -[Vw(n) + Ml] = ±0.2 Ml.
6. 1 Ml = Minimum Increment = RTOT/15.
4
FN8160.3
February 3, 2011
X9116
DC Electrical Specifications Over recommended operating conditions unless otherwise specified. Boldface limits apply over the
operating temperature range, -40°C to +85°C or 0°C to +70°C.
SYMBOL
PARAMETER
MIN
TYP
MAX
(Note 10) (Note 7) (Note 10) UNIT
TEST CONDITIONS
ICC1
VCC active current (Increment)
CS = VIL, U/D = VIL or VIH and
INC = 0.4V/2.4V @ max tCYC
150
µA
ICC2
VCC active current (Store) (EEPROM Store)
CS = VIH, U/D = VIL or VIH and
INC = VIH @ max tWR
400
µA
ISB
Standby supply current
CS = VCC – 0.3V, U/D and INC = VSS or
VCC – 0.3V
5
µA
ILI
CS, INC, U/D input leakage current
VIN = VSS to VCC
±10
µA
VIH
CS, INC, U/D input HIGH voltage
2V
VCC + 0.5
V
VIL
CS, INC, U/D input LOW voltage
-0.5
0.8
V
CIN
CS, INC, U/D input capacitance
VCC = 5V, VIN = VSS, TA = +25°C,
f = 1MHz
10
pF
NOTES:
7. Typical values are for TA = +25°C and nominal supply voltage.
Endurance and Data Retention
PARAMETER
MIN
UNIT
Minimum endurance
100,000
Data changes per bit
Data retention
100
Years
Test Circuit #1
Test Circuit #2
Circuit #3 SPICE Macro Model
VH/RH
VH/RH
RTOTAL
RH
VS
Test Point
VW/RW
VWVW
/RW
V L /RL
VL/RL
CH
Test Point
Force
Current
CW
CL
RL
10pF
25pF
10pF
RW
A.C. Conditions of Test
Input pulse levels
0V to 3V
Input rise and fall times
10ns
Input reference levels
1.5V
5
FN8160.3
February 3, 2011
X9116
DC Electrical Specifications Over recommended operating conditions unless otherwise specified. Boldface limits apply over the
operating temperature range, -40°C to +85°C or 0°C to +70°C.
SYMBOL
MIN
(Note 10)
PARAMETER
TYP
(NOTE 8)
MAX
(Note 10)
UNIT
tCl
CS to INC setup
100
ns
tlD
INC HIGH to U/D change
100
ns
tDI
U/D to INC setup
2.9
µs
tlL
INC LOW period
1
µs
tlH
INC HIGH period
1
µs
tlC
INC inactive to CS inactive
1
µs
tCPH
CS deselect time (STORE)
10
ms
INC to Vw change
tIW
1
tCYC
INC cycle time
tR , t F
INC input rise and fall time
5
4
µs
Power up to wiper stable
tPU
tR VCC
tWR
µs
VCC Power-up rate
15
Store cycle
5
500
µs
5
µs
50
mV/µs
10
ms
Power Up and Down Requirements
There are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the potentiometer pins
provided that VCC is always more positive than or equal to VH, VL, and VW, i.e., VCC ≥ VH, VL, VW. The VCC ramp rate spec is
always in effect.
A.C. Timing
CS
tCYC
tCI
tIL
(store)
tIC
tIH
tCPH
90%
INC
tID
tDI
90%
10%
tF
tR
U/D
tIW
MI
VW
(NOTE 9)
NOTES:
8. Typical values are for TA = +25°C and nominal supply voltage.
9. MI in the A.C. timing diagram refers to the minimum incremental change in the VW output due to a change in the wiper position.
10. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
6
FN8160.3
February 3, 2011
X9116
Basic Configurations of Electronic Potentiometers
VR
VR
VH
VW/RW
VL
I
THREE-TERMINAL POTENTIOMETER;
VARIABLE VOLTAGE DIVIDER
TWO-TERMINAL VARIABLE RESISTOR;
VARIABLE CURRENT
Basic Circuits
BUFFERED REFERENCE VOLTAGE
R1
+V
+V
NONINVERTING AMPLIFIER
CASCADING TECHNIQUES
+5V
+V
VS
+5V
VREF
VW
VOUT
–
-5V
X
VW/RW
R2
+V
–5V
R1
VOUT = VW/RW
VW
(a)
VOLTAGE REGULATOR
VIN
VO
–
OP-07
+
LM308A
+
VO = (1+R2/R1)VS
COMPARATOR WITH HYSTERESIS
VO (REG)
317
(b)
VS
LT311A
R1
–
+
VO
Iadj
}
VO (REG) = 1.25V (1+R2/R1)+Iadj R2
}
R2
R1
R2
VUL = {R1/(R1+R2)} VO(max)
VLL = {R1/(R1+R2)} VO(min)
(FOR ADDITIONAL CIRCUITS, SEE AN115)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
7
FN8160.3
February 3, 2011
X9116
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 2, 11/10
DETAIL "A"
1.27 (0.050)
0.40 (0.016)
INDEX
6.20 (0.244)
5.80 (0.228)
AREA
0.50 (0.20)
x 45°
0.25 (0.01)
4.00 (0.157)
3.80 (0.150)
1
2
8°
0°
3
0.25 (0.010)
0.19 (0.008)
SIDE VIEW “B”
TOP VIEW
2.41 (0.095)
SEATING PLANE
5.00 (0.197)
4.80 (0.189)
1.75 (0.069)
1.35 (0.053)
1
8
2
7
0.76 (0.030)
1.27 (0.050)
3
6
4
5
-C-
1.27 (0.050)
0.51(0.020)
0.33(0.013)
SIDE VIEW “A
0.25(0.010)
0.10(0.004)
0.200
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
8
FN8160.3
February 3, 2011
X9116
Package Outline Drawing
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 3, 3/10
5
3.0±0.05
A
DETAIL "X"
D
8
1.10 MAX
SIDE VIEW 2
0.09 - 0.20
4.9±0.15
3.0±0.05
5
0.95 REF
PIN# 1 ID
1
2
B
0.65 BSC
GAUGE
PLANE
TOP VIEW
0.55 ± 0.15
0.25
3°±3°
0.85±010
H
DETAIL "X"
C
SEATING PLANE
0.25 - 0.036
0.08 M C A-B D
0.10 ± 0.05
0.10 C
SIDE VIEW 1
(5.80)
NOTES:
(4.40)
(3.00)
1. Dimensions are in millimeters.
(0.65)
(0.40)
(1.40)
TYPICAL RECOMMENDED LAND PATTERN
9
2. Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
FN8160.3
February 3, 2011
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