KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL Schematic J3 OVDD2 R7 10K AVDD3 1 2 3 4 5 6 50 11 12 57 56 55 54 53 52 D9P D9N D8P D8N D7P D7N D4P D4N CLOCKOUTP CLOCKOUTN 45 44 43 42 41 OVDD2 D3P D3N D2P D2N 40 39 38 37 36 35 D1P D1N D0P D0N 0 DNP 18 19 20 CLKDIV D5P D5N 51 50 49 48 47 46 D0N D0P 17 CLKDIV 63 62 AVDD2 AVDD3 AVDD3 JP2 1 2 D3P D3N D2P D2N D1P D1N DNC 14 15 16 JP3 jumper on to 61 60 59 58 DNC DNC 13 SMA D6P D6N 33 34 C3 .01uF DNC DNC DNC DNC 4 ADT1-1WT RST 3 D7P D7N OGND OVDD2 CLOCKOUTP CLOCKOUTN OVDD2 29 30 31 R10 0 DNP 32 4 ADT1-1WT .01uF KAD2710 AGND INP INN AGND dig_1.8V R9 SC0 SD0 AVDD2 AVDD3 R5 10K WP R4 1K 0.9V nominal 2SC SD0 SC0 SD2 SC2 RST R3 1K T3 CLKP Active low reset Di ith C11 J2 R2 200 C2 50 Ohms transmission line "CLOCK IN" 1000pF 200pF CKLN TC4-1W SMA dig_1.8V AVDD2 AVDD3 C4 C8 C10 C6 C9 C13 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C12 C15 C14 0.1uF 0.1uF 0.1uF 1 2 3 4 U2 A0 Vcc A1 WP A2 SCL Vss SDA 24LC64A 8 7 6 5 WP 4.7K DNP C16 0.1uF DNP Eng. Test Only DNP OVDD2 R6 dig_1.8V 4.7K DNP 3 7 8 9 10 R1 2 C1 "ANALOG INPUT" AVDD3 6 28 T2 2 50 Ohms t ransmission line J1 1 OGND OVDD2 6 AVDD3 T1 R8 1 D8P D8N D6P D6N D5P D5N D4P D4N U1 26 27 VCM VREF VREFSEL VCM 25 VREFSEL AGND CLKP CLKN AGND VREF AVDD2 AGND AVDD2 AGND AVDD2 1 2 OGND OVDD2 ORP ORN JP3 2SC DNC OVDD2 OVDD2 OVDD2 GND_paddle JP3 jumper on for internal reference DNC DNC 0 C5 0.1uF 68 67 66 65 64 1 2 D9P D9N 2SC AVDD2 21 22 23 24 JP1 ORP ORN Daughterboard ID EEPROM 1 2 3 4 A0 A1 A2 Vss U3 Vcc 24LC32A Note: AGND connected to OGND under U1 C7 0.1uF WP SCL SDA 8 7 6 5 WP SC2 SD2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 1 dig_1.8V OVDD2 AVDD2 AVDD3 53475-1879 Title Size FIGURE 1. ENTIRE DAUGHTER CARD SCHEMATIC 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 B Number SCH KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL Layers FIGURE 2. PRIMARY SIDE 2 KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL Layers (Continued) FIGURE 3. INTERNAL GROUND PLANE 3 KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL Layers (Continued) FIGURE 4. INTERNAL POWER PLANE 4 KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL Layers (Continued) FIGURE 5. SECONDARY SIDE 5 KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL Layers (Continued) FIGURE 6. PRIMARY SIDE SILKSCREEN 6 KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL KDC2710LEVAL, KDC2710CEVAL, KDC2708LEVAL, KDC2708CEVAL Layers (Continued) FIGURE 7. SECONDARY SIDE SILKSCREEN Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 7