A1152-F, A1153-F, A1155-F, および A1156-F データシート

A1152-F, A1153-F, A1155-F, and A1156-F
Chopper-Stabilized, Two-Wire
Hall-Effect Switches
Description
Features and Benefits
▪AEC-Q100 automotive qualified
▪Factory-set temperature coefficient (TC) for use with
ferrite magnets
▪High-speed, 4-phase chopper stabilization
▪Low switchpoint drift throughout temperature range
▪Low sensitivity to thermal and mechanical stresses
▪On-chip protection
▫Supply transient protection
▫Reverse-battery protection
▫On-board voltage regulator
▫3 to 24 V operation
▪Solid-state reliability
The A1152-F, A1153-F, A1155-F, and A1156-F comprise a
family of two-wire, unipolar, Hall-effect switches, which are
factory-trimmed to optimize magnetic switchpoint accuracy.
These devices are produced on the Allegro™ advanced
BiCMOS wafer fabrication process, which implements a
patented high-frequency, 4-phase, chopper stabilization
technique. This technique achieves magnetic stability over
the full operating temperature range, and eliminates offsets
inherent in devices with a single Hall element that are exposed
to harsh application environments.
The A115x family has a number of automotive applications.
These include sensing seat track position, seat belt buckle
presence, hood/trunk latching, and shift selector position.
Continued on the next page…
Two-wire unipolar switches are particularly advantageous in
cost-sensitive applications because they require one less wire
for operation versus the more traditional open-collector output
switches. Additionally, the system designer inherently gains
diagnostics because there is always output current flowing,
which should be in either of two narrow ranges. Any current
level not within these ranges indicates a fault condition.
Packages: 2-Pin, Ultra-Mini SIP (suffix UB)
1.5 mm × 4 mm × 4 mm
Continued on the next page…
Not to scale
Functional Block Diagram
0.1 µF
VCC
Regulator
To all subcircuits
Amp
Sample and Hold
Dynamic Offset
Cancellation
Clock/Logic
Low-Pass
Filter
Schmitt
Trigger
Polarity
GND
A1152-F-DS, Rev. 2
Chopper-Stabilized, Two-Wire
Hall-Effect Switches
A1152-F, A1153-F,
A1155-F, and A1156-F
Features and Benefits (continued)
▪Robust EMC and ESD performance
▪Industry-leading ISO 7637-2 performance through use of
proprietary, 40 V clamping structures
▪Extended Operating Ambient temperature range,
–40°C to 150°C
▪UB package with integrated 0.1 µF bypass capacitor
Description (continued)
The UB is a 2-pin, ultra-mini, single inline package (SIP) for
through-hole mounting, and it is lead (Pb) free, with 100% mattetin leadframe plating.
Selection Guide
Part Number
Packing
Package
Output (ICC) in
South Polarity
Field
Supply Current
at ICC(L)
(mA)
Magnetic Operate
Point, BOP,
at TA = 25°C
(G)
A1152LUBTN-F-T
13-in. reel, 4000 pieces/reel
2-pin SIP through-hole
Low
5 to 6.9
58 to 100
A1153LUBTN-F-T
13-in. reel, 4000 pieces/reel
2-pin SIP through-hole
High
5 to 6.9
58 to 100
A1155LUBTN-F-T
13-in. reel, 4000 pieces/reel
2-pin SIP through-hole
Low
5 to 6.9
16 to 60
A1156LUBTN-F-T
13-in. reel, 4000 pieces/reel
2-pin SIP through-hole
High
5 to 6.9
16 to 60
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
Chopper-Stabilized, Two-Wire
Hall-Effect Switches
A1152-F, A1153-F,
A1155-F, and A1156-F
Absolute Maximum Ratings
Characteristic
Symbol
Notes
Rating
Unit
28
V
Forward Supply Voltage
VCC
Reverse Supply Voltage
VRCC
–18
V
B
Unlimited
G
Magnetic Flux Density
Operating Ambient Temperature
TA
–40 to 150
ºC
Maximum Junction Temperature
TJ(max)
165
ºC
Tstg
–65 to 170
ºC
Rating
Unit
2200
pF
Storage Temperature
Range L
Internal Discrete Capacitor Ratings
Characteristic
Symbol
Rated Normal Capacitance
CSUPPLY
Rated Voltage
VCSUPPLY
Notes
Connected between VCC and GND
50
V
Rated Capacitor Tolerance
±10
%
Temperature Designator
X8R
–
Pin-Out Diagram
Terminal List Table
Number
1
Name
Function
1
VCC
Input power supply
2
GND
Ground terminal
2
UB Package
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
Chopper-Stabilized, Two-Wire
Hall-Effect Switches
A1152-F, A1153-F,
A1155-F, and A1156-F
ELECTRICAL CHARACTERISTICS: Valid at TA = –40°C to 150°C, TJ < TJ(max), CBYP = 0.01 µF (excluding UB), through
operating supply voltage range, unless otherwise noted
Characteristics
Supply
Voltage1,2
Symbol
VCC
ICC(L)
Supply Current
ICC(H)
Test Conditions
Operating, TJ ≤ 165 °C
A1152, A1155
B > BOP
A1153, A1156
B < BRP
A1152, A1155
B < BRP
A1153, A1156
B > BOP
Min.
Typ.
Max.
Unit
3.0
–
24
V
5
–
6.9
mA
12
–
17
mA
Supply Zener Clamp Voltage
VZ(sup)
ICC(L)(max) + 3 mA, TA = 25°C
28
–
–
V
Supply Zener Clamp Current
IZ(sup)
VZ(sup) = 28 V
–
–
ICC(L)(max)
+ 3 mA
mA
Reverse Supply Current
IRCC
VRCC = –18 V
–
–
–1.6
mA
di/dt
Integrated bypass capacitor, capacitance of
probe CS = 20 pF
–
0.22
–
mA / µs
–
700
–
kHz
–
–
25
µs
–
ICC(H)
–
–
Output Slew Rate3
Chopping Frequency
Power-Up Time4,5
Power-Up State2,4,6,7
fc
ton
POS
A1152, A1155
B > BOP + 10 G
A1153, A1156
B < BRP – 10 G
ton < ton(max) , VCC slew rate > 25 mV / µs
1V
CC
2 The
represents the generated voltage between the VCC pin and the GND pin.
VCC slew rate must exceed 600 mV/ms from 0 to 3 V. A slower slew rate through this range can affect device performance.
3 Measured without bypass capacitor between VCC and GND. Use of a bypass capacitor results in slower current change.
4 Power-Up Time is measured without and with bypass capacitor of 0.01 µF. Adding a larger bypass capacitor would cause longer Power-Up Time.
5 Guaranteed by characterization and design.
6 Power-Up State as defined is true only with a V
CC slew rate of 25 mV / µs or greater.
7 For t > t
on and BRP < B < BOP , Power-Up State is not defined.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
Chopper-Stabilized, Two-Wire
Hall-Effect Switches
A1152-F, A1153-F,
A1155-F, and A1156-F
MAGNETIC CHARACTERISTICS1: Valid at TA = –40°C to 150°C (TJ < TJ (max)), unless otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Unit2
Magnetic Characteristics
Magnetic Operating Point
Magnetic Release Point
Hysteresis
1152,
1153
TA = –40°C
72
–
118
G
TA = 25°C
58
–
100
G
TA = 150°C
37
–
68
G
1155,
1156
TA = –40°C
23
–
73
G
TA = 25°C
16
–
60
G
TA = 150°C
9
–
49
G
1152,
1153
TA = –40°C
56
–
103
G
TA = 25°C
46
–
85
G
TA = 150°C
22
–
58
G
1155,
1156
TA = –40°C
6
–
53
G
TA = 25°C
4
–
45
G
TA = 150°C
4
–
39
G
TA = –40°C
5
–
30
G
TA = 25°C
5
–
30
G
TA = 150°C
5
–
30
G
BOP
BRP
BHYS
1152,
1153,
1155,
1156
1 Relative
values of B use the algebraic convention, where positive values indicate south magnetic polarity, and negative values indicate north
magnetic polarity; therefore greater B values indicate a stronger south polarity field (or a weaker north polarity field, if present).
2 1 G (gauss) = 0.1 mT (millitesla).
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
Chopper-Stabilized, Two-Wire
Hall-Effect Switches
A1152-F, A1153-F,
A1155-F, and A1156-F
THERMAL CHARACTERISTICS: may require derating at maximum conditions; see application information
Characteristic
Symbol
Test Conditions*
Value
Unit
Package Thermal Resistance
RθJA
Package UB, on 1-layer PCB with copper limited to solder pads
213
ºC/W
*Additional thermal information available on the Allegro website
UB Power Derating Curve
UB Power Dissipation versus Ambient Temperature
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
Chopper-Stabilized, Two-Wire
Hall-Effect Switches
A1152-F, A1153-F,
A1155-F, and A1156-F
Characteristic Performance
A1152-F/A1153-F
A1152/A1153/A1155/A1156
Average Supply Current (Low) versus Temperature
A1155-F/A1156-F
A1152/A1153/A1155/A1156
Average Supply Current (Low) versus Supply Voltage
7.0
Supply Current, ICC(L) (mA)
Supply Current, ICC(L) (mA)
7.0
6.5
VCC = 24 V
6.0
VCC = 3.0 V
5.5
5.0
-60
-40
-20
0
20
40
60
80
100
120
140
6.5
TA = –40°C
6.0
TA = 25°C
5.5
5.0
160
TA = 150°C
2
6
A1152-F/A1153-F
A1150/A1157/A1158
Average Supply Current (Low) versus Temperature
18
22
26
A1155-F/A1156-F
A1150/A1157/A1158
5.0
Supply Current, ICC(L) (mA)
Supply Current, ICC(L) (mA)
14
Average Supply Current (Low) versus Supply Voltage
5.0
4.5
4.0
VCC = 24 V
3.5
VCC = 3.0 V
3.0
2.5
2.0
-60
-40
-20
0
20
40
60
80
100
120
140
4.5
4.0
TA = –40°C
3.0
2.5
2.0
160
TA = 150°C
TA = 25°C
3.5
2
6
Ambient Temperature, TA (°C)
A1152-F/A1153-F
A1150/A1152/A1153/A1155/A1156/A1157/A1158
14
18
22
26
A1155-F/A1156-F
A1150/A1152/A1153/A1155/A1156/A1157/A1158
Average Supply Current (High) versus Supply Voltage
17
Supply Current, ICC(H) (mA)
17
16
VCC = 24 V
15
VCC = 3.0 V
14
13
12
-60
10
Supply Voltage, VCC (V)
Average Supply Current (High) versus Temperature
Supply Current, ICC(H) (mA)
10
Supply Voltage, VCC (V)
Ambient Temperature, TA (°C)
16
-20
0
20
40
60
80
100
Ambient Temperature, TA (°C)
120
140
160
TA = 150°C
TA = 25°C
14
13
12
-40
TA = –40°C
15
2
6
10
14
18
22
26
Supply Voltage, VCC (V)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
Chopper-Stabilized, Two-Wire
Hall-Effect Switches
A1152-F, A1153-F,
A1155-F, and A1156-F
A1155-F/A1156-F
A1152-F/A1153-F
Average Operate Point versus Temperature
120
80
105
65
Applied Flux Density at
Operate Point, BOP (G)
Applied Flux Density at
Operate Point, BOP (G)
Average Operate Point versus Temperature
90
75
VCC = 3.0 V
60
VCC = 24 V
45
VCC = 3.0 V
VCC = 24 V
50
35
20
5
30
-60 -40 -20
0
20
40
60
-60 -40 -20
80 100 120 140 160
40
60
80 100 120 140 160
A1152-F/A1153-F
A1155-F/A1156-F
Average Release Point versus Temperature
60
95
VCC = 3.0 V
80
VCC = 24 V
65
50
35
Applied Flux Density at
Release Point, BRP (G)
110
Applied Flux Density at
Release Point, BRP (G)
20
Ambient Temperature, TA (°C)
Average Release Point versus Temperature
50
VCC = 3.0 V
40
VCC = 24 V
30
20
10
0
20
-60 -40 -20
0
20
40
60
-60 -40 -20
80 100 120 140 160
0
20
40
60
80 100 120 140 160
Ambient Temperature, TA (°C)
Ambient Temperature, TA (°C)
A1152-F/A1153-F
A1155-F/A1156-F
Average Switchpoint Hysteresis versus Temperature
Average Switchpoint Hysteresis versus Temperature
30
30
VCC = 3.0 V
25
VCC = 24 V
20
15
10
5
Applied Flux Density at
Switchpoint Hysteresis, BHYS (G)
Applied Flux Density at
Switchpoint Hysteresis, BHYS (G)
0
Ambient Temperature, TA (°C)
VCC = 3.0 V
25
VCC = 24 V
20
15
10
5
-60 -40 -20
0
20
40
60
80 100 120 140 160
Ambient Temperature, TA (°C)
-60 -40 -20
0
20
40
60
80 100 120 140 160
Ambient Temperature, TA (°C)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
Chopper-Stabilized, Two-Wire
Hall-Effect Switches
A1152-F, A1153-F,
A1155-F, and A1156-F
Functional Description
I+
B+
BHYS
(A) Hysteresis curve for A1152 and A1155
0
ICC(L)
B–
BRP
BOP
BRP
ICC(H)
ICC
ICC
ICC(L)
B–
I+
Switch to Low
0
Switch to Low
Switch to High
ICC(H)
The difference between the magnetic operate and release points
is called the hysteresis of the device, BHYS . This built-in hysteresis allows clean switching of the output even in the presence of
external mechanical vibration and electrical noise.
Switch to High
In the case of the reverse output polarity, as in the A1153 and
A1156, the device output switches high after the magnetic field
at the Hall sensor IC exceeds the operate point threshold, BOP .
When the magnetic field is reduced to below the release point
threshold, BRP, the device output goes low (panel B).
BOP
The A1152 and A1155 output, ICC, switches low after the magnetic field at the Hall sensor IC exceeds the operate point threshold, BOP . When the magnetic field is reduced to below the release
point threshold, BRP , the device output goes high. This is shown
in Figure 1, panel A.
B+
BHYS
(B) Hysteresis curve for A1153 and A1156
Figure 1: Alternative Switching Behaviors Available in the A115x Device Family.
On the horizontal axis, the B+ direction indicates increasing south polarity magnetic field strength, and the B– direction indicates
decreasing south polarity field strength (including the case of increasing north polarity).
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
Chopper-Stabilized, Two-Wire
Hall-Effect Switches
A1152-F, A1153-F,
A1155-F, and A1156-F
V+
VCC
RSENSE
A115x
V+
0.1 µF
VCC
A115x
0.1 µF
GND
GND
ECU
RSENSE
(A) Low side sensing
(B) High side sensing
Figure 2: Typical Application Circuits
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
switchpoint accuracy is the small signal voltage developed
across the Hall element. This voltage is disproportionally small
relative to the offset that can be produced at the output of the
Hall sensor IC. This makes it difficult to process the signal while
maintaining an accurate, reliable output over the specified operating temperature and voltage ranges. Chopper stabilization is
a unique approach used to minimize Hall offset on the chip. The
patented Allegro technique, namely Dynamic Quadrature Offset
Cancellation, removes key sources of the output drift induced by
thermal and mechanical stresses. This offset reduction technique
is based on a signal modulation-demodulation process. The
undesired offset signal is separated from the magnetic fieldinduced signal in the frequency domain, through modulation.
The subsequent demodulation acts as a modulation process for
the offset, causing the magnetic field-induced signal to recover
its original spectrum at base band, while the DC offset becomes
a high-frequency signal. The magnetic-sourced signal then can
pass through a low-pass filter, while the modulated DC offset is
suppressed. The chopper stabilization technique uses a 350 kHz
high frequency clock. For demodulation process, a sample and
hold technique is used, where the sampling is performed at twice
the chopper frequency. This high-frequency operation allows
a greater sampling rate, which results in higher accuracy and
faster signal-processing capability. This approach desensitizes
the chip to the effects of thermal and mechanical stresses, and
produces devices that have extremely stable quiescent Hall output voltages and precise recoverability after temperature cycling.
This technique is made possible through the use of a BiCMOS
process, which allows the use of low-offset, low-noise amplifiers
in combination with high-density logic integration and sampleand-hold circuits.
Regulator
Hall Element
Amp
Sample and
Hold
Clock/Logic
Low-Pass
Filter
Figure 3: Chopper Stabilization Circuit (Dynamic Quadrature Offset Cancellation)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
Chopper-Stabilized, Two-Wire
Hall-Effect Switches
A1152-F, A1153-F,
A1155-F, and A1156-F
Power Derating
The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating supplied
power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors
affecting operating TJ. (Thermal data is also available on the
Allegro MicroSystems Web site.)
The Package Thermal Resistance, RθJA, is a figure of merit summarizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity, K,
of the printed circuit board, including adjacent devices and traces.
Radiation from the die through the device case, RθJC, is relatively
small component of RθJA. Ambient air temperature, TA, and air
motion are significant external factors, damped by overmolding.
The effect of varying power levels (Power Dissipation, PD), can
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD. Example: Reliability for VCC at TA = 150°C, package UA, using a
low-K PCB.
Observe the worst-case ratings for the device, specifically: RθJA = 213 °C/W, TJ(max) = 165°C, VCC(max) = 24 V, and
ICC(max) = 17 mA.
Calculate the maximum allowable power level, PD(max). First,
invert equation 3:
ΔTmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C
This provides the allowable increase to TJ resulting from internal
power dissipation. Then, invert equation 2:
PD(max) = ΔTmax ÷ RθJA = 15°C ÷ 213 °C/W = 70.5 mW
Finally, invert equation 1 with respect to voltage:
VCC(est) = PD(max) ÷ ICC(max) = 70.5 mW ÷ 17 mA = 4.15 V
The result indicates that, at TA, the application and device can
dissipate adequate amounts of heat at voltages ≤VCC(est).
PD = VIN × IIN (1) Compare V
ΔT = PD × RθJA TJ = TA + ΔT
(2)
(3)
CC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced
RθJA. If VCC(est) ≥ VCC(max), then operation between VCC(est)
and VCC(max) is reliable under these conditions.
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC = 4 mA, and RθJA = 140 °C/W, then:
PD = VCC × ICC = 12 V × 4 mA = 48 mW
ΔT = PD × RθJA = 48 mW × 140 °C/W = 7°C
TJ = TA + ΔT = 25°C + 7°C = 32°C
A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding
TJ(max), at a selected RθJA and TA.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
11
Chopper-Stabilized, Two-Wire
Hall-Effect Switches
A1152-F, A1153-F,
A1155-F, and A1156-F
Package UB, 2-Pin SIP
For Reference Only – Not for Tooling Use
(Reference DWG-9070)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
+0.06
4.00 –0.05
B
4 X 10°
1.50 ±0.05
E
2.00
C
1.75 E
4.00
Mold Ejector
Pin Indent
+0.06
–0.07
E
Branded
Face
A
4 X 2.50 REF
0.25 REF
NNN
YYWW
LLLL
45°
0.85 ±0.07
0.42 ±0.10
D Standard Branding Reference View
0.30 REF
2.54 REF
N
Y
W
L
4 X 0.85 REF
1
= Supplier emblem
= Last three digits of device part number
= Last 2 digits of year of manufacture
= Week of manufacture
= Lot number
2
1.00 ±0.10
12.20 ±0.10
+0.07
0.25
–0.03
4 X 7.37 REF
1.80
±0.10
A
Dambar removal protrusion (8X)
B
Gate and tie bar burr area
C
Active Area Depth, 0.38 mm REF
D
Branding scale and appearance at supplier discretion
E
Hall element; not to scale
F
Thermoplastic Molded Lead Bar for alignment during shipment
0.38 REF
0.25 REF
4 X 0.85 REF
0.85 ±0.07
1.80
+0.06
–0.07
F
4.00
+0.06
–0.05
1.50 ±0.05
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
12
Chopper-Stabilized, Two-Wire
Hall-Effect Switches
A1152-F, A1153-F,
A1155-F, and A1156-F
Revision History
Revision
Revision Date
–
September 29, 2014
1
April 2, 2015
2
September 21, 2015
Description of Revision
Initial Release
Updated branding info on package drawing
Added AEC-Q100 qualification under Features and Benefits
Copyright ©2015, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
13
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