A B C D E F G H I J K L REVISION HISTORY 1 485/232 DE485/F232 DI - 3 2ND PROTOTYPE KEITH B. 1-22-16 3 1 R11 VL R6 49.9 1210 2 2 5 1 VL 100k 6 4 2 3 VL R2 100k E14 VL 1.7V - 5.5V 5V E15 49.9 1210 100k GND 3 C6 6.8uF 3216 6 4 2 E3 U1 LTC2873IUFD 1 2 3 4 5 6 7 E6 DI E8 JP11 5 3V3 3 EXT 1 5V 3V3 E16 VCC 3V - 5.5V 5V MAIN SUPPLY 24 23 22 21 20 JP8 TE=DE JP9 RE=DE E7 3V3 R3 E2 E5 5 3V3 3 EXT 1 5V R32 100k E4 JP10 LOGIC SUPPLY C5 6.8uF 3216 R25 249 ENuC VL ON OFF R33 100k R1 JP1 LOOPBACK R26 249 ENuC VL OFF ON R34 VL R5 100k JP2 TERMINATOR ENABLE 100k U2 LV1T126 4 E13 VEE RO 485/232 RE485 DE485 DI SHDN NC VCC A GND B VCC VDD A/DO J1 19 18 17 16 15 14 13 1 A-DO 2 GND 3 5 B-RI VDD C4 GND CAP VEE GND SW VEE RE485 DATE 1. ALL RESISTORS AND CAPACITORS ARE 0603, UNLESS OTHERWISE SPECIFIED. 2. JUMPER POSITIONS DENOTED BY 'uC' INFER CONNECTION TO ARDUINO BOARD. 3. JUMPER POSITIONS DENOTED BY 'EXT' INFER CONNECTION TO TURRET. RO 5 APPROVED VCC 5 1 VL R8 49.9 1210 LOOP TE VL 2 100k 4 4 5 3 VL R27 249 E1 DESCRIPTION TE485 LB VL VCC GND RO 1 U3 LV1T126 IOREF LVC1T45 U11 2 NO YES TE485 4 6 IOREF R10 100k R4 100k NO YES LB R7 4 3 4 5 1 ENuC VL 485 232 GND U4 LV1T126 10nF JP3 RS485/232 SELECT 3 RX MODE VL 2 100k REV NOTES: C7 R9 IOREF 2 ECO E12 B/RI SHDN 8 9 10 11 12 25 1uF E9 E11 6 R17 6 C2 220nF L1 2.2uF 10uH 1 5 7 R22 100k 3 R21 100k VL U8 LV1T126 100k R15 100k R31 249 VCC 2 VL IOREF DE RE R12 100k VEE JP7 SHUTDOWN 3 1uF C1 100k 49.9 1210 R19 100k U7 LV1T126 1 5 R18 VL 3 U6 LV1T126 IOREF R30 249 JP6 TRANSMIT INPUT R38 YES NO VL ENuC 100k 49.9 1210 R16 100k 1 5 VL 3 R23 VL 4 R13 100k 2 VL R29 249 JP5 DRIVER ENABLE 4 4 U5 LV1T126 1 5 100k 49.9 1210 R20 R37 LO HI VL ENuC 2 R28 249 JP4 RECEIVE ENABLE R36 SDN 100k 49.9 1210 OFF ON VL ENuC 2 VL 4 R14 R35 ON OFF VL ENuC 7 GND C3 TX GND E10 8 8 C16 C17 C8 C9 C10 C11 C12 C13 C14 C15 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 4 3 2 1 4 3 2 1 IOREF IOREF 5 1 SW1 ADDR R24 100k D1 RX TX SDN DE RE MODE TE LOOP 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 1 2 3 4 5 6 1 2 3 4 5 6 7 8 100k 4 VCC R39 261 U9 LV1T126 DI GRN 5 1 3V3 5V 9 5 6 7 8 RA1 2 3 DI D2 A B C D 2 4 3 RX TX 2 ~3 4 ~5 ~6 7 ARDUINO HEADERS RO J2 8 ~9 ~10 ~11 12 13 G AR SDA SCL 10 J3 A0 A1 A2 A3 A4 A5 J5 IO RST 3V 5V G G VIN J4 E VCC R40 649 U10 LV1T126 RO YEL F CUSTOMER NOTICE APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMERS RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. PCB DES. KEITH B. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. G H TECHNOLOGY APP ENG. KEITH B. 1630 McCarthy Blvd. Milpitas, CA 95035 LTC CONFIDENTIAL Phone: (408) 432-1900 FOR CUSTOMER Fax: (408) 434-0507 USE ONLY www.linear.com TITLE: SCHEMATIC Two Wire RS485/RS232 Transceiver with Switchable Termination SIZE IC NO. SCALE = NONE I DATE: REV. LTC2873IUFD DEMO CIRCUIT 2364A N/A Wednesday, January 20, 2016 J 3 SHEET K 1 OF L 1 9